DE102015120647B4 - Elektrisches Bauelement mit dünner Lot-Stopp-Schicht und Verfahren zur Herstellung - Google Patents

Elektrisches Bauelement mit dünner Lot-Stopp-Schicht und Verfahren zur Herstellung Download PDF

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DE102015120647B4
DE102015120647B4 DE102015120647.1A DE102015120647A DE102015120647B4 DE 102015120647 B4 DE102015120647 B4 DE 102015120647B4 DE 102015120647 A DE102015120647 A DE 102015120647A DE 102015120647 B4 DE102015120647 B4 DE 102015120647B4
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Prior art keywords
carrier
stop layer
contact surface
solder stop
component
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DE102015120647.1A
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German (de)
English (en)
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DE102015120647A1 (de
Inventor
Alexander Schmajew
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SnapTrack Inc
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SnapTrack Inc
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Priority to DE102015120647.1A priority Critical patent/DE102015120647B4/de
Application filed by SnapTrack Inc filed Critical SnapTrack Inc
Priority to EP16762778.5A priority patent/EP3381052A1/de
Priority to PCT/EP2016/070973 priority patent/WO2017088998A1/de
Priority to JP2018527165A priority patent/JP2018536994A/ja
Priority to KR1020187011776A priority patent/KR20180088798A/ko
Priority to CN201680062169.7A priority patent/CN108369935A/zh
Priority to US15/776,019 priority patent/US20180331062A1/en
Priority to BR112018010666A priority patent/BR112018010666A8/pt
Publication of DE102015120647A1 publication Critical patent/DE102015120647A1/de
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Publication of DE102015120647B4 publication Critical patent/DE102015120647B4/de
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/38—Effects and problems related to the device integration
    • H01L2924/384—Bump effects
    • H01L2924/3841—Solder bridging

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE102015120647.1A 2015-11-27 2015-11-27 Elektrisches Bauelement mit dünner Lot-Stopp-Schicht und Verfahren zur Herstellung Active DE102015120647B4 (de)

Priority Applications (8)

Application Number Priority Date Filing Date Title
DE102015120647.1A DE102015120647B4 (de) 2015-11-27 2015-11-27 Elektrisches Bauelement mit dünner Lot-Stopp-Schicht und Verfahren zur Herstellung
PCT/EP2016/070973 WO2017088998A1 (de) 2015-11-27 2016-09-06 Elektrisches bauelement mit dünner lot-stopp-schicht und verfahren zu seiner herstellung
JP2018527165A JP2018536994A (ja) 2015-11-27 2016-09-06 薄いはんだストップ層を備える電子部品及び製造方法
KR1020187011776A KR20180088798A (ko) 2015-11-27 2016-09-06 얇은 솔더 정지 층을 갖는 전기 디바이스 및 제조를 위한 방법
EP16762778.5A EP3381052A1 (de) 2015-11-27 2016-09-06 Elektrisches bauelement mit dünner lot-stopp-schicht und verfahren zu seiner herstellung
CN201680062169.7A CN108369935A (zh) 2015-11-27 2016-09-06 具有薄的焊料阻止层的电元器件和用于制造的方法
US15/776,019 US20180331062A1 (en) 2015-11-27 2016-09-06 Electrical component with thin solder resist layer and method for the production thereof
BR112018010666A BR112018010666A8 (pt) 2015-11-27 2016-09-06 dispositivo elétrico com camada de máscara de solda fina e método para produção

Applications Claiming Priority (1)

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DE102015120647.1A DE102015120647B4 (de) 2015-11-27 2015-11-27 Elektrisches Bauelement mit dünner Lot-Stopp-Schicht und Verfahren zur Herstellung

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EP (1) EP3381052A1 (enExample)
JP (1) JP2018536994A (enExample)
KR (1) KR20180088798A (enExample)
CN (1) CN108369935A (enExample)
BR (1) BR112018010666A8 (enExample)
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FI130166B (en) 2019-03-08 2023-03-23 Picosun Oy Solder mask
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US20050136558A1 (en) * 2003-12-18 2005-06-23 Wang James J. Stacked semiconductor device assembly and method for forming

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CN108369935A (zh) 2018-08-03
KR20180088798A (ko) 2018-08-07
WO2017088998A1 (de) 2017-06-01
US20180331062A1 (en) 2018-11-15
BR112018010666A2 (pt) 2018-11-13
BR112018010666A8 (pt) 2019-02-26
EP3381052A1 (de) 2018-10-03
JP2018536994A (ja) 2018-12-13
DE102015120647A1 (de) 2017-06-01

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