DE102013103860A8 - Chipgehäuse und Verfahren zum Bilden desselben - Google Patents

Chipgehäuse und Verfahren zum Bilden desselben Download PDF

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Publication number
DE102013103860A8
DE102013103860A8 DE102013103860A DE102013103860A DE102013103860A8 DE 102013103860 A8 DE102013103860 A8 DE 102013103860A8 DE 102013103860 A DE102013103860 A DE 102013103860A DE 102013103860 A DE102013103860 A DE 102013103860A DE 102013103860 A8 DE102013103860 A8 DE 102013103860A8
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forming
same
chip package
package
chip
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DE102013103860A
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DE102013103860A1 (de
Inventor
Swee Kah Lee
Manfred Mengel
Stefan Schmid
Holger Torwesten
Soon Lock Goh
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of DE102013103860A1 publication Critical patent/DE102013103860A1/de
Publication of DE102013103860A8 publication Critical patent/DE102013103860A8/de
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
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US9330993B2 (en) 2012-12-20 2016-05-03 Intel Corporation Methods of promoting adhesion between underfill and conductive bumps and structures formed thereby
US9076783B2 (en) * 2013-03-22 2015-07-07 Freescale Semiconductor, Inc. Methods and systems for selectively forming metal layers on lead frames after die attachment
KR20160048277A (ko) * 2014-10-23 2016-05-04 에스케이하이닉스 주식회사 칩 내장 패키지 및 그 제조방법
DE102014117410B4 (de) * 2014-11-27 2019-01-03 Heraeus Deutschland GmbH & Co. KG Elektrisches Kontaktelement, Einpressstift, Buchse und Leadframe
DE102016103585B4 (de) * 2016-02-29 2022-01-13 Infineon Technologies Ag Verfahren zum Herstellen eines Package mit lötbarem elektrischen Kontakt
JP3238263U (ja) 2019-07-25 2022-07-13 ヒタチ・エナジー・スウィツァーランド・アクチェンゲゼルシャフト パワー半導体モジュール
TW202236570A (zh) * 2021-03-12 2022-09-16 華東科技股份有限公司 系統級封裝
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US4499152A (en) * 1982-08-09 1985-02-12 General Electric Company Metal-clad laminate construction
JP3801188B2 (ja) * 2004-09-06 2006-07-26 セイコーエプソン株式会社 半導体装置および半導体装置の製造方法
US7507605B2 (en) * 2004-12-30 2009-03-24 Texas Instruments Incorporated Low cost lead-free preplated leadframe having improved adhesion and solderability
KR100642889B1 (ko) * 2005-05-25 2006-11-03 엘에스전선 주식회사 반도체용 접착필름
DE102007045794A1 (de) 2006-09-27 2008-04-17 MEC Co., Ltd., Amagasaki Haftvermittler für Harz und Verfahren zur Erzeugung eines Laminates, umfassend den Haftvermittler
JP5605222B2 (ja) * 2008-05-09 2014-10-15 国立大学法人九州工業大学 3次元実装半導体装置及びその製造方法
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