DE102010017245B8 - Verfahren zum Herstellen von Halbleiterbauelementen und Halbleiterbauelement - Google Patents

Verfahren zum Herstellen von Halbleiterbauelementen und Halbleiterbauelement Download PDF

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Publication number
DE102010017245B8
DE102010017245B8 DE201010017245 DE102010017245A DE102010017245B8 DE 102010017245 B8 DE102010017245 B8 DE 102010017245B8 DE 201010017245 DE201010017245 DE 201010017245 DE 102010017245 A DE102010017245 A DE 102010017245A DE 102010017245 B8 DE102010017245 B8 DE 102010017245B8
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Prior art keywords
semiconductor device
manufacturing
semiconductor devices
devices
semiconductor
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Active
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DE201010017245
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English (en)
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DE102010017245A1 (de
DE102010017245B4 (de
Inventor
Jin-Ping Han
Knut Stahrenberg
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of DE102010017245A1 publication Critical patent/DE102010017245A1/de
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Publication of DE102010017245B4 publication Critical patent/DE102010017245B4/de
Publication of DE102010017245B8 publication Critical patent/DE102010017245B8/de
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE201010017245 2009-06-05 2010-06-04 Verfahren zum Herstellen von Halbleiterbauelementen und Halbleiterbauelement Active DE102010017245B8 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/478,905 2009-06-05
US12/478,905 US7951664B2 (en) 2009-06-05 2009-06-05 Methods of manufacturing resistors and structures thereof

Publications (3)

Publication Number Publication Date
DE102010017245A1 DE102010017245A1 (de) 2011-01-20
DE102010017245B4 DE102010017245B4 (de) 2015-02-05
DE102010017245B8 true DE102010017245B8 (de) 2015-04-16

Family

ID=43300107

Family Applications (1)

Application Number Title Priority Date Filing Date
DE201010017245 Active DE102010017245B8 (de) 2009-06-05 2010-06-04 Verfahren zum Herstellen von Halbleiterbauelementen und Halbleiterbauelement

Country Status (2)

Country Link
US (2) US7951664B2 (de)
DE (1) DE102010017245B8 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8093118B2 (en) * 2009-06-26 2012-01-10 United Microelectronics Corp. Semiconductor structure and method of forming the same
JP5729745B2 (ja) * 2009-09-15 2015-06-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US20110198705A1 (en) * 2010-02-18 2011-08-18 Broadcom Corporation Integrated resistor using gate metal for a resistive element
US9349734B2 (en) * 2014-09-03 2016-05-24 Globalfoundries Inc. Selective FuSi gate formation in gate first CMOS technologies
US9825141B2 (en) 2015-05-26 2017-11-21 Avago Technologies General Ip (Singapore) Pte. Ltd. Three dimensional monolithic LDMOS transistor
US9564489B2 (en) * 2015-06-29 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple gate field-effect transistors having oxygen-scavenged gate stack
US9570571B1 (en) * 2015-11-18 2017-02-14 International Business Machines Corporation Gate stack integrated metal resistors
KR102240021B1 (ko) 2017-03-03 2021-04-14 삼성전자주식회사 저항을 포함하는 반도체 소자
CN110729402B (zh) * 2019-10-21 2023-03-07 上海华虹宏力半导体制造有限公司 一种多晶硅电阻的制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060246654A1 (en) * 2002-10-09 2006-11-02 Samsung Electronics Co., Ltd. Semiconductor device with resistor pattern and method of fabricating the same
DE102007063229A1 (de) * 2007-12-31 2009-07-02 Advanced Micro Devices, Inc., Sunnyvale Teststruktur zur Überwachung von Prozesseigenschaften für die Herstellung eingebetteter Halbleiterlegierungen in Drain/Source-Gebieten
DE102009021485A1 (de) * 2009-05-15 2010-11-18 Globalfoundries Dresden Module One Llc & Co. Kg Halbleiterbauelement mit Metallgate und einem siliziumenthaltenden Widerstand, der auf einer Isolationsstruktur gebildet ist

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0613548A (ja) * 1992-03-30 1994-01-21 Texas Instr Inc <Ti> 集積回路抵抗とその製法
US6548840B1 (en) * 2000-04-03 2003-04-15 Hrl Laboratories, Llc Monolithic temperature compensation scheme for field effect transistor integrated circuits
US6958523B2 (en) * 2000-09-15 2005-10-25 Texas Instruments Incorporated On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits
KR100446309B1 (ko) * 2002-11-14 2004-09-01 삼성전자주식회사 L자형 스페이서를 채용한 반도체 소자의 제조 방법
US7183593B2 (en) * 2003-12-05 2007-02-27 Taiwan Semiconductor Manufacturing Company, Ltd. Heterostructure resistor and method of forming the same
US20060166457A1 (en) * 2005-01-21 2006-07-27 Liu Sarah X Method of making transistors and non-silicided polysilicon resistors for mixed signal circuits
US7518196B2 (en) * 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US7491615B2 (en) * 2005-09-23 2009-02-17 United Microelectronics Corp. Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors
JP2007214208A (ja) * 2006-02-07 2007-08-23 Toshiba Corp 半導体装置及びその製造方法
JP5065615B2 (ja) * 2006-04-20 2012-11-07 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7494884B2 (en) * 2006-10-05 2009-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. SiGe selective growth without a hard mask
US7465634B2 (en) * 2006-10-18 2008-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures
US7846783B2 (en) * 2008-01-31 2010-12-07 Texas Instruments Incorporated Use of poly resistor implant to dope poly gates
US8159040B2 (en) * 2008-05-13 2012-04-17 International Business Machines Corporation Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor
US7879666B2 (en) * 2008-07-23 2011-02-01 Freescale Semiconductor, Inc. Semiconductor resistor formed in metal gate stack
US7803687B2 (en) * 2008-10-17 2010-09-28 United Microelectronics Corp. Method for forming a thin film resistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060246654A1 (en) * 2002-10-09 2006-11-02 Samsung Electronics Co., Ltd. Semiconductor device with resistor pattern and method of fabricating the same
DE102007063229A1 (de) * 2007-12-31 2009-07-02 Advanced Micro Devices, Inc., Sunnyvale Teststruktur zur Überwachung von Prozesseigenschaften für die Herstellung eingebetteter Halbleiterlegierungen in Drain/Source-Gebieten
DE102009021485A1 (de) * 2009-05-15 2010-11-18 Globalfoundries Dresden Module One Llc & Co. Kg Halbleiterbauelement mit Metallgate und einem siliziumenthaltenden Widerstand, der auf einer Isolationsstruktur gebildet ist

Also Published As

Publication number Publication date
US20100308330A1 (en) 2010-12-09
DE102010017245A1 (de) 2011-01-20
DE102010017245B4 (de) 2015-02-05
US7951664B2 (en) 2011-05-31
US20110175174A1 (en) 2011-07-21
US9142547B2 (en) 2015-09-22

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