DE102006022026A1 - Speichersystem, Speichermodul, Speichersteuerung und Betriebsverfahren - Google Patents

Speichersystem, Speichermodul, Speichersteuerung und Betriebsverfahren Download PDF

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Publication number
DE102006022026A1
DE102006022026A1 DE200610022026 DE102006022026A DE102006022026A1 DE 102006022026 A1 DE102006022026 A1 DE 102006022026A1 DE 200610022026 DE200610022026 DE 200610022026 DE 102006022026 A DE102006022026 A DE 102006022026A DE 102006022026 A1 DE102006022026 A1 DE 102006022026A1
Authority
DE
Germany
Prior art keywords
memory
data
buses
further characterized
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE200610022026
Other languages
German (de)
English (en)
Inventor
Jung Bae Yongin Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/267,669 external-priority patent/US7577760B2/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102006022026A1 publication Critical patent/DE102006022026A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109—Control signal input circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
DE200610022026 2005-05-10 2006-05-10 Speichersystem, Speichermodul, Speichersteuerung und Betriebsverfahren Withdrawn DE102006022026A1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2005-0039008 2005-05-10
KR20050039008 2005-05-10
US11/267,669 US7577760B2 (en) 2005-05-10 2005-11-04 Memory systems, modules, controllers and methods using dedicated data and control busses
US11/267,669 2005-11-04

Publications (1)

Publication Number Publication Date
DE102006022026A1 true DE102006022026A1 (de) 2006-11-16

Family

ID=37295609

Family Applications (1)

Application Number Title Priority Date Filing Date
DE200610022026 Withdrawn DE102006022026A1 (de) 2005-05-10 2006-05-10 Speichersystem, Speichermodul, Speichersteuerung und Betriebsverfahren

Country Status (3)

Country Link
JP (1) JP2006318456A (ja)
KR (1) KR100763352B1 (ja)
DE (1) DE102006022026A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008097997A1 (en) * 2007-02-06 2008-08-14 Rambus Inc. Semiconductor module with micro-buffers

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011132310A1 (ja) * 2010-04-23 2011-10-27 株式会社日立製作所 情報処理装置、及び、半導体記憶装置
US10437483B2 (en) 2015-12-17 2019-10-08 Samsung Electronics Co., Ltd. Computing system with communication mechanism and method of operation thereof
CN112286842B (zh) * 2019-07-22 2023-07-04 苏州库瀚信息科技有限公司 用于存储器控制器与存储器设备互连的总线

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4569912B2 (ja) * 2000-03-10 2010-10-27 エルピーダメモリ株式会社 メモリシステム
TW528948B (en) * 2000-09-14 2003-04-21 Intel Corp Memory module having buffer for isolating stacked memory devices
US6725314B1 (en) * 2001-03-30 2004-04-20 Sun Microsystems, Inc. Multi-bank memory subsystem employing an arrangement of multiple memory modules

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008097997A1 (en) * 2007-02-06 2008-08-14 Rambus Inc. Semiconductor module with micro-buffers
US8143720B2 (en) 2007-02-06 2012-03-27 Rambus Inc. Semiconductor module with micro-buffers
US8378481B2 (en) 2007-02-06 2013-02-19 Rambus Inc. Semiconductor module with micro-buffers
US8766434B2 (en) 2007-02-06 2014-07-01 Rambus Inc. Semiconductor module with micro-buffers

Also Published As

Publication number Publication date
JP2006318456A (ja) 2006-11-24
KR100763352B1 (ko) 2007-10-04
KR20060116684A (ko) 2006-11-15

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OP8 Request for examination as to paragraph 44 patent law
8139 Disposal/non-payment of the annual fee