KR100763352B1 - 전용 데이터 및 컨트롤 버스들을 사용하는 메모리 시스템, 모듈들, 컨트롤러들 및 방법들 - Google Patents

전용 데이터 및 컨트롤 버스들을 사용하는 메모리 시스템, 모듈들, 컨트롤러들 및 방법들 Download PDF

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Publication number
KR100763352B1
KR100763352B1 KR20060013956A KR20060013956A KR100763352B1 KR 100763352 B1 KR100763352 B1 KR 100763352B1 KR 20060013956 A KR20060013956 A KR 20060013956A KR 20060013956 A KR20060013956 A KR 20060013956A KR 100763352 B1 KR100763352 B1 KR 100763352B1
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South Korea
Prior art keywords
memory
buses
control
dedicated
serial data
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KR20060013956A
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English (en)
Korean (ko)
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KR20060116684A (ko
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이정배
Original Assignee
삼성전자주식회사
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Priority claimed from US11/267,669 external-priority patent/US7577760B2/en
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Publication of KR20060116684A publication Critical patent/KR20060116684A/ko
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Publication of KR100763352B1 publication Critical patent/KR100763352B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109—Control signal input circuits

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
KR20060013956A 2005-05-10 2006-02-14 전용 데이터 및 컨트롤 버스들을 사용하는 메모리 시스템, 모듈들, 컨트롤러들 및 방법들 KR100763352B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20050039008 2005-05-10
KR1020050039008 2005-05-10
US11/267,669 US7577760B2 (en) 2005-05-10 2005-11-04 Memory systems, modules, controllers and methods using dedicated data and control busses
US11/267,669 2005-11-04

Publications (2)

Publication Number Publication Date
KR20060116684A KR20060116684A (ko) 2006-11-15
KR100763352B1 true KR100763352B1 (ko) 2007-10-04

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Application Number Title Priority Date Filing Date
KR20060013956A KR100763352B1 (ko) 2005-05-10 2006-02-14 전용 데이터 및 컨트롤 버스들을 사용하는 메모리 시스템, 모듈들, 컨트롤러들 및 방법들

Country Status (3)

Country Link
JP (1) JP2006318456A (ja)
KR (1) KR100763352B1 (ja)
DE (1) DE102006022026A1 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8143720B2 (en) 2007-02-06 2012-03-27 Rambus Inc. Semiconductor module with micro-buffers
WO2011132310A1 (ja) * 2010-04-23 2011-10-27 株式会社日立製作所 情報処理装置、及び、半導体記憶装置
US10437483B2 (en) 2015-12-17 2019-10-08 Samsung Electronics Co., Ltd. Computing system with communication mechanism and method of operation thereof
CN112286842B (zh) * 2019-07-22 2023-07-04 苏州库瀚信息科技有限公司 用于存储器控制器与存储器设备互连的总线

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010088376A (ko) * 2000-03-10 2001-09-26 가나이 쓰토무 메모리 시스템
KR20030048036A (ko) * 2000-09-14 2003-06-18 인텔 코오퍼레이션 스택된 메모리 디바이스를 격리하는 버퍼를 갖는 메모리모듈
KR20030085134A (ko) * 2001-03-30 2003-11-03 선 마이크로시스템즈, 인코포레이티드 복수의 메모리 모듈들의 배열을 사용한 멀티-뱅크 메모리서브시스템

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010088376A (ko) * 2000-03-10 2001-09-26 가나이 쓰토무 메모리 시스템
KR20030048036A (ko) * 2000-09-14 2003-06-18 인텔 코오퍼레이션 스택된 메모리 디바이스를 격리하는 버퍼를 갖는 메모리모듈
KR20030085134A (ko) * 2001-03-30 2003-11-03 선 마이크로시스템즈, 인코포레이티드 복수의 메모리 모듈들의 배열을 사용한 멀티-뱅크 메모리서브시스템

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Publication number Publication date
JP2006318456A (ja) 2006-11-24
KR20060116684A (ko) 2006-11-15
DE102006022026A1 (de) 2006-11-16

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