CN219553617U - Packaging structure of chip - Google Patents

Packaging structure of chip Download PDF

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Publication number
CN219553617U
CN219553617U CN202222930115.3U CN202222930115U CN219553617U CN 219553617 U CN219553617 U CN 219553617U CN 202222930115 U CN202222930115 U CN 202222930115U CN 219553617 U CN219553617 U CN 219553617U
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mesh
chip
meshes
holes
pcb
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CN202222930115.3U
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Chinese (zh)
Inventor
卢昌丽
吴云海
李继华
蒲宜壮
文云仁
侯露
郭秀青
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Shenzhen Fenda Technology Co Ltd
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Shenzhen Fenda Technology Co Ltd
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Abstract

The utility model belongs to the technical field of chip packaging, and provides a packaging structure of a chip.

Description

Packaging structure of chip
Technical Field
The utility model relates to the technical field of chip packaging, in particular to a chip packaging structure.
Background
The current chip design tends to be small and precise, and the smaller the heat dissipation space of the chip is, the more difficult the heat dissipation design is. At present, a chip with a heat dissipation substrate (for example, a chip packaged by adopting a packaging process such as TQFP, QFP and the like) exists, the heat dissipation of the chip is mainly realized by adopting a heavy heat dissipation sheet and matching with a PCB design and a surface mounting process, but the packaging process of the chip with the heat dissipation substrate easily causes the height difference between the chip substrate and the PCB, particularly for the chip with the height difference of more than 0.1mm, the risk of short circuit of a bonding pad is easy to occur during packaging and welding, and the electrical performance of a product is reduced.
In summary, the existing packaging technology of the chip with the heat dissipation substrate has the technical problems that the bonding pad is easy to short, the electrical performance of the product is unstable, and the like.
Disclosure of Invention
In order to solve the technical problems, the utility model provides the following scheme.
In one aspect, the present utility model provides a package structure of a chip, including:
the SMT bushing plate is used for mounting the PCB; the PCB comprises a plurality of through holes, chips are mounted above the through holes, the SMT bushing comprises a plurality of meshes, and when the SMT bushing is mounted with the PCB, the positions of the meshes correspond to the through holes; the number of the plurality of meshes is set according to the shape and the area of the substrate of the chip so that the plurality of through holes uniformly cover the substrate of the chip;
the radiating solder paste fills the meshes, connects the substrate of the chip and the PCB, and conducts heat of the chip to the PCB;
and plugging the solder paste, filling the plurality of through holes, connecting with the heat dissipation solder paste, and leading out the heat conducted by the heat dissipation solder paste from the plurality of through holes.
Further, the plurality of cells includes a first cell, a second cell, a third cell, and a fourth cell; the first mesh and the second mesh are arranged side by side, and the third mesh and the fourth mesh are arranged side by side; the first mesh, the second mesh, the third mesh, and the fourth mesh are arranged in two rows and two columns.
Further, the first mesh is a square mesh, and the length and the width of the square mesh are equal or unequal.
Further, the second mesh, the third mesh and the fourth mesh are square meshes.
Further, the length of the square mesh is 2mm, the width is 2mm, and the depth of the mesh is 0.1 mm.
Further, the first mesh is a circular mesh, the diameter of the circular mesh is 2mm, and the depth of the mesh is 0.1 mm.
Further, the second, third and fourth mesh openings are circular.
Further, any one of the first mesh, the second mesh, the third mesh and the fourth mesh has a square mesh shape, and the others have a circular mesh shape.
Further, any two of the first mesh, the second mesh, the third mesh and the fourth mesh are square meshes, and the others are round meshes.
Further, the total tin amount of the plugging tin paste and the heat dissipation tin paste is 1.825mm 3
Compared with the prior art, the utility model has the beneficial effects that:
according to the packaging structure of the chip, the SMT bushing, the heat dissipation tin paste and the blocking tin paste are arranged, the SMT bushing is used for being attached to the PCB, the PCB comprises the through holes, the chip is attached to the upper portion of the through holes, the SMT bushing comprises the holes, when the SMT bushing is attached to the PCB, the holes correspond to the through holes, the holes are arranged according to the shape and the area of the substrate of the chip, the holes uniformly cover the substrate of the chip, the holes are filled with the heat dissipation tin paste, the substrate of the chip is connected with the PCB, the heat of the chip is conducted to the PCB, the blocking tin paste is filled with the holes and is connected with the heat dissipation tin paste, the heat conducted by the heat dissipation tin paste is led out from the holes, and therefore the heat dissipation tin paste and the through holes of the PCB are fully utilized to dissipate heat of the chip, meanwhile, the heat dissipation tin paste is prevented from melting to the pad through the holes to cause short circuit when the through the holes are melted at high temperature, and the stability of the electrical performance of a product is improved.
Drawings
FIG. 1 is a schematic diagram of a package structure of a chip;
fig. 2 is a schematic structural diagram of a package structure of a chip.
Reference numerals illustrate:
1. SMT bushing plate; 10. a mesh;
2. radiating solder paste;
3. plugging the solder paste;
4. a PCB board; 40. and (5) a via hole.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Example 1
Referring to fig. 1-2, the present embodiment provides a package structure of a chip, including:
the SMT bushing plate 1 is used for mounting a PCB 4; the PCB 4 comprises a plurality of through holes 40, chips are mounted above the through holes 40, the SMT bushing 1 comprises a plurality of meshes 10, and when the SMT bushing 1 is mounted with the PCB 4, the positions of the meshes 10 correspond to the through holes 40; the number of the plurality of mesh holes 10 is set according to the shape and area of the substrate of the chip such that the plurality of via holes 40 uniformly cover the substrate of the chip;
the heat dissipation solder paste 2 fills the plurality of meshes 10, connects the substrate of the chip and the PCB 4, and conducts heat of the chip to the PCB 4;
and plugging the solder paste 3, filling the plurality of through holes 40, connecting with the heat dissipation solder paste 2, and leading out heat conducted by the heat dissipation solder paste 2 from the plurality of through holes 40.
In this embodiment, through setting up SMT bushing 1, heat dissipation tin cream 2 and jam tin cream 3, SMT bushing 1 is used for pasting PCB board 4, PCB board 4 includes a plurality of via holes 40, paste the chip above a plurality of via holes 40, SMT bushing 1 includes a plurality of mesh 10, when SMT bushing 1 and PCB board 4 paste, the position of a plurality of mesh 10 corresponds with a plurality of via holes 40, the quantity of a plurality of mesh 10 sets up in order to make a plurality of via holes 40 evenly cover the substrate of chip according to the shape and the area of the substrate of chip, heat dissipation tin cream 2 fills a plurality of mesh 10, connect the substrate of chip and PCB board 4, heat conduction to PCB board 4 with the heat conduction of chip, jam tin cream 3 fills a plurality of via holes 40, be connected with heat dissipation tin cream 2, heat conduction's from a plurality of via holes 40, thereby make full use of jam tin cream 3, heat dissipation tin cream 2 and PCB board 4's via holes 40 dispel the heat to the chip, prevent simultaneously that tin cream 2 from melting and causing the electrical property stability of the pad through the via holes 40 to promote the short circuit when high temperature.
It should be noted that, in this embodiment, the plurality of mesh openings 10 are respectively located in independent areas, and the number of the mesh openings is set according to the shape and the area of the substrate of the chip, so that the plurality of mesh openings 10 uniformly cover the substrate of the chip, and therefore, solder paste can be uniformly distributed on the substrate of the chip and the PCB 4, and good heat dissipation and heat conduction are achieved. In a preferred embodiment, the plurality of cells 10 includes a first cell 10, a second cell 10, a third cell 10, and a fourth cell 10; the first mesh 10 is arranged side by side with the second mesh 10, and the third mesh 10 is arranged side by side with the fourth mesh 10; the first mesh 10, the second mesh 10, the third mesh 10, and the fourth mesh 10 are arranged in two rows and two columns. In this embodiment, four meshes 10 of two rows and two columns are located in the middle of the SMT bushing 1 and occupy most of the board surface of the SMT bushing 1, so that the plurality of meshes 10 uniformly cover the substrate of the chip, and solder paste is uniformly distributed on the substrate of the chip and the PCB 4, thereby achieving good heat dissipation and heat conduction. Further, the first mesh 10 is a square mesh 10, and the length and width of the square mesh 10 are equal or unequal. Further, the second mesh 10, the third mesh 10 and the fourth mesh 10 are square meshes 10. Alternatively, the square mesh 10 may have a length of 2mm, a width of 2mm, and a depth of 0.1 mm. Further, the first mesh 10 is a circular mesh 10, the diameter of the circular mesh 10 is 2mm, and the depth of the mesh 10 is 0.1 mm. Alternatively, the second, third and fourth mesh 10, 10 are circular mesh 10. Alternatively, any one of the first, second, third and fourth mesh 10, 10 may have a square mesh 10 and the other may have a circular mesh 10. Alternatively, any two of the first, second, third and fourth mesh 10, 10 may have a square mesh 10 and the other may have a circular mesh 10.
Example two
The embodiment provides a chip packaging method for packaging and forming the packaging structure of the chip, which comprises the following steps:
a plurality of meshes 10 are formed on the SMT bushing plate 1, the SMT bushing plate 1 is used for mounting a PCB 4, and the PCB 4 comprises a plurality of through holes 40;
mounting chips above the plurality of vias 40;
mounting the SMT stencil 1 and the PCB board 4 such that the positions of the plurality of meshes 10 correspond to the plurality of vias 40; the number of the plurality of mesh holes 10 is set according to the shape and area of the substrate of the chip such that the plurality of via holes 40 uniformly cover the substrate of the chip;
filling the plurality of meshes 10 with heat dissipation solder paste 2, wherein the heat dissipation solder paste 2 connects the substrate of the chip and the PCB 4, and conducts heat of the chip to the PCB 4;
the plurality of via holes 40 are filled with the plugging solder paste 3, and the plugging solder paste is connected with the heat dissipation solder paste 2, so that heat conducted by the heat dissipation solder paste 2 is led out from the plurality of via holes 40.
In the embodiment, the packaging structure and the packaging method of the chip are provided with the SMT bushing 1, the heat dissipation tin paste 2 and the blocking tin paste 3, the SMT bushing 1 is used for mounting the PCB 4, the PCB 4 comprises a plurality of through holes 40, the chip is mounted above the plurality of through holes 40, the SMT bushing 1 comprises a plurality of meshes 10, when the SMT bushing 1 is mounted on the PCB 4, the positions of the plurality of meshes 10 correspond to the plurality of through holes 40, the number of the plurality of meshes 10 is set according to the shape and the area of the substrate of the chip so that the plurality of through holes 40 uniformly cover the substrate of the chip, the heat dissipation tin paste 2 is filled with the plurality of meshes 10, the substrate of the chip is connected with the PCB 4, the heat of the chip is conducted to the PCB 4, the blocking tin paste 3 is filled with the plurality of through holes 40 and is connected with the heat dissipation tin paste 2, and the heat conducted by the heat dissipation tin paste 2 is led out from the plurality of through holes 40, so that the blocking tin paste 3, the melting of the tin paste 2 and the through holes 40 of the PCB 4 are fully utilized to melt the chip at the same time when the heat dissipation tin paste 2 passes through the through holes 4 at high temperature40 flow to the bonding pad to cause short circuit of the bonding pad, and stability of electrical performance of the product is improved. In a further embodiment, a chip packaging method includes: setting the SMT bushing plate 1 as a stepped SMT bushing plate 1; the SMT bushing plate 1 is provided with a first mesh 10, a second mesh 10, a third mesh 10 and a fourth mesh 10, the four meshes 10 are square meshes 10, the four meshes 10 are arranged in two rows and two columns, the length of the square meshes 10 is 1.95mm, the width is 1.95mm, the depth of the meshes 10 is 0.12mm, and the total tin amount of the plugging tin paste 3 and the heat dissipation tin paste 2 is 1.825mm 3 Thereby improving the heat dissipation performance of the chip. Further, the mesh 10 depth was 0.13mm, and the total solder paste amount was reduced to 1.68mm 3 And the back of the PCB is printed with solder paste, so that the solder paste can plug the through holes 40 of the PCB in advance to form the plugging solder paste 3, thereby avoiding the generation of solder balls.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present utility model, and not for limiting the same; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the utility model.

Claims (10)

1. A package structure of a chip, comprising:
the SMT bushing plate is used for mounting the PCB; the PCB comprises a plurality of through holes, chips are mounted above the through holes, the SMT bushing comprises a plurality of meshes, and when the SMT bushing is mounted with the PCB, the positions of the meshes correspond to the through holes; the number of the plurality of meshes is set according to the shape and the area of the substrate of the chip so that the plurality of through holes uniformly cover the substrate of the chip;
the radiating solder paste fills the meshes, connects the substrate of the chip and the PCB, and conducts heat of the chip to the PCB;
and plugging the solder paste, filling the plurality of through holes, connecting with the heat dissipation solder paste, and leading out the heat conducted by the heat dissipation solder paste from the plurality of through holes.
2. The package structure of a chip of claim 1, wherein the plurality of meshes includes a first mesh, a second mesh, a third mesh, and a fourth mesh; the first mesh and the second mesh are arranged side by side, and the third mesh and the fourth mesh are arranged side by side; the first mesh, the second mesh, the third mesh, and the fourth mesh are arranged in two rows and two columns.
3. The package structure of claim 2, wherein the first mesh is a square mesh, and the square mesh has equal or unequal length and width.
4. The package structure of claim 3, wherein the second mesh, the third mesh, and the fourth mesh are square meshes.
5. The package structure of the chip according to claim 4, wherein the square mesh has a length of 2mm, a width of 2mm, and a mesh depth of 0.1 mm.
6. The package structure of a chip according to claim 2, wherein the first mesh is a circular mesh having a diameter of 2mm and a mesh depth of 0.1 mm.
7. The package structure of claim 6, wherein the second mesh, the third mesh, and the fourth mesh are circular meshes.
8. The package structure of claim 2, wherein any one of the first, second, third and fourth meshes has a square mesh shape and the others have a circular mesh shape.
9. The package structure of claim 2, wherein any two of the first, second, third, and fourth meshes are square in shape and the others are circular in shape.
10. The package structure of any one of claims 1-9, wherein a total tin amount of the plugging and heat dissipating pastes is 1.825mm 3
CN202222930115.3U 2022-11-03 2022-11-03 Packaging structure of chip Active CN219553617U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222930115.3U CN219553617U (en) 2022-11-03 2022-11-03 Packaging structure of chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222930115.3U CN219553617U (en) 2022-11-03 2022-11-03 Packaging structure of chip

Publications (1)

Publication Number Publication Date
CN219553617U true CN219553617U (en) 2023-08-18

Family

ID=87730323

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202222930115.3U Active CN219553617U (en) 2022-11-03 2022-11-03 Packaging structure of chip

Country Status (1)

Country Link
CN (1) CN219553617U (en)

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