CN111372393A - QFN element mounting method for reducing welding voidage - Google Patents
QFN element mounting method for reducing welding voidage Download PDFInfo
- Publication number
- CN111372393A CN111372393A CN202010243688.1A CN202010243688A CN111372393A CN 111372393 A CN111372393 A CN 111372393A CN 202010243688 A CN202010243688 A CN 202010243688A CN 111372393 A CN111372393 A CN 111372393A
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- China
- Prior art keywords
- qfn
- preformed
- sheet
- welding
- voidage
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention discloses a QFN element mounting method for reducing welding voidage, which comprises the steps of selecting a plurality of dots in a PCB grounding pad area, printing solder paste on each dot, bonding a preformed solder sheet on the printed solder paste, mounting a heat conduction pad on the bottom surface of a QFN element on the upper surface of the preformed solder sheet, and then performing reflow welding. The preformed tin sheet does not contain soldering flux. The QFN element is mounted by using a chip mounter, the conductive bonding pads on the periphery of the QFN element are attached to the corresponding contact electrodes of the PCB, and the heat conductive bonding pads on the bottom surface of the QFN element are correspondingly attached to the upper surface of the preformed tin sheet. The invention uses the preformed tin sheet without soldering flux to replace the original lead-free tin paste, and uses a full-automatic chip mounter to paste the preformed tin sheet in advance and then paste QFN elements, thereby reducing the voidage of material welding and reducing the voidage to below 30%.
Description
Technical Field
The invention relates to the field of chip mounting packaging of electronic components, in particular to a QFN element chip mounting method for reducing the welding voidage.
Background
QFN is a leadless package, square or rectangular, with a large area of exposed pads at the center of the bottom of the package for heat conduction, and conductive pads surrounding the large pads around the periphery of the package for electrical connection. QFN packages provide excellent electrical performance because they do not have gull-wing leads as do conventional SOIC and TSOP packages, the electrical path between the inner leads and the pads is short, the self-inductance, and the wiring resistance within the package is low. In addition, it provides excellent heat dissipation through the exposed leadframe pad, which has a direct heat dissipation path for dissipating heat within the package. Heat sink pads are typically soldered directly to the circuit board and heat sink vias in the PCB help to spread excess power dissipation into the copper ground plate, thereby absorbing excess heat.
The existing QFN element mounting mode is to print lead-free solder paste by using a full-automatic printer and mount a QFN element by using a full-automatic chip mounter, and finally activate the solder paste by using a full-automatic reflow soldering temperature control machine. As shown in fig. 1, a first solder paste 2 and a second solder paste 3 are printed on a ground pad area and a peripheral contact electrode of a PCB board 1, respectively, and a heat conductive pad on the bottom surface of a QFN element 4 is attached to the upper surface of the first solder paste 2, followed by reflow soldering.
The prior art has the following defects:
a. the heat dissipation of the gold-plated layer with a large area around the material piece is fast, and other elements absorb more heat, so that the soldering flux cannot be fully volatilized;
b. the materials are hollow structures, the heat conduction is insufficient, and the soldering flux can not be fully volatilized
c. The PCB substrate contains the low-temperature ceramic chip, which can not ensure that higher temperature is provided under the condition that the ceramic chip is not damaged so as to fully volatilize the soldering flux.
Disclosure of Invention
The invention aims to: a QFN element mounting method for reducing welding voidage is provided.
The technical scheme of the invention is as follows:
a QFN element chip mounting method for reducing welding voidage is characterized in that a plurality of dots are selected in a PCB grounding pad area, solder paste is printed on each dot, preformed solder slices are bonded on the printed solder paste, a heat conduction pad on the bottom surface of a QFN element is attached to the upper surface of each preformed solder slice, and then reflow welding is carried out.
Preferably, the preformed tin sheet is free of flux.
Preferably, the preformed solder sheet is attached to the printed solder paste of the PCB ground pad by using a mounter.
Preferably, the QFN element is mounted by a mounter, the conductive pads on the periphery of the QFN element are attached to the corresponding contact electrodes of the PCB, and the conductive pads on the bottom surface of the QFN element are correspondingly attached to the upper surface of the preformed tin sheet.
Preferably, the number of the dots is four, and the four dots are diagonally distributed in the rectangular PCB ground pad area.
Preferably, after reflow soldering, the void ratio between the heat conducting bonding pad of the QFN element and the area of the PCB grounding bonding pad is detected by using X-ray.
The invention has the advantages that:
the invention uses the preformed tin sheet without soldering flux to replace the original lead-free tin paste, and uses a full-automatic chip mounter to paste the preformed tin sheet in advance and then paste QFN elements, thereby reducing the voidage of material welding and reducing the voidage to below 30%.
Drawings
The invention is further described with reference to the following figures and examples:
FIG. 1 is a schematic diagram of a conventional QFN element patch;
fig. 2 is a schematic diagram of a QFN element patch of the present invention.
Detailed Description
As shown in fig. 2, in the QFN component mounting method for reducing the welding void ratio of the present invention, four dots are selected in the ground pad area of the PCB 1, and the four dots are diagonally distributed in the rectangular PCB ground pad area. The first solder paste 2 is printed on each dot, and the second solder paste 3 is printed on the contact electrodes on the periphery. A preformed tin sheet 5 is bonded on the first printing tin paste 2, and a heat conduction pad on the bottom surface of the QFN element 4 is attached to the upper surface of the preformed tin sheet 5 and then reflow-welded.
The preformed tin sheet does not contain soldering flux, the preformed tin sheet is attached to printing tin paste of a PCB grounding bonding pad by using a chip mounter, the QFN element is attached by using the chip mounter, the conductive bonding pads on the periphery of the QFN element are attached to the corresponding contact electrodes of the PCB, and the heat conductive bonding pads on the bottom surface of the QFN element are correspondingly attached to the upper surface of the preformed tin sheet.
And after reflow soldering, detecting the void ratio between the heat conducting bonding pad of the QFN element and the area of the PCB grounding bonding pad by adopting X-ray.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and the purpose of the embodiments is to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the protection scope of the present invention. All modifications made according to the spirit of the main technical scheme of the invention are covered in the protection scope of the invention.
Claims (6)
1. A QFN element mounting method for reducing welding voidage is characterized by comprising the following steps: selecting a plurality of dots in the PCB grounding pad area, printing solder paste on each dot, bonding a preformed solder sheet on the printed solder paste, attaching a heat conduction pad on the bottom surface of the QFN element to the upper surface of the preformed solder sheet, and then performing reflow soldering.
2. The method for mounting QFN elements, which can reduce the welding voidage, according to claim 1, wherein: the preformed tin sheet does not contain soldering flux.
3. The method for mounting QFN elements, which can reduce the welding void ratio, according to claim 2, wherein: and the preformed tin sheet is pasted on the printing tin paste of the PCB grounding bonding pad by using a chip mounter.
4. The method for mounting QFN elements, which can reduce the welding void ratio, according to claim 3, wherein: the QFN element is mounted by using a chip mounter, the conductive bonding pads on the periphery of the QFN element are attached to the corresponding contact electrodes of the PCB, and the heat conductive bonding pads on the bottom surface of the QFN element are correspondingly attached to the upper surface of the preformed tin sheet.
5. The method for mounting QFN elements, which can reduce the welding voidage, according to claim 1, wherein: the number of the circular dots is four, and the four circular dots are distributed diagonally in the rectangular PCB grounding pad area.
6. The method for mounting QFN elements, which can reduce the welding voidage, according to claim 1, wherein: and after reflow soldering, detecting the void ratio between the heat conducting bonding pad of the QFN element and the area of the PCB grounding bonding pad by adopting X-ray.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202010243688.1A CN111372393A (en) | 2020-03-31 | 2020-03-31 | QFN element mounting method for reducing welding voidage |
Applications Claiming Priority (1)
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CN202010243688.1A CN111372393A (en) | 2020-03-31 | 2020-03-31 | QFN element mounting method for reducing welding voidage |
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CN111372393A true CN111372393A (en) | 2020-07-03 |
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CN202010243688.1A Pending CN111372393A (en) | 2020-03-31 | 2020-03-31 | QFN element mounting method for reducing welding voidage |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112135419A (en) * | 2020-10-15 | 2020-12-25 | 苏州浪潮智能科技有限公司 | Method for improving poor bubbles of QFN bottom bonding pad and bonding pad |
CN112235964A (en) * | 2020-10-15 | 2021-01-15 | 江苏新安电器股份有限公司 | Welding method of BTC element |
CN114423180A (en) * | 2022-02-18 | 2022-04-29 | 北京柏瑞安电子技术有限公司 | QFN lead-free low-voidage welding method |
-
2020
- 2020-03-31 CN CN202010243688.1A patent/CN111372393A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112135419A (en) * | 2020-10-15 | 2020-12-25 | 苏州浪潮智能科技有限公司 | Method for improving poor bubbles of QFN bottom bonding pad and bonding pad |
CN112235964A (en) * | 2020-10-15 | 2021-01-15 | 江苏新安电器股份有限公司 | Welding method of BTC element |
CN114423180A (en) * | 2022-02-18 | 2022-04-29 | 北京柏瑞安电子技术有限公司 | QFN lead-free low-voidage welding method |
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