CN217822752U - Integrated circuit packaging structure for multi-chip packaging - Google Patents

Integrated circuit packaging structure for multi-chip packaging Download PDF

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Publication number
CN217822752U
CN217822752U CN202221268209.2U CN202221268209U CN217822752U CN 217822752 U CN217822752 U CN 217822752U CN 202221268209 U CN202221268209 U CN 202221268209U CN 217822752 U CN217822752 U CN 217822752U
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fixedly connected
mounting mechanism
mounting
installation mechanism
integrated circuit
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朱文锋
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Shenzhen Sanliansheng Technology Co ltd
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Shenzhen Sanliansheng Technology Co ltd
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Abstract

The utility model discloses an integrated circuit packaging structure of multi-chip package, including the encapsulation base plate, the first installation mechanism of upper end right part fixedly connected with of encapsulation base plate, the upper end left part fixedly connected with second installation mechanism of first installation mechanism, the upper end left part fixedly connected with third installation mechanism of second installation mechanism, the upper end left part fixedly connected with fourth installation mechanism of third installation mechanism, and all install semiconductor chip in fourth installation mechanism, third installation mechanism, second installation mechanism and the first installation mechanism, install the encapsulation cover jointly between the upper end periphery of encapsulation base plate, the lower extreme of encapsulation base plate alternates fixedly connected with heat dissipation mechanism. A multi-chip package's integrated circuit packaging structure, through setting up installation mechanism, can install a plurality of chips simultaneously, be convenient for carry out the dismouting to the chip, through setting up heat dissipation mechanism, strengthen the radiating effect of chip, improve the radiating efficiency, be fit for extensively using.

Description

Integrated circuit packaging structure for multi-chip packaging
Technical Field
The utility model relates to a chip package technical field, in particular to integrated circuit packaging structure of multi-chip package.
Background
The chip package is the shell for installing the semiconductor integrated circuit chip, and has the functions of placing, fixing, sealing, protecting the chip and enhancing the electrothermal performance, the chip package is a bridge for communicating the internal world of the chip with an external circuit, the connection point of the chip is connected to the pin of the package shell by a lead wire, the pin is connected with other devices by the lead wire on a printed board, the package plays an important role in CPU and other LSI integrated circuits, and at least the following defects exist in the using process of the existing package structure: 1. the existing packaging structures integrate a plurality of chips on the same plane, but the packaging mode occupies larger space, reduces the space utilization rate and also reduces the practicability; 2. the existing packaging structure has poor heat dissipation effect, and the heat generated in the device is large due to the packaging of a plurality of chips, so that the quick heat dissipation is difficult, and the service life of the chips is influenced.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide an integrated circuit package structure with multiple chips, which can effectively solve the problems of the prior art.
In order to achieve the above purpose, the utility model adopts the technical proposal that:
the utility model provides an integrated circuit packaging structure of multi-chip package, includes the packaging substrate, the first installation mechanism of the upper end right part fixedly connected with of packaging substrate, the upper end left part fixedly connected with second installation mechanism of first installation mechanism, the upper end left part fixedly connected with third installation mechanism of second installation mechanism, the upper end left part fixedly connected with fourth installation mechanism of third installation mechanism, and all install semiconductor chip in fourth installation mechanism, third installation mechanism, second installation mechanism and the first installation mechanism, install the encapsulation cover jointly between the upper end periphery of packaging substrate, the lower extreme of packaging substrate alternates fixedly connected with heat dissipation mechanism.
Preferably, first installation mechanism includes the mounting bracket, the upper ledge wall fixedly connected with fixed establishment of mounting bracket, spacing groove has all been opened to the left side wall front portion and the left side wall rear portion of mounting bracket, the lower extreme of mounting bracket and encapsulation substrate's upper end fixed connection.
Preferably, the fixed establishment includes the fixed plate, a plurality of spring of upper end middle part fixedly connected with of fixed plate, the insulating pad of lower extreme fixedly connected with of fixed plate, the left end front portion and the equal fixedly connected with stopper in left end rear portion of fixed plate, and two stoppers respectively with two corresponding spacing groove sliding connection, a plurality of the upper end of spring all with the upper ledge wall fixed connection of mounting bracket.
Preferably, heat dissipation mechanism includes the heating panel, the upper end middle part of heating panel alternates a plurality of ventilation pipes of fixedly connected with, and the upper end of a plurality of ventilation pipes all run through packaging substrate's lower extreme and alternate fixed connection with the lower extreme of four corresponding mounting brackets, the lower extreme fixedly connected with a plurality of fin of heating panel, a plurality of the left end of fin and the equal fixedly connected with a plurality of heat dissipation granule of right-hand member, open at the front end middle part of heating panel has a plurality of louvres, the upper end of heating panel and packaging substrate's lower extreme fixed connection.
Preferably, the length of the upper frame wall of the mounting frame is less than the length of the lower frame wall of the mounting frame, and the structure of the first mounting mechanism is consistent with the structure of the second mounting mechanism, the structure of the third mounting mechanism, and the structure of the fourth mounting mechanism.
Preferably, the ventilation pipes are respectively communicated with the corresponding heat dissipation holes, and the lower end faces of the ventilation pipes are flush with the lower end face of the heat dissipation plate.
Compared with the prior art, the utility model discloses following beneficial effect has:
1. in the utility model, the fixing plate is pushed to move downwards through the elasticity of the spring by arranging the mounting mechanism, and then the fixing plate is limited by the limiting block, so that the chip can be clamped and fixed by the fixing plate, the chip can be mounted, and a plurality of chips can be stacked and packaged through the arrangement of a plurality of mounting frames, thereby reducing the occupied space of the chip and effectively improving the space utilization rate;
2. the utility model discloses in, through setting up heat dissipation mechanism, can derive the heat that a plurality of chips produced through a plurality of ventilation pipes, then through with the communicating louvre of ventilation pipe, can accelerate thermal effluvium, strengthened the radiating effect to the chip, the effectual radiating efficiency that has improved of rethread fin and heat dissipation of radiating particle has also prolonged the life of chip.
Drawings
FIG. 1 is a schematic diagram of an overall structure of a multi-chip packaged integrated circuit package structure according to the present invention;
FIG. 2 is a schematic diagram of an overall structure of a first mounting mechanism of a multi-chip packaged integrated circuit package structure according to the present invention;
FIG. 3 is a schematic view of the overall structure of a fixing mechanism of a multi-chip packaged IC package structure according to the present invention;
fig. 4 is a schematic diagram of the overall structure of the heat dissipation mechanism of the multi-chip packaged integrated circuit package structure of the present invention.
In the figure: 1. a package substrate; 2. a first mounting mechanism; 3. a second mounting mechanism; 4. a third mounting mechanism; 5. a fourth mounting mechanism; 6. a semiconductor chip; 7. a package cover; 8. a heat dissipation mechanism; 21. a mounting frame; 22. a fixing mechanism; 23. a limiting groove; 221. a fixing plate; 222. a spring; 223. an insulating pad; 224. a limiting block; 81. a heat dissipation plate; 82. a vent pipe; 83. a heat sink; 84. heat dissipating particles; 85. and (4) heat dissipation holes.
Detailed Description
In order to make the technical means, creation features, achievement purposes and functions of the present invention easy to understand, the present invention is further described below with reference to the following embodiments.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "both ends", "one end", "the other end" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element to which the reference is made must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "provided," "connected," and the like are to be construed broadly, such as "connected," which may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Examples
Referring to fig. 1-4, the present invention provides a technical solution:
the utility model provides an integrated circuit packaging structure of multi-chip package, including packaging substrate 1, packaging substrate 1's the first installation mechanism 2 of upper end right part fixedly connected with, the upper end left part fixedly connected with second installation mechanism 3 of first installation mechanism 2, the upper end left part fixedly connected with third installation mechanism 4 of second installation mechanism 3, the upper end left part fixedly connected with fourth installation mechanism 5 of third installation mechanism 4, and fourth installation mechanism 5, third installation mechanism 4, all install semiconductor chip 6 in second installation mechanism 3 and the first installation mechanism 2, install encapsulation cover 7 between packaging substrate 1's the upper end periphery jointly, packaging substrate 1's lower extreme interlude fixedly connected with heat dissipation mechanism 8.
In this embodiment, the first mounting mechanism 2 includes a mounting frame 21, a fixing mechanism 22 is fixedly connected to an upper frame wall of the mounting frame 21, limiting grooves 23 are respectively formed in a front portion of a left frame wall and a rear portion of the left frame wall of the mounting frame 21, and a lower end of the mounting frame 21 is fixedly connected to an upper end of the package substrate 1; the fixing mechanism 22 comprises a fixing plate 221, the middle part of the upper end of the fixing plate 221 is fixedly connected with a plurality of springs 222, the lower end of the fixing plate 221 is fixedly connected with an insulating pad 223, the front part and the rear part of the left end of the fixing plate 221 are fixedly connected with limit blocks 224, the two limit blocks 224 are respectively connected with the two corresponding limit grooves 23 in a sliding manner, and the upper ends of the plurality of springs 222 are fixedly connected with the upper frame wall of the mounting frame 21; the length of the upper frame wall of the mounting frame 21 is smaller than that of the lower frame wall, so that the right sides of the upper ends of the plurality of semiconductor chips 6 can be leaked, the semiconductor chips 6 can be conveniently conducted and wired, the structure of the first mounting mechanism 2 is consistent with that of the second mounting mechanism 3, that of the third mounting mechanism 4 and that of the fourth mounting mechanism 5, the plurality of semiconductor chips 6 can be conveniently mounted and fixed, and the plurality of semiconductor chips 6 can be conveniently packaged.
In this embodiment, the heat dissipation mechanism 8 includes a heat dissipation plate 81, the middle of the upper end of the heat dissipation plate 81 is fixedly connected with a plurality of ventilation pipes 82 in an inserting manner, the upper ends of the plurality of ventilation pipes 82 all penetrate the lower end of the package substrate 1 and fixedly connected with the lower ends of the corresponding four mounting brackets 21 in an inserting manner, the lower end of the heat dissipation plate 81 is fixedly connected with a plurality of heat dissipation fins 83, the left ends and the right ends of the plurality of heat dissipation fins 83 are fixedly connected with a plurality of heat dissipation particles 84, the middle of the front end of the heat dissipation plate 81 is provided with a plurality of heat dissipation holes 85, and the upper end of the heat dissipation plate 81 is fixedly connected with the lower end of the package substrate 1; the plurality of ventilation pipes 82 are respectively communicated with the plurality of corresponding heat dissipation holes 85, heat in the ventilation pipes 82 can be transferred to the heat dissipation plate 81 through the heat dissipation holes 85, so that the heat dissipation speed can be enhanced, and the lower end faces of the plurality of ventilation pipes 82 are flush with the lower end face of the heat dissipation plate 81, thereby being beneficial to ventilation and heat dissipation of the semiconductor chip 6.
It should be noted that, the utility model relates to an integrated circuit packaging structure of multi-chip package, in the use, at first will treat the semiconductor chip 6 of encapsulation and place in mounting bracket 21, then promote fixed plate 221 downwards through the elasticity of spring 222, and it is spacing to slide in spacing groove 23 through stopper 224, can make fixed plate 221 stable carry out the centre gripping fixed to semiconductor chip 6, can install semiconductor chip 6 fixed in mounting bracket 21, and setting through a plurality of mounting brackets 21, can carry out range upon range of installation to a plurality of semiconductor chip 6, can realize the encapsulation to a plurality of chips, thereby semiconductor chip 6's occupation space has been reduced, the effectual utilization ratio to the space that has improved, the practicality has also been improved, again install encapsulation cover 7 on packaging substrate 1, can encapsulate a plurality of semiconductor chip 6, when semiconductor chip 6 works and produces the heat, through a plurality of communicating ventilation pipe 82 with mounting bracket 21, can derive the heat that a plurality of semiconductor chip 6 produced, then through communicating a plurality of communicating strips 85 with a plurality of roots of louvres, can be with the leading-in heat to 81, thereby the effectual radiating fin heat radiation effect of heat-emitting chip is prolonged a plurality of heat radiation and has also improved a plurality of radiating fin's radiating efficiency, the effectual radiating particle is reached, a plurality of radiating efficiency, a plurality of radiating fin's heat radiating effect is prolonged, a plurality of radiating fin's heat is also, a plurality of radiating fin's heat is prolonged, radiating efficiency is prolonged, a plurality of radiating chip 6.
The foregoing shows and describes the basic principles and principal features of the invention, together with the advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the above embodiments, and that the foregoing embodiments and descriptions are provided only to illustrate the principles of the present invention without departing from the spirit and scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (6)

1. An integrated circuit packaging structure of multi-chip package, includes package substrate (1), its characterized in that: the packaging substrate comprises a packaging substrate (1), wherein the packaging substrate comprises a first mounting mechanism (2) fixedly connected to the upper right part of the packaging substrate (1), a second mounting mechanism (3) fixedly connected to the upper left part of the first mounting mechanism (2), a third mounting mechanism (4) fixedly connected to the upper left part of the second mounting mechanism (3), a fourth mounting mechanism (5) fixedly connected to the upper left part of the third mounting mechanism (4), and semiconductor chips (6) are mounted in the fourth mounting mechanism (5), the third mounting mechanism (4), the second mounting mechanism (3) and the first mounting mechanism (2), a packaging cover (7) is mounted between the peripheries of the upper end of the packaging substrate (1) together, and a heat dissipation mechanism (8) fixedly connected to the lower end of the packaging substrate (1) alternates.
2. The multi-chip packaged integrated circuit package structure of claim 1, wherein: first installation mechanism (2) include mounting bracket (21), the last frame wall fixedly connected with fixed establishment (22) of mounting bracket (21), spacing groove (23) have all been opened to the left frame wall front portion and the left frame wall rear portion of mounting bracket (21), the lower extreme of mounting bracket (21) and the upper end fixed connection of packaging substrate (1).
3. The multi-chip packaged integrated circuit package structure of claim 2, wherein: fixed establishment (22) are including fixed plate (221), a plurality of spring (222) of the upper end middle part fixedly connected with of fixed plate (221), the insulating pad of lower extreme fixedly connected with (223) of fixed plate (221), the equal fixedly connected with stopper (224) in left end front portion and the left end rear portion of fixed plate (221), and two stopper (224) respectively with two corresponding spacing groove (23) sliding connection, a plurality of the upper end of spring (222) all with the last frame wall fixed connection of mounting bracket (21).
4. The multi-chip packaged integrated circuit package structure of claim 1, wherein: radiating mechanism (8) are including heating panel (81), a plurality of ventilation pipes of fixedly connected with (82) alternate in the upper end middle part of heating panel (81), and the upper end of a plurality of ventilation pipes (82) all run through the lower extreme of packaging substrate (1) and alternate fixed connection with the lower extreme of corresponding four mounting brackets (21), a plurality of fin of lower extreme fixedly connected with (83) of heating panel (81), a plurality of the left end and the equal fixedly connected with a plurality of heat dissipation granule (84) of right-hand member of fin (83), open at the front end middle part of heating panel (81) has a plurality of louvre (85), the upper end of heating panel (81) and the lower extreme fixed connection of packaging substrate (1).
5. The multi-chip packaged integrated circuit package structure of claim 3, wherein: the length of the upper frame wall of the mounting frame (21) is smaller than that of the lower frame wall of the mounting frame, and the structure of the first mounting mechanism (2) is consistent with that of the second mounting mechanism (3), that of the third mounting mechanism (4) and that of the fourth mounting mechanism (5).
6. The multi-chip packaged integrated circuit package structure of claim 4, wherein: the plurality of ventilation pipes (82) are respectively communicated with the corresponding plurality of heat dissipation holes (85), and the lower end surfaces of the plurality of ventilation pipes (82) are flush with the lower end surface of the heat dissipation plate (81).
CN202221268209.2U 2022-05-24 2022-05-24 Integrated circuit packaging structure for multi-chip packaging Active CN217822752U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221268209.2U CN217822752U (en) 2022-05-24 2022-05-24 Integrated circuit packaging structure for multi-chip packaging

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221268209.2U CN217822752U (en) 2022-05-24 2022-05-24 Integrated circuit packaging structure for multi-chip packaging

Publications (1)

Publication Number Publication Date
CN217822752U true CN217822752U (en) 2022-11-15

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ID=83985312

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221268209.2U Active CN217822752U (en) 2022-05-24 2022-05-24 Integrated circuit packaging structure for multi-chip packaging

Country Status (1)

Country Link
CN (1) CN217822752U (en)

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