CN214627497U - Buried resistance metal foil - Google Patents

Abstract

The utility model relates to a printed board technical field discloses a bury and hinder metal forming, it includes the barrier layer and buries and hinder the metal forming body, it includes resistance layer and conducting layer to bury and hinder the metal forming body, the barrier layer is located the resistance layer with between the conducting layer, the conducting layer is plated and is located the barrier layer and keep away from in the one side of resistance layer, the resistance tolerance in the unit area of predetermineeing of arbitrary department on the resistance layer is at-10% ~ 10% within range. The barrier layer is arranged between the resistance layer and the conducting layer, so that the resistance layer can be protected, when the buried resistance metal foil is etched to form a resistance circuit, the conducting layer forms a conducting end, and the barrier layer between the resistance layer and the conducting layer protects the resistance layer and prevents the resistance layer from being directly exposed outside.

Description

Buried resistance metal foil

Technical Field

The utility model relates to a printing board technical field especially relates to a bury and hinder metal forming.

Background

With the development trend of miniaturization of electronic products, higher requirements are put on the packaging density and the volume of the electronic products, and embedding passive devices such as resistors into a printed board is an effective means for reducing the size of the electronic products.

At present, the existing printed board with the buried resistor generally comprises a resistor layer and a copper foil layer; the copper foil layer is directly made of finished copper foil, and the copper foil is usually pressed with the resistance layer, so that the printed board with the buried resistance is manufactured. When the buried metal foil is etched to form the resistance circuit, the conductive layer forms a conductive end, and the resistance layer is directly exposed outside, so that the resistance layer is easily damaged.

SUMMERY OF THE UTILITY MODEL

An object of the embodiment of the utility model is to provide a bury hinders foil, it can the protective resistance layer.

In order to solve the technical problem, an embodiment of the utility model provides a bury and hinder metal forming, include the barrier layer and bury and hinder the metal forming body, it includes resistance layer and conducting layer to bury and hinder the metal forming body, the barrier layer is located the resistance layer with between the conducting layer, the conducting layer is plated and is located the barrier layer and keep away from on the one side of resistance layer, the resistance tolerance in the unit area is predetermine to arbitrary department on the resistance layer is at-10% ~ 10% within range.

Preferably, the buried resistance metal foil further comprises a plurality of conductive bumps;

the conductive bumps are distributed on one surface, close to the barrier layer, of the resistance layer or one surface, close to the barrier layer, of the conductive layer at intervals.

Preferably, the conductive bumps are distributed on one surface of the conductive layer close to the barrier layer at intervals, and one ends of the conductive bumps, which are far away from the conductive layer, extend out of the barrier layer and are in contact with the resistance layer.

Preferably, the plurality of conductive protrusions are first metal particles and/or particle clusters composed of a plurality of second metal particles.

Preferably, the buried resistance metal foil further comprises a dielectric layer, and the dielectric layer is arranged on one surface of the barrier layer, which is far away from the resistance layer.

Preferably, the barrier layer comprises a high temperature resistant layer and a metal bonding layer which are stacked;

the metal bonding layer is arranged between the high temperature resistant layer and the resistance layer.

Preferably, the high temperature resistant layer is an organic high temperature resistant layer; or the like, or, alternatively,

the refractory layer comprises any one or more of tungsten, chromium, zirconium, titanium, nickel, molybdenum, cobalt and graphite.

Preferably, the high temperature resistant layer has a single-layer alloy structure, a multilayer structure composed of a single metal layer, or a multilayer structure composed of an alloy layer and a single metal layer.

Preferably, the metallic bonding layer comprises any one or more of copper, zinc, nickel, iron and manganese.

Preferably, the thickness of the conductive layer is 2 to 20 micrometers.

Preferably, the conductive layer comprises any one or more of aluminum, silver, copper and gold.

Preferably, the conductivity of the conductive layer is 2 to 1000 times that of the resistive layer.

Preferably, the resistive layer includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium and silicon.

Compared with the prior art, the embodiment of the utility model provides a bury and hinder the foil includes dielectric layer, barrier layer and buries and hinder the foil body, bury and hinder the foil body and include resistance layer and conducting layer, the barrier layer is located the resistance layer with between the conducting layer, the conducting layer is plated and is located the barrier layer and keep away from on the one side of resistance layer, the resistance tolerance in the unit area of predetermineeing of arbitrary department on the resistance layer is at-10% ~ 10% within range. The barrier layer is arranged between the resistance layer and the conducting layer, so that the resistance layer can be protected, when the buried resistance metal foil is etched to form a resistance circuit, the conducting layer is etched to form a conducting end, and the barrier layer between the resistance layer and the conducting layer protects the resistance layer, so that the resistance layer is prevented from being directly exposed outside and damaged. And the barrier layer is arranged and the conductive layer is plated on one surface of the barrier layer far away from the resistance layer, so that the embedded resistance metal foil is formed without adopting a mode of pressing a finished copper foil and the resistance layer, the problem that in the prior art, the resistance value of the resistance layer in each direction is different due to the fact that the roughness of the surface of the resistance layer is not uniform because the copper foil with non-uniform surface roughness is directly pressed with the resistance layer is effectively solved, the difference of the resistance value of the resistance layer in each direction in unit area is reduced, and the high-precision embedded resistance is convenient to design.

Drawings

Fig. 1 is a schematic structural diagram of a buried resistance metal foil according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a buried resistance metal foil with a dielectric layer according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of another embodiment of a buried barrier metal foil with a dielectric layer according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of a buried resistance metal foil including conductive bumps according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a buried resistance metal foil according to a second embodiment of the present invention;

fig. 6 is a schematic structural diagram of a buried resistance metal foil according to a third embodiment of the present invention;

fig. 7 is a schematic flow chart of a method for manufacturing a buried resistance metal foil according to a fourth embodiment of the present invention.

Wherein, 1, a dielectric layer; 11. a carrier layer; 2. a barrier layer; 21. a high temperature resistant layer; 22. a metal bonding layer; 31. a resistive layer; 32. a conductive layer; 4. a glue layer; 5. a second barrier layer; 6. and a conductive bump.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Example one

Referring to fig. 1, a schematic structural diagram of a buried resistance metal foil according to an embodiment of the present invention is shown.

In the embodiment of the present invention, bury and hinder the metal forming and include barrier layer 2 and bury and hinder the metal forming and include resistance layer 31 and conducting layer 32, barrier layer 2 is located resistance layer 31 with between the conducting layer 32, the conducting layer 32 plates and locates barrier layer 2 keeps away from on the one side of resistance layer 31, resistance tolerance in the predetermined unit area of arbitrary department on the resistance layer 31 is at-10% ~ 10% within range.

The embodiment of the utility model provides a through set up barrier layer 2 between resistive layer 31 and conducting layer 32, can play the guard action to resistive layer 31, form the resistance circuit when burying the etching of hindering the metal forming, conducting layer 32 etching forms the electrically conductive end, and barrier layer 2 between resistive layer 31 and the conducting layer 32 is protective resistance layer 31 then, avoids resistive layer 31 directly to expose outside. Furthermore, the embodiment of the utility model provides a through setting up barrier layer 2 and inciting somebody to action conducting layer 32 plates and locates barrier layer 2 is kept away from in the one side of resistance layer 31 for need not to adopt off-the-shelf copper foil to form with the mode of resistance layer looks pressfitting and bury and hinder the metal foil, consequently avoided effectively among the prior art because the inhomogeneous copper foil of roughness directly leads to resistance layer surface roughness inhomogeneous with the resistance layer looks pressfitting, and then cause the problem that the resistance of the unit area of resistance layer all directions is different, thereby the difference of the resistance value of the unit area on the all directions of resistance layer 31 has been reduced, and then be convenient for design the buried resistor of high accuracy.

In the embodiment of the present invention, the resistance tolerance of any one position on the resistance layer 31 in the preset unit area is in the range of-10% to 10%. The preset unit area may be, for example, 1cm by 1cm, and of course, other unit areas may be selected according to actual requirements. The resistance tolerance calculation formula includes obtaining resistance values (R1, R2, R3, … … Rn) of preset unit areas at a plurality of different positions, calculating an average value Rv of the plurality of resistance values, where Rv is (R1+ R2+ R3+ … … + Rn)/n, calculating a difference between each resistance value and the average value, dividing the difference by the average value, and performing percentage calculation to obtain the resistance tolerance, that is, D1 { (R1-Rv)/Rv }%, D2 { (R2-Rv)/Rv }%, … …, D1, and D2 respectively represent resistance tolerances corresponding to the resistance values at the different positions, and D1 and D2 both fall within a range of-10% to + 10%. The range of the resistance tolerance indicates that the resistance tolerance of the resistance value in each preset unit area falls within the range. Preferably, the resistance tolerance in a preset unit area at any position on the resistance layer 31 is in the range of-7% to + 7%, and more preferably, the resistance tolerance is in the range of-5% to + 5%, so as to design a buried resistor with high precision.

Referring to fig. 2, in an alternative embodiment, the buried barrier metal foil further includes a dielectric layer 1, and the dielectric layer 1 is disposed on a surface of the resistive layer 31 away from the conductive layer 32. In the embodiment of the present invention, the dielectric layer 1 is preferably, but not limited to, made of Polyimide (PI) or polyethylene terephthalate (PET). In addition, the thickness of the dielectric layer 1 in this embodiment may be set according to actual use requirements, and will not be further described herein. Referring to fig. 3, specifically, the dielectric layer 1 may be formed by a carrier layer 11, and a thin adhesive layer 4 or a peeling layer and a peeling agent coated on the carrier layer 11, where the thickness of the adhesive layer or the peeling layer is 10 angstroms to 100 angstroms, and of course, the thickness of the adhesive layer 4 may also be set to other values according to actual use requirements, which is not described herein. The glue layer 4 is arranged between the dielectric layer 1 and the resistance layer 31, so that the dielectric layer 1 and the resistance layer 31 have good peel strength, namely the dielectric layer 1 is not easy to fall off, and the dielectric layer 1 can be well peeled off from the resistance layer 31 when the embedded resistance metal foil is used subsequently.

Referring to fig. 4, in an alternative embodiment, the buried barrier metal foil further includes a plurality of conductive bumps 6; the conductive bumps 6 are distributed at intervals on one surface of the resistive layer 31 close to the barrier layer 2 or one surface of the conductive layer 32 close to the barrier layer 2. The conductive protrusion 6 is disposed between the conductive layer 32 and the resistive layer 31, on one hand, the conductive protrusion 6 may facilitate the conductive layer 32 and the resistive layer 31 to be electrically connected, and on the other hand, the conductive protrusion 6 may adjust the roughness of the conductive layer 32 or the resistive layer 31 correspondingly.

In the present embodiment, the conductive bump 6 is provided between the conductive layer 32 and the resistive layer 31 mainly in the following 5 cases: (1) the conductive bumps 6 and the barrier layer 2 are consistent in height; (2) the height of the conductive bump 6 is higher than that of the barrier layer 2, and the conductive bump 6 is formed on the resistive layer 31, that is, the conductive bump 6 extends out of the barrier layer and contacts with the conductive layer 32; (3) the height of the conductive bump 6 is higher than that of the barrier layer 2, and the conductive bump 6 is formed on the conductive layer 32, that is, the conductive bump 6 extends out of the barrier layer 2 and contacts with the resistive layer 31; (4) the conductive bump 6 is lower in height than the barrier layer 2, and the conductive bump 6 is formed on the resistive layer 31; (5) the conductive bump 6 is lower in height than the barrier layer 2, and the conductive bump 6 is formed on the conductive layer 32.

Referring to fig. 4, in the above case (3), the conductive protrusions 6 are distributed at intervals on one surface of the conductive layer 32 close to the barrier layer 2, and one end of the conductive protrusions 6 away from the conductive layer 32 extends from the barrier layer 2 and contacts with the resistive layer 31, a height fluctuation is formed between the conductive protrusions 6 and the surface of the barrier layer 2, and the resistive layer 31 is also formed in a curved shape along the conductive protrusions 6 and the barrier layer 2, so that the roughness of the resistive layer 31 is adjusted, that is, the roughness of the resistive layer 31 is increased, thereby increasing the cross-sectional area of the resistive layer 31, and thus increasing the current-carrying capacity of the resistive layer 31 and improving the electrostatic discharge performance of the resistive layer 31. The height H of the conductive bump 6 in this embodiment may be set to other values according to actual use requirements, and will not be further described herein.

It should be noted that, the embodiment of the present invention provides a when electrically conductive protrusion 6 contacts with resistive layer 31, electrically conductive protrusion 6 selects interval distribution, avoids electrically conductive protrusion 6's resistivity to be less than under the circumstances of resistive layer, when electrically conductive protrusion 6 adhesion each other, the electric current circulates to electrically conductive protrusion 6 adhesion and the passageway that forms behind the conductive end that the conducting layer 32 formed, makes resistive layer 31 lose effect, influences the use of resistive layer. In this embodiment, the conductive bumps 6 are distributed on one surface of the resistive layer 31 at intervals, that is, the conductive bumps 6 are not adhered to each other, so that the conductive bumps 6 are not conducted to each other to form a resistor. In addition, in the middle of concrete implementation, because factors such as process error, it is adjacent probably to lead to a plurality of the adhesion of electrically conductive arch 6, nevertheless the influence can not be very big, consequently the utility model discloses easily realize forming interval distribution's electrically conductive arch 6, its technological requirement need not too harsh, is favorable to reduction in production cost.

Specifically, each of the conductive bumps 6 is a first metal particle or a particle cluster composed of a plurality of second metal particles; or a part of the conductive bumps 6 are first metal particles, and another part of the conductive bumps 6 are particle clusters composed of a plurality of second metal particles. The materials of the first metal particles and the second metal particles may be the same or different. The first metal particles are individually granular, the first metal particles are distributed at intervals, and the particle clusters formed by a plurality of second metal particles are also distributed at intervals. When the conductive bump 6 is a particle cluster composed of a plurality of second metal particles, it increases the surface roughness relative to a single first metal particle.

As an alternative embodiment, the first metal particles are of a different material than the barrier layer 2. The first metal particles and the barrier layer 2 are made of different materials and have different resistivities, and when the resistivity of the first metal particles is lower than that of the barrier layer 2, the resistance circuit is formed by the embedded resistance metal foil, and then the influence of the first metal particles on the resistance circuit is smaller. Correspondingly, the second metal particles can also be chosen to be of a different material than the barrier layer 2. The material of both the first metal particles and the second metal particles may be the same or different.

It should be noted that the conductive bumps 6 may be randomly distributed on the resistive layer 31 or the conductive layer 32, and in order to further ensure the connection stability between the barrier layer 2 and the resistive layer 31 or the conductive layer 32, the conductive bumps 6 in this embodiment are uniformly distributed on the resistive layer 31 or the conductive layer 32. The conductive bumps 6 are uniformly distributed on the resistive layer 31 or the conductive layer 32, so that the peel strength of each joint of the barrier layer 2 and the resistive layer 31 or the conductive layer 32 is relatively close, and the stability of the joint between the barrier layer 2 and the resistive layer 31 or the conductive layer 32 is further ensured. In a specific implementation, a plurality of conductive bumps 6 may be formed on the resistive layer 31 or the conductive layer 32 by a conventional process such as an electroplating process, and the conductive bumps 6 are not adhered to each other. Furthermore, the height of the conductive bump 6 is set to be consistent, so that the adhesive force between the barrier layer 2 and the resistor layer 31 or the conductive layer 32 is further improved, and the whole embedded metal foil is more flat. When the conductive bumps 6 are uniformly distributed and the height is set to be uniform, the effect is better when the two aspects are combined.

In the embodiment of the present invention, in order to facilitate the plating of the conductive layer 32 on the surface of the barrier layer 2 away from the resistance layer 31, preferably, the conductive layer 32 of the embodiment is formed on the surface of the barrier layer 2 away from the resistance layer 31 by using any one or more processes of chemical plating, physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, and hybrid plating.

It should be noted that, here, only one specific implementation manner of plating the conductive layer 32 on the surface of the barrier layer 2 away from the resistance layer 31 is adopted, the embodiment of the present invention is not limited to the specific implementation manner of plating the conductive layer 32 on the surface of the barrier layer 2 away from the resistance layer 31, and a person skilled in the art may also plate the conductive layer 32 on the surface of the barrier layer 2 away from the resistance layer 31 in other manners according to specific situations in practical applications.

In the embodiment of the utility model provides an in, the disclosed metallic foil that buries of this embodiment is used for making resistive circuit, wherein conducting layer 32 forms the electrically conductive end through the technology preparation, resistive layer 31 forms resistance through the technology preparation, during the application, can bury earlier and hinder the metallic foil pressfitting on the circuit board, will bury through the technology preparation and hinder the metallic foil and form resistive circuit, perhaps bury earlier and hinder the metallic foil and form resistive circuit, again with resistive circuit pressfitting on the circuit board, the electrically conductive end switches on with electrical part or circuit on the circuit board, electrically conductive end switches on with resistance, make to form the circuit that switches on. The conductivity of the conductive layer 32 is greater than that of the resistive layer 31. Illustratively, the conductivity of the conductive layer 32 is 2 to 1000 times the conductivity of the resistive layer 31. Of course, the conductivity of the conductive layer 32 and the conductivity of the resistive layer 31 can be set according to actual use requirements, and will not be described herein.

In the embodiment of the present invention, the conductive layer 32 in the present embodiment includes any one or more of aluminum, silver, copper, and gold. When the conductive layer 32 is made of copper, the buried resistance metal foil is a buried resistance copper foil product; of course, the conductive layer 32 can also be made of other materials with good conductivity, which will not be described herein.

In addition, the thickness of the conductive layer 32 in the present embodiment is 2 to 20 micrometers. The thickness of the conductive layer 32 is set to be 2 micrometers to 20 micrometers so as to meet the requirement of manufacturing a printed board fine circuit, and of course, the thickness of the conductive layer 32 may be set to be other values according to the actual use requirement, which is not described herein.

In the embodiment of the present invention, the resistance layer 31 in this embodiment includes any one of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon and phosphorus, for example, the resistance layer 31 may include an alloy such as nickel-phosphorus alloy, or a metal such as nickel, or a combination of different metals such as nickel metal and chromium metal, or a combination of nickel-phosphorus alloy and nickel metal, or a combination of nickel metal and silicon. Of course, the resistive layer 31 may also be made of other materials, which will not be described herein.

In addition, the thickness of the resistive layer 31 of this embodiment may be set according to actual use requirements, and will not be further described herein.

Correspondingly, the embodiment of the utility model provides a still provide a printing board, including foretell bury hinder among the metal forming bury hinder metal forming body 3. For example, when the resistive circuit is fabricated, the conductive layer 32 and the resistive layer 31 of the buried metal foil are etched according to a predetermined resistive circuit pattern, so as to obtain the desired resistive circuit. Illustratively, when it is desired to design the buried resistor in a certain area of the printed board, the conductive layer 32 of a predetermined area may be etched to expose the barrier layer 2 of the predetermined area.

Example two

Fig. 5 is a schematic structural diagram of a buried resistance metal foil according to an embodiment of the present invention.

As shown in fig. 5, in the embodiment of the present invention, the barrier layer 2 of the present embodiment includes a high temperature resistant layer 21 and a metal bonding layer 22, which are stacked, and the metal bonding layer 22 is disposed between the high temperature resistant layer 21 and the resistance layer 31. By providing the metal adhesive layer 22 between the high temperature resistant layer 21 and the resistive layer 31, the barrier layer 2 can be securely connected to the resistive layer 31, so that peeling between the barrier layer 2 and the resistive layer 31 is prevented, and the barrier layer 2 can protect the resistive layer 31.

Specifically, the high temperature resistant layer 21 of the present embodiment is an organic high temperature resistant layer; alternatively, the high temperature resistant layer 21 is made of any one or more of tungsten, chromium, zirconium, titanium, nickel, molybdenum, cobalt, and graphite. Preferably, the high temperature resistant layer 21 has a single layer alloy structure, or a multilayer structure composed of a single metal layer, or a multilayer structure composed of an alloy layer and a single metal layer. Specifically, the single-layer alloy structure is a single-layer structure made of an alloy material, for example, a single-layer structure made of a tungsten-chromium alloy; the multilayer structure composed of a single metal layer is a multilayer structure composed of a plurality of single-layer structures each made of one metal, for example, a multilayer structure composed of a tungsten metal layer and a chromium metal layer; the multilayer structure composed of the alloy layer and the single metal layer is a multilayer structure composed of a plurality of single layer structures each composed of one metal or alloy material, such as a multilayer structure composed of a zirconium metal layer and a tungsten-chromium alloy layer.

In addition, the thickness of the high temperature resistant layer 21 of this embodiment may be set according to actual use requirements, and will not be further described herein.

In the embodiment of the present invention, the metal bonding layer 22 includes a metal a that can be bonded to the resistance layer 31 and/or a metal B that can be bonded to the high temperature resistant layer 21, thereby preventing peeling between the resistance layer 31 and the barrier layer 2. For example, metal a is copper or zinc; and metal B is nickel, iron or manganese. It is to be understood that the metallic bond layer 22 includes any one or more of copper, zinc, nickel, iron, and manganese; alternatively, the metallic bond layer 22 is made of one of copper or zinc and one of nickel, iron, and manganese. The structure of the metal bonding layer 22 may include, but is not limited to, the following: (1) the metal bonding layer 22 is a single metal layer composed of metal a, wherein the metal a is copper or zinc; (2) the metal bonding layer 22 is a single metal layer composed of metal B, wherein the metal B is nickel, iron or manganese; (3) the metal bonding layer 22 is a single-layer alloy structure composed of a metal a and a metal B, for example, a single-layer alloy structure made of a copper-nickel alloy; (4) the metal bonding layer 22 includes a multilayer structure composed of an alloy layer and a single metal layer; wherein the alloy layer of the metal bonding layer 22 is made of metal a and metal B, and the single metal layer of the metal bonding layer 22 is made of metal a or metal B; for example, an alloy layer made of a copper-nickel alloy and a single metal layer made of manganese; (5) the metal adhesive layer 22 has a multilayer structure composed of a single-layer structure of metal a and a single-layer structure of metal B, for example, a multilayer structure composed of a copper metal layer and a nickel metal layer. When the metal bonding layer 22 is a multilayer structure composed of a single-layer structure of metal a and a single-layer structure of metal B, the single-layer structure of metal a is disposed between the resistance layer 31 and the single-layer structure of metal B, and since the adhesion ratio between metal a and the resistance layer 31 is stronger and the adhesion ratio between metal B and the high temperature resistant layer 21 is stronger, the barrier layer 2 is not easily separated from the resistance layer 31 by disposing the single-layer structure of metal a between the resistance layer 31 and the single-layer structure of metal B.

In addition, the thickness of the barrier layer 2 of the present embodiment is greater than or equal to

Preferably, the thickness of the barrier layer 2 is preferably such that

Of course, the thickness of the barrier layer 2 may be set to other values according to the actual use requirement, and will not be further described herein.

EXAMPLE III

Fig. 6 is a schematic structural diagram of a buried resistance metal foil according to a third embodiment of the present invention.

The difference between the buried resistance metal foil in this embodiment and the first embodiment is that in the embodiment of the present invention, the buried resistance metal foil further includes another barrier layer, which is defined as a second barrier layer 5, and the second barrier layer 5 is disposed between the dielectric layer 1 and the resistance layer 31.

The utility model discloses a people is implementing the utility model discloses an in-process, the discovery resistance layer probably produces the pinhole in the manufacturing process, if do not have the barrier layer, then the dielectric layer directly enters into the pinhole easily to influence the circuit performance of resistance layer, and the embodiment of the utility model provides a through will second barrier layer 5 is located dielectric layer 1 with between the resistance layer 31, can effectively keep apart dielectric layer 1 and resistance layer 31, avoided dielectric layer 1 and resistance layer 31 direct contact to prevent dielectric layer 1 entering resistance layer 31, thereby avoided dielectric layer 1 to influence the performance of resistance layer 31 on the circuit transmission.

Specifically, the peel strength between the carrier layer 1 and the dielectric layer 1 is greater than the peel strength between the second barrier layer 5 and the resistive layer 31. The peeling strength between the carrier layer 1 and the dielectric layer 1 is larger than that between the second barrier layer 5 and the resistance layer 31, so that the carrier layer 1 and the dielectric layer 1 are not easy to peel, and the dielectric layer 1 can be peeled along with the carrier layer 1.

In an optional implementation manner, the peel strength between the second barrier layer 5 and the resistive layer 31 of this embodiment is greater than or equal to the peel strength between the second barrier layer 5 and the dielectric layer 1. By making the peel strength between the second barrier layer 5 and the resistance layer 31 greater than the peel strength between the second barrier layer 5 and the dielectric layer 1, when the carrier layer 1 is peeled off from the resistance layer 31, peeling occurs between the dielectric layer 1 and the second barrier layer 5, and the second barrier layer 5 remains on the resistance layer 31, so that the second barrier layer 5 can play a role of preventing oxidation to the resistance layer 31, thereby protecting the resistance layer 31. Of course, the peel strength between the second barrier layer 5 and the resistive layer 31 may also be less than or equal to the peel strength between the second barrier layer 5 and the dielectric layer 1, so that when the carrier layer 1 is peeled off from the resistive layer 31, the second barrier layer 5 can be partially or completely remained on the dielectric layer 1, and is peeled off from the resistive layer 31 along with the carrier layer 1 and the dielectric layer 4 at the same time, which is not described herein again. In addition, the material and thickness of the second barrier layer 5 may be the same as or different from those of the barrier layer 2, and may be specifically set according to actual use requirements, which is not described herein.

In the embodiment of the present invention, other structures and working principles of the buried resistance metal foil of the present embodiment are the same as those of the first embodiment, and are not described herein.

Example four

Fig. 7 is a schematic flow chart of a method for manufacturing a buried resistance metal foil according to a fourth embodiment of the present invention.

The embodiment of the utility model provides a preparation method of bury and hinder metal foil is applicable to preparation embodiment one bury and hinder metal foil, bury and hinder metal foil' S preparation method includes following step S11-S14:

s11, forming a dielectric layer; in particular implementations, a dielectric layer may be formed on the carrier layer.

S12, forming a resistance layer on the dielectric layer;

s13, forming a barrier layer on one surface, far away from the dielectric layer, of the resistance layer;

and S14, plating a conductive layer on one surface of the barrier layer, which is far away from the resistance layer.

Specifically, in step S12, the forming a resistive layer on the dielectric layer specifically includes:

and forming a resistance layer on the dielectric layer by adopting a conventional process such as a coating or electroplating process.

In step S13, the plating a conductive layer on a surface of the barrier layer away from the resistive layer specifically includes:

and plating the surface of the barrier layer, which is far away from the resistance layer, by adopting any one or more processes of chemical plating, physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating and mixed plating to form the conductive layer.

Of course, only one specific implementation manner of plating the conductive layer on the surface of the barrier layer away from the resistance layer is provided here, the embodiment of the present invention is not limited to the specific implementation manner of plating the conductive layer on the surface of the barrier layer away from the resistance layer, and one skilled in the art can also plate the conductive layer on the surface of the barrier layer away from the resistance layer in other manners according to the specific situation in the practical application.

In addition, it should be noted that the method for preparing the buried barrier metal foil provided in this embodiment is only one example for preparing the buried barrier metal foil described in the first embodiment, and the buried barrier metal foil described in the first embodiment may also be prepared by other preparation methods. In addition, the method for preparing the buried barrier metal foil in the second embodiment may specifically refer to the method for preparing the buried barrier metal foil provided in this embodiment, and will not be further described herein.

To sum up, the embodiment of the utility model provides a bury and hinder metal forming, bury and hinder metal forming and include dielectric layer 4, barrier layer 5 and bury and hinder the metal forming body, bury and hinder the metal forming body and include resistive layer 31 and conducting layer 32, barrier layer 2 locates resistive layer 31 with between the conducting layer 32, conducting layer 32 plates and locates barrier layer 2 keeps away from on the one side of resistive layer 31, the resistance tolerance in the unit area of predetermineeing of arbitrary department on resistive layer 31 is at-10% ~ 10% within range. The barrier layer 2 is disposed between the resistor layer 31 and the conductive layer 32, so that the resistor layer 31 can be protected, when the buried metal foil is etched to form a resistor circuit, the conductive layer 32 forms a conductive end, and the barrier layer 2 between the resistor layer 31 and the conductive layer 32 protects the resistor layer 31, thereby preventing the resistor layer 31 from being exposed outside directly. Furthermore, the embodiment of the utility model provides a through setting up barrier layer 2 and inciting somebody to action conducting layer 32 plates and locates barrier layer 2 is kept away from in the one side of resistance layer 31 for need not to adopt off-the-shelf copper foil to form with the mode of resistance layer looks pressfitting and bury and hinder the metal foil, consequently avoided effectively among the prior art because the inhomogeneous copper foil of roughness directly leads to resistance layer surface roughness inhomogeneous with the resistance layer looks pressfitting, and then cause the problem that the resistance of the unit area of resistance layer all directions is different, thereby the difference of the resistance value of the unit area on the all directions of resistance layer 31 has been reduced, and then be convenient for design the buried resistor of high accuracy.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and replacements can be made without departing from the technical principle of the present invention, and these modifications and replacements should also be regarded as the protection scope of the present invention.

Claims (12)

1. The utility model provides a bury and hinder metal foil, its characterized in that includes the barrier layer and buries and hinders the metal foil body, it includes resistance layer and conducting layer to bury and hinder the metal foil body, the barrier layer is located the resistance layer with between the conducting layer, the conducting layer plates and locates the barrier layer is kept away from on the one side of resistance layer, the resistance tolerance in the unit area of predetermineeing of arbitrary department on the resistance layer is at-10% ~ 10% within range.

2. The buried barrier metal foil of claim 1, further comprising a plurality of conductive bumps;

the conductive bumps are distributed on one surface, close to the barrier layer, of the resistance layer or one surface, close to the barrier layer, of the conductive layer at intervals.

3. The buried resistive metal foil of claim 2, wherein a plurality of the conductive bumps are spaced apart on a side of the conductive layer adjacent to the barrier layer, and an end of the plurality of the conductive bumps remote from the conductive layer extends from the barrier layer and contacts the resistive layer.

4. The buried resistive metal foil of claim 2, wherein the plurality of conductive bumps are a first metal particle and/or a particle cluster consisting of a plurality of second metal particles.

5. The buried resistive metal foil of claim 1, further comprising a dielectric layer disposed on a side of the resistive layer distal from the barrier layer.

6. The buried barrier metal foil of claim 1, wherein the barrier layer comprises a high temperature resistant layer and a metal bonding layer in a stacked arrangement;

the metal bonding layer is arranged between the high temperature resistant layer and the resistance layer.

7. The buried resistive metal foil of claim 6, wherein the high temperature resistant layer is an organic high temperature resistant layer; or the like, or, alternatively,

the high temperature resistant layer is made of any one of tungsten, chromium, zirconium, titanium, nickel, molybdenum, cobalt and graphite.

8. The buried barrier metal foil according to claim 6, wherein the high temperature resistant layer is a single layer alloy structure, a multilayer structure composed of a single metal layer, or a multilayer structure composed of an alloy layer and a single metal layer.

9. The buried barrier metal foil of claim 6, wherein the metal adhesion layer is copper, zinc, nickel, iron, or manganese, or wherein the metal adhesion layer is comprised of one of a copper metal layer and a zinc metal layer and one of a nickel metal layer, an iron metal layer, and a manganese metal layer.

10. The buried resistive metal foil of any of claims 1-9, wherein the conductive layer has a thickness of 2 microns to 20 microns.

11. The buried resistive metal foil of any one of claims 1-9, wherein the conductive layer is any one of aluminum, silver, copper, gold.

12. The buried resistive metal foil of any of claims 1-9, wherein the conductivity of the conductive layer is 2-1000 times the conductivity of the resistive layer.

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