CN214627496U

CN214627496U - Buried resistance metal foil and printed board

Info

Publication number: CN214627496U
Application number: CN202022692690.5U
Authority: CN
Inventors: 苏陟; 高强
Original assignee: Guangzhou Fangbang Electronics Co Ltd
Current assignee: Zhuhai Dachuang Electronics Co., Ltd; Guangzhou Fangbang Electronics Co Ltd
Priority date: 2020-03-17
Filing date: 2020-11-19
Publication date: 2021-11-05
Anticipated expiration: 2030-11-19
Also published as: CN113411962A

Abstract

The utility model relates to a printed board technical field discloses a bury and hinder metal forming and printed board, metal particle through set up a plurality of interval distribution in the one side of resistance layer, and set up the conducting layer in that one side of resistance layer that is equipped with metal particle, so that the conducting layer covers on resistance layer and metal particle, avoided among the prior art because the inhomogeneous copper foil of roughness directly contacts with the resistance layer and lead to the resistance layer inhomogeneous, cause the different problem of each regional resistance of resistance layer, with the difference of the resistance value of unit area in each region of reduction resistance layer, and then be convenient for design the stealthy resistance of high accuracy.

Description

Buried resistance metal foil and printed board

Technical Field

The utility model relates to a printing board technical field especially relates to a bury and hinder metal forming and printing board.

Background

With the development trend of miniaturization of electronic products, higher requirements are put on the packaging density and the volume of the electronic products, and embedding passive devices such as resistors into a printed board is an effective means for reducing the size of the electronic products.

As shown in fig. 1, it is a partial structural diagram of a conventional printed board with a buried resistor, in the conventional printed board with a buried resistor, a copper foil layer 10 covers a resistive layer 20, and the copper foil layer 10 is closely attached to the resistive layer 20, wherein the copper foil layer 10 is used for making a circuit pattern. In order to ensure tight connection between the copper foil layer 10 and the resistance layer 20, the surface of the copper foil layer 10 connected to the resistance layer 20 is generally set to have a certain roughness, but the roughness of the copper foil layer 10 is not uniform under microscopic conditions, so that the surface roughness of the resistance layer 20 close to the copper foil layer 10 is not uniform, and the resistance value of the resistance layer 20 has non-uniformity, which seriously affects the design accuracy of the buried resistor.

SUMMERY OF THE UTILITY MODEL

The embodiment of the utility model provides a bury and hinder metal forming and printed board, it can reduce the difference of the resistance value of unit area in each region of resistance layer, and then is convenient for design the buried resistance of high accuracy.

In order to solve the above technical problem, an embodiment of the present invention provides a buried resistance metal foil, including a resistance layer, a conductive layer, and a plurality of metal particles; the conducting layer and the resistance layer are arranged in a laminated mode;

the metal particles are distributed on one surface of the resistance layer at intervals and covered by the conductive layer, or the metal particles are distributed on one surface of the conductive layer at intervals and covered by the resistance layer.

Preferably, the plurality of metal particles are uniformly distributed on the resistive layer or the conductive layer.

Preferably, the metal particles are of a different material than the conductive layer.

Preferably, the thickness of the metal particles is 0.5 to 20 micrometers.

Preferably, the thickness of the conductive layer is 2 to 20 micrometers.

Preferably, the conductive layer comprises any one or more of aluminum, silver, copper and gold.

Preferably, the conductivity of the conductive layer is 2 to 1000 times that of the resistive layer.

Preferably, the resistive layer includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium and silicon.

Preferably, the buried resistance metal foil further includes a carrier medium, and the carrier medium is disposed on a surface of the resistance layer away from the conductive layer.

In order to solve the same technical problem, the embodiment of the utility model provides a still provide a printing board, the printing board include bury hinder the metal forming.

Implement the embodiment of the utility model provides a, following beneficial effect has:

the embodiment of the utility model provides a bury and hinder metal foil and printed board, through the metal particle that sets up a plurality of interval distributions between resistance layer and conducting layer, avoided among the prior art because the inhomogeneous copper foil of roughness directly leads to the resistance layer inhomogeneous with the resistance layer contact, cause the inhomogeneous problem of resistance in each region of resistance layer to reduce the difference of the resistance value of the unit area in each different regions of resistance layer, and then be convenient for design the buried resistor of high accuracy.

Drawings

Fig. 1 is a partial structural schematic diagram of a conventional printed board with a buried resistor;

fig. 2 is a schematic structural diagram of a buried resistance metal foil according to a first embodiment of the present invention;

FIG. 3 is a schematic structural diagram of an embodiment of a buried barrier metal foil containing a carrier medium according to a first embodiment of the present invention;

FIG. 4 is a schematic structural diagram of another embodiment of a buried barrier metal foil containing a carrier medium in accordance with a first embodiment of the present invention;

fig. 5 is a flow chart of a method for manufacturing a buried resistance metal foil according to a first embodiment of the present invention;

fig. 6 is a schematic structural diagram of a buried resistance metal foil according to a second embodiment of the present invention;

10, a copper foil layer; 20. a resistive layer; 1. a conductive layer; 2. a resistive layer; 3. a dielectric layer; 4. metal particles; 5. a peelable carrier layer; 6. a carrier medium.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Example one

Please refer to fig. 2, which is a schematic structural diagram of a buried barrier metal foil according to a first embodiment of the present invention.

The utility model discloses a bury hinders foil of preferred embodiment, including resistance layer 2, conducting layer 1 and a plurality of metal particle 4; the conductive layer 1 and the resistive layer 2 are stacked;

the plurality of metal particles 4 are distributed at intervals on one surface of the resistive layer 2, and the plurality of metal particles 4 are covered by the conductive layer 1. The plurality of metal particles 4 form a metal particle layer, and the metal particles 4 are preferably distributed at intervals in such a manner that any two adjacent metal particles 4 are arranged at intervals as shown in fig. 2, but it is not excluded that a plurality of metal particles 4 exist, adjacent metal particles 4 are adhered to each other, and the metal particles 4 are arranged at intervals as a whole, so that the metal particle layer is not conductive. The conductive layer 1 is excellent in conductivity, and is made of a material excellent in conductivity.

The embodiment of the utility model provides an in, through set up a plurality of interval distribution's metal particle 4 in the one side of resistance layer 2, and set up conducting layer 1 in the one side that is equipped with metal particle 4 of resistance layer 2, so that conducting layer 1 covers on resistance layer 2 and metal particle 4, it is inhomogeneous to have avoided leading to the resistance layer because the inhomogeneous copper foil of roughness directly contacts with the resistance layer among the prior art, cause the different problem of resistance layer each direction's unit area's resistance, with the difference of the unit area's of reduction resistance layer 2 each direction resistance value, and then be convenient for design the buried resistor of high accuracy.

It should be noted that, in the embodiment of the present invention, the plurality of metal particles 4 are distributed on one surface of the resistance layer 2 at intervals, so as to avoid the complete direct contact between the conductive layer 1 and the resistance layer 2, and increase the adhesion between the conductive layer 1 and the resistance layer 2. The metal particles 4 are distributed at intervals, so that the situation that the resistivity of the metal particles 4 is lower than that of the resistance layer 2 is avoided, when the metal particles 4 are mutually adhered, current flows to a passage formed by the adhesion of the metal particles 4 after passing through a conductive end formed by the conductive layer 1, the resistance layer 2 loses the function, and the use of the resistance layer 2 is influenced. In this embodiment, since the plurality of metal particles 4 are distributed at intervals on one surface of the resistive layer 2, that is, the metal particles 4 are not adhered to each other, the plurality of metal particles 4 are not electrically connected to each other to form a resistor. In addition, in the middle of the concrete implementation, because factors such as process error, can lead to a plurality of adjacent metal particle 4 adhesion, but the influence can not be very big, consequently the utility model discloses easily realize form interval distribution's metal particle 4 on resistance layer 2, its technological requirement need not too harsh, is favorable to reduction in production cost.

As an alternative embodiment, the metal particles 4 are of a different material than the conductive layer 1. The metal particles 4 and the conductive layer 1 are made of different materials and have different resistivities, and when the resistivity of the metal particles 4 is lower than that of the conductive layer 1, the metal particles 4 have less influence on the resistance circuit after the resistance circuit is formed by the embedded resistance metal foil.

Specifically, the height H of the metal particles 4 in the present embodiment is 0.5 to 20 micrometers. In a specific application, if the height of the metal particles 4 is too small, good adhesion cannot be added to the conductive layer 1 and the resistive layer 2, and if the height of the metal particles 4 is too large, pinholes may be generated in the conductive layer 1, thereby affecting the performance of the conductive layer 1. In the present embodiment, the height of the metal particles 4 is set to 0.5 to 20 micrometers, so that the metal particles 4 have a good effect of increasing the adhesion between the conductive layer 1 and the resistive layer 2. Preferably, the height H of the metal particles 4 is between 0.5 and 2.0 microns. Of course, the height of the metal particles 4 may also be set to other values according to the actual use requirement, and further details are not described herein.

It should be noted that the metal particles 4 may be randomly distributed on the resistive layer 2, and in order to further ensure the connection stability between the conductive layer 1 and the resistive layer 2, the metal particles 4 in this embodiment are uniformly distributed on the resistive layer 2. The metal particles 4 are uniformly distributed on the resistance layer 2, so that the peel strength of each connection between the conductive layer 1 and the resistance layer 2 is relatively close, and the connection stability between the conductive layer 1 and the resistance layer 2 is further ensured. In implementation, a plurality of metal particles 4 may be uniformly or randomly distributed on the resistive layer 2 by a conventional process such as an electroplating process, and the metal particles 4 are not adhered. Furthermore, the height of the metal particles 4 is set to be consistent, so that the direct adhesive force of the conductive layer 1 and the resistance layer 2 is further improved, and the whole embedded resistance metal foil is more flat. When the metal particles 4 are uniformly distributed and the height is set to be uniform, the effect is better when the two aspects are combined.

It should be noted that, the embedded resistive metal foil disclosed in this embodiment is used for manufacturing a resistive circuit, where the conductive layer 1 is manufactured through a process to form a conductive end, and the resistive layer 2 is manufactured through a process to form a resistor, when the embedded resistive metal foil is applied, the embedded resistive metal foil may be firstly laminated on a circuit board, and the embedded resistive metal foil is manufactured through a process to form a resistive circuit, or the embedded resistive metal foil is firstly laminated on a resistive circuit, and then the resistive circuit is laminated on the circuit board, so that the conductive end is conducted with an electrical device or a circuit on the circuit board, and the conductive end is conducted with the resistor, so that a conducted circuit is formed. The conductivity of the conductive layer 1 is thus greater than the conductivity of the resistive layer 2, for example, the conductivity of the conductive layer 1 is 2-1000 times that of the resistive layer 2. Of course, the conductivity of the conductive layer 1 and the conductivity of the resistive layer 2 may be set according to actual use requirements, and will not be further described herein. Specifically, the resistance layer 2 in this embodiment includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including a combination of at least two of nickel, chromium, platinum, palladium, titanium and silicon, for example, the resistance layer 2 may include an alloy such as a nickel-phosphorus alloy, or a metal such as nickel, or a combination of different metals such as nickel metal and chromium metal, or a combination of a nickel-phosphorus alloy and nickel metal, or a combination of nickel metal and silicon. Of course, the resistive layer 2 may also be made of other materials, which will not be described herein.

Specifically, the conductive layer 1 in this embodiment includes any one or more of aluminum, silver, copper, and gold. When the conductive layer 1 is made of copper, the buried resistance metal foil is a buried resistance copper foil product, and of course, the conductive layer 1 may also be made of other materials with good conductivity, which is not described herein. The thickness of the conductive layer 1 in this embodiment is 2 to 20 micrometers. The thickness of the conductive layer 1 is set to be 2 micrometers to 20 micrometers so as to meet the requirement of manufacturing a printed board fine circuit, and certainly, the thickness of the conductive layer 1 can be set to be other values according to the actual use requirement, which is not described herein.

In an alternative embodiment, the buried barrier metal foil further comprises a carrier medium, which is provided on a side of the resistive layer 2 facing away from the conductive layer 1. Specifically, the carrier medium plays a role of carrying, and in a specific implementation, referring to fig. 3, the resistive layer 2 may be formed on the carrier medium 6, and the carrier medium 6 may protect the resistive layer 2. The carrier medium 6 may be, but is not limited to, Polyimide (PI), in which case the carrier medium 6 acts as a carrier, and the resistive layer 2 is formed on the carrier medium 6, and the carrier medium 6 does not need to be torn off when applied to a circuit board.

In another aspect, as shown in fig. 4, the carrier medium may be a peelable carrier layer 5, which may be, but is not limited to, polyethylene terephthalate (PET), and which peelable carrier layer 5 needs to be torn off when used in a circuit board. It will be readily appreciated that to facilitate peeling, the peelable carrier layer 5 is also coated with the dielectric layer 3, i.e. in the version shown in fig. 4 the carrier medium comprises the peelable carrier layer 5 and the dielectric layer 3. The thickness of the dielectric layer 3 can be set to be 10-100 angstroms, and the dielectric layer 3 is a peeling layer or a peeling agent, so that the peelable carrier layer 5 and the resistive layer 2 have good peeling strength, that is, the peelable carrier layer 5 is not easy to fall off, and the peelable carrier layer 5 can be well peeled off from the resistive layer 2 when the buried resistance metal foil is used subsequently. In addition, the dielectric layer 3 may also function to adjust the roughness of the resistive layer 2.

Correspondingly, the embodiment of the utility model provides a still provide a printing board, the printing board include bury hinder the metal forming. For example, when the resistive circuit is fabricated, the conductive layer 1 and the resistive layer 2 of the buried metal foil are etched according to a predetermined resistive circuit pattern, so as to obtain the desired resistive circuit. When a buried resistor needs to be designed in a certain area of the printed board, the conductive layer 1 in the preset area can be etched to expose the resistive layer 2 in the preset area, and the metal particles 4 on the preset area can be etched without etching or etching.

Accordingly, referring to fig. 5, an embodiment of the present invention further provides a method for preparing the buried resistance metal foil, including:

step S101, forming the resistive layer 2;

step S102, forming a plurality of metal particles 4 distributed at intervals on one surface of the resistance layer 2 or one surface of the conductive layer 1;

step S103, forming a conductive layer 1 on one surface of the resistive layer 2 on which the metal particles 4 are formed, or attaching the resistive layer 2 to the conductive layer 1 on which the metal particles are formed;

wherein the conductive layer 1 is of a different material than the metal particles 4.

In an alternative embodiment, the step S101 "forming the resistive layer 2" specifically includes:

providing a carrier medium 6;

forming a resistive layer 2 on said carrier medium 6; in particular implementations, the resistive layer 2 may be formed on the carrier medium 6 by a conventional process such as a coating or plating process;

step S102 "forming a plurality of metal particles 4 spaced apart on one surface of the resistive layer 2", specifically:

a plurality of metal particles 4 are formed on the surface of the resistance layer 2 away from the carrier medium 6.

Specifically, in the step S102 "forming a plurality of metal particles 4 spaced apart on one surface of the resistive layer 2", the plurality of metal particles 4 spaced apart may be formed on one surface of the resistive layer 2 by a conventional process such as a plating process. Since the plurality of metal particles 4 are distributed at intervals on one surface of the resistive layer 2, that is, the metal particles 4 are not adhered to each other, the plurality of metal particles 4 are not electrically connected to each other to form a resistor. In the middle of the concrete implementation, because factors such as process error, probably lead to the adhesion of a plurality of adjacent metal particles 4, nevertheless the influence can not be very big, consequently the utility model discloses easily realize form interval distribution's metal particles 4 on the resistance layer 2, its technological requirement need not too harsh, is favorable to reduction in production cost.

Specifically, in step S103 "forming the conductive layer 1 on the side of the resistive layer 2 where the metal particles 4 are formed", the conductive layer 1 may be formed on the side of the resistive layer 2 where the metal particles 4 are formed by a conventional process such as one or more of plating, coating, or vacuum sputtering. In a specific implementation, the conductive layer 1 may be formed by combining a plurality of processes, for example, a vacuum sputtering process is used to sputter a metal layer on one surface of the resistive layer 2 on which the metal particles 4 are formed, and then an electroplating process is used to form another metal layer on the sputtered metal layer, where the two metal layers together form the conductive layer 1. Of course, the process for forming the conductive layer 1 on the resistive layer 2 is more, and will not be further described herein.

Example two

As shown in fig. 6, the present embodiment is different from the first embodiment only in that a plurality of metal particles 4 of the present embodiment are distributed on one surface of a conductive layer 1 at intervals, and the plurality of metal particles 4 are covered by the resistive layer 2. The technical effect of this embodiment is the same as that of the first embodiment, but the embodiment is different in the preparation method. In one of the possible embodiments of the present invention, the metal particles 4 are formed on the conductive layer 1, the resistive layer 2 is additionally formed, and the surface of the conductive layer 1 on which the metal particles 4 are disposed is attached to the resistive layer 2.

Other structures and working principles of this embodiment are the same as those of the first embodiment, and will not be further described herein.

To sum up, the embodiment of the utility model provides a bury and hinder metal forming, printed board and bury preparation method who hinders metal forming, through set up a plurality of interval distribution's metal particle 4 between resistance layer 2 and conducting layer 1, avoided among the prior art because the inhomogeneous copper foil of roughness directly contacts with the resistance layer and lead to the resistance layer inhomogeneous, cause the inhomogeneous problem of resistance of each different region of resistance layer, with the difference of the resistance value of the unit area of each region that reduces resistance layer 2, and then be convenient for design the buried resistor of high accuracy.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and replacements can be made without departing from the technical principle of the present invention, and these modifications and replacements should also be regarded as the protection scope of the present invention.

Claims

1. The buried resistance metal foil is characterized by comprising a resistance layer, a conductive layer and a plurality of metal particles; the conducting layer and the resistance layer are arranged in a laminated mode;

2. The buried resistive metal foil of claim 1, wherein a plurality of the metal particles are uniformly distributed on the resistive layer or the conductive layer.

3. The buried resistive metal foil of claim 1, wherein the metal particles are of a different material than the conductive layer.

4. The buried barrier metal foil of claim 1, wherein the metal particles have a thickness of 0.5 to 20 microns.

5. The buried resistive metal foil of claim 1, wherein the conductive layer has a thickness of 2 to 20 microns.

6. The buried resistive metal foil of claim 1, wherein the conductive layer is any one of aluminum, silver, copper, and gold.

7. The buried resistive metal foil of claim 1, wherein the conductive layer has a conductivity 2-1000 times that of the resistive layer.

8. The embedded resistive metal foil of any one of claims 1-7, further comprising a carrier medium disposed on a side of the resistive layer remote from the conductive layer.

9. A printed board, characterized in that the printed board comprises the buried resistance metal foil according to any one of claims 1 to 7.