CN214014635U

CN214014635U - Buried resistance metal foil

Info

Publication number: CN214014635U
Application number: CN202022692723.6U
Authority: CN
Inventors: 苏陟; 高强
Original assignee: Guangzhou Fangbang Electronics Co Ltd
Current assignee: Zhuhai Dachuang Electronics Co., Ltd; Guangzhou Fangbang Electronics Co Ltd
Priority date: 2020-11-19
Filing date: 2020-11-19
Publication date: 2021-08-20
Anticipated expiration: 2030-11-19

Abstract

The utility model relates to a printed circuit board technical field discloses a bury and hinder metal forming, through setting up a plurality of interval distribution's granule cluster to set up the conducting layer, so that the granule cluster is located between conducting layer and the resistance layer, avoided among the prior art because the uneven copper foil of roughness directly contacts with the resistance layer and leads to the resistance layer inhomogeneous, cause the inhomogeneous problem of resistance layer different positions, in order to reduce the difference of the resistance value of the different positions of resistance layer, and then be convenient for design high accuracy bury the resistance; in addition, the particle cluster is composed of a plurality of first metal particles, and compared with a single metal particle, the surface roughness is increased, so that the adhesion of the conductive layer is increased, and the conductive layer can be reliably connected with the resistance layer.

Description

Buried resistance metal foil

Technical Field

The utility model relates to a printing board technical field especially relates to a bury and hinder metal forming.

Background

At present, with the development trend of miniaturization of electronic products, higher requirements are put on the packaging density and the volume of the electronic products, and embedding passive devices such as resistors into a printed board is an effective means for reducing the size of the electronic products.

As shown in fig. 1, it is a partial structural diagram of a conventional printed board with a buried resistor, in the conventional printed board with a buried resistor, a copper foil layer 10 covers a resistive layer 20, and the copper foil layer 10 is closely attached to the resistive layer 20, wherein the copper foil layer 10 is used for making a circuit pattern. In order to ensure tight connection between the copper foil layer 10 and the resistance layer 20, the surface of the copper foil layer 10 connected to the resistance layer 20 is generally set to have a certain roughness, but the roughness of the copper foil layer 10 is not uniform under microscopic conditions, so that the surface roughness of the resistance layer 20 close to the copper foil layer 10 is not uniform, and the resistance value of the resistance layer 20 has non-uniformity, which seriously affects the design accuracy of the buried resistor.

SUMMERY OF THE UTILITY MODEL

The embodiment of the utility model provides a bury and hinder metal forming, it can reduce the difference of the resistance value of unit area in each region of resistance layer, and then is convenient for design the buried resistance of high accuracy.

In order to solve the above technical problem, an embodiment of the present invention provides a buried resistance metal foil, including a resistance layer, a conductive layer, and a plurality of particle clusters; the conducting layer and the resistance layer are arranged in a laminated mode;

the particle clusters are composed of a plurality of first metal particles, a plurality of the particle clusters are distributed at intervals on one surface of the resistive layer, and a plurality of the particle clusters are covered by the conductive layer, or a plurality of the particle clusters are distributed at intervals on one surface of the conductive layer, and a plurality of the particle clusters are covered by the resistive layer.

Preferably, a plurality of the particle clusters are uniformly distributed on the resistive layer or the conductive layer.

Preferably, the surface of the resistive layer provided with the particle clusters is further provided with a plurality of second metal particles distributed at intervals.

Preferably, the particle cluster includes the first metal particles in an amount of 2 to 100.

Preferably, the height of the particle cluster is 0.5 to 20 micrometers.

Preferably, the thickness of the conductive layer is 2 to 20 micrometers.

Preferably, the conductive layer comprises any one or more of aluminum, silver, copper and gold.

Preferably, the conductivity of the conductive layer is 2 to 1000 times that of the resistive layer.

Preferably, the resistive layer includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon and phosphorus.

Preferably, the buried resistance metal foil further includes a dielectric layer, and the dielectric layer is disposed on a surface of the resistance layer away from the conductive layer.

Implement the embodiment of the utility model provides a, following beneficial effect has:

the embodiment of the utility model provides a bury and hinder metal forming, through setting up a plurality of interval distribution's granule cluster, avoided among the prior art because the uneven copper foil of surface roughness directly contacts with the resistive layer and leads to the resistance layer inhomogeneous, cause the inhomogeneous problem of resistance value of resistive layer to reduce the difference of the different position resistance values of resistive layer, and then be convenient for design the buried resistance of high accuracy; in addition, the particle cluster is composed of a plurality of first metal particles, and compared with a single metal particle, the surface roughness is increased, so that the adhesion of the conductive layer is increased, and the conductive layer can be reliably connected with the resistance layer.

Drawings

Fig. 1 is a partial structural schematic diagram of a conventional printed board with a buried resistor;

fig. 2 is a schematic structural diagram of a buried resistance metal foil according to a first embodiment of the present invention;

fig. 3 is a schematic structural diagram of a buried barrier metal foil including a dielectric layer according to a first embodiment of the present invention;

fig. 4 is a schematic structural diagram of a buried barrier metal foil including a dielectric layer according to a first embodiment of the present invention;

fig. 5 is a flow chart of a method for manufacturing a buried resistance metal foil according to a first embodiment of the present invention;

fig. 6 is a schematic structural diagram of a buried resistance metal foil according to a second embodiment of the present invention.

10, a copper foil layer; 20. a resistive layer; 1. a conductive layer; 2. a resistive layer; 3. a dielectric layer; 4. clustering the particles; 5. a peelable carrier layer; 6. a dielectric layer.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Example one

Referring to fig. 2, a buried resistance metal foil according to an embodiment of the present invention includes a resistance layer 2, a conductive layer 1, and a plurality of particle clusters 4;

the particle clusters 4 are composed of a plurality of first metal particles, the plurality of particle clusters 4 are distributed at intervals on one surface of the resistive layer 2, and the plurality of particle clusters 4 are covered with the conductive layer 1.

In the embodiment of the present invention, the particle clusters 4 are disposed on one surface of the resistance layer 2, and the conductive layer 1 is disposed on the surface of the resistance layer 2 on which the particle clusters 4 are disposed, so that the conductive layer 1 covers the resistance layer 2 and the particle clusters 4, thereby avoiding the problem of uneven resistance of the resistance layer caused by the fact that the copper foil with uneven surface roughness directly contacts with the resistance layer in the prior art, so as to reduce the difference of resistance values at different positions of the resistance layer, and further facilitating the design of high-precision buried resistors; in addition, the particle clusters 4 are composed of a plurality of first metal particles, and the surface roughness is increased relative to that of a single metal particle, thereby being beneficial to increasing the adhesion of the conductive layer 1, so that the conductive layer 1 can be reliably connected with the resistance layer 2.

It should be noted that, in the embodiment of the present invention, the plurality of particle clusters 4 are distributed on one surface of the resistive layer 2 at intervals, so as to avoid the conductive layer 1 from being in full direct contact with the resistive layer 2, and increase the adhesion between the conductive layer 1 and the resistive layer 2. The particle clusters 4 are distributed at intervals, so that when the resistivity of the particle clusters 4 is lower than that of the resistor layer 2 and the particle clusters 4 are adhered to each other, current flows to a passage formed by the adhesion of the particle clusters 4 after passing through a conductive end formed by the conductive layer 1, the resistor layer 2 loses the function, and the use of the resistor layer 2 is prevented from being influenced. In this embodiment, since the plurality of particle clusters 4 are distributed at intervals on one surface of the resistor layer 2, that is, the particle clusters 4 are not adhered to each other, the plurality of particle clusters 4 are not conducted to each other to form a resistor. In addition, in the middle of concrete implementation, because factors such as technological error, it is adjacent that there may be the part the condition of 4 adhesions of granule cluster, but whole granule cluster 4 is not mutual adhesion on the whole, it is right the utility model discloses the implementation of scheme influences little, consequently the utility model discloses easily realize form interval distribution's granule cluster 4 on the resistance layer 2, its technological requirement need not too harsh, is favorable to reduction in production cost.

As an alternative embodiment, the first metal particles are of a different material than the conductive layer 1. The first metal particles and the conductive layer 1 are made of different materials and have different resistivities, and when the resistivity of the first metal particles is lower than that of the conductive layer 1, the resistance circuit is formed by the embedded resistance metal foil, and then the influence of the first metal particles on the resistance circuit is smaller.

In an alternative embodiment, the surface of the resistive layer 2 provided with the particle clusters 4 is further provided with a plurality of second metal particles distributed at intervals, and the second metal particles are different from the material of the conductive layer 1. The second metal particles may be the same as or different from the first metal particles, and may be specifically set according to the actual use requirement. The second metal particles are preferably provided in the form of individual particles, rather than clusters, and the second metal particles may be alternately distributed with the particle clusters 4, i.e., one side of the resistive layer 2 is provided with both the individual second metal particles and the particle clusters 4. The number of particle clusters 4 and the number of second metal particles may be equal or different. The second metal particles and the particle clusters 4 are alternately distributed in a manner that one or more particle clusters 4 are distributed among a plurality of second metal particles distributed at intervals, or one or more second metal particles are distributed among a plurality of particle clusters 4 distributed at intervals. Also, because there may be process error, there may be the condition that has the adhesion of a plurality of adjacent second metal particle locally, but second metal particle interval distribution does not influence the implementation of the utility model discloses the scheme on the whole.

Specifically, the particle cluster 4 includes 2 to 100 first metal particles. The height H of the particle cluster 4 is 0.5-20 microns. The height of the particle cluster 4 is the distance between the highest point and the lowest point of the particle cluster 4 in the vertical direction. In a specific application, if the height of the particle clusters 4 is too small, good adhesion cannot be added to the conductive layer 1 and the resistive layer 2, and if the height of the particle clusters 4 is too large, pinholes may be generated in the conductive layer 1, thereby affecting the performance of the conductive layer 1. The height of the particle clusters 4 of the present embodiment is within a certain range, which ensures that the particle clusters 4 have a good effect of increasing the adhesion between the conductive layer 1 and the resistive layer 2. The number of the first metal particles may be set according to actual use requirements, and further details are not described herein.

Specifically, it should be noted that the particle clusters 4 may be randomly distributed on the resistive layer 2, and in order to further ensure the connection stability between the conductive layer 1 and the resistive layer 2, the plurality of particle clusters 4 in this embodiment are uniformly distributed on the resistive layer 2. By uniformly distributing a plurality of the particle clusters 4 on the resistive layer 2, the peel strength at each of the conductive layer 1 and the resistive layer 2 is made close, and the connection stability between the conductive layer 1 and the resistive layer 2 is further ensured. In implementation, a plurality of particle clusters 4 may be uniformly or randomly distributed on the resistive layer 2 by a conventional process such as an electroplating process, and the particle clusters 4 are not adhered. Furthermore, the heights of the particle clusters 4 are set to be consistent, so that the direct adhesive force of the conductive layer 1 and the resistance layer 2 is further improved, and the whole embedded metal foil is more flat. The combination of the two aspects, which is better when the particle clusters 4 are uniformly distributed and uniformly arranged in height, is used.

It should be noted that, the embedded resistive metal foil disclosed in this embodiment is used for manufacturing a resistive circuit, where the conductive layer 1 is manufactured through a process to form a conductive end, and the resistive layer 2 is manufactured through a process to form a resistor, when the embedded resistive metal foil is applied, the embedded resistive metal foil may be firstly laminated on a circuit board, and the embedded resistive metal foil is manufactured through a process to form a resistive circuit, or the embedded resistive metal foil is firstly laminated on a resistive circuit, and then the resistive circuit is laminated on the circuit board, so that the conductive end is conducted with an electrical device or a circuit on the circuit board, and the conductive end is conducted with the resistor, so that a conducted circuit is formed. The conductivity of the conductive layer 1 is greater than that of the resistive layer 2, and the conductivity of the conductive layer 1 is 2 to 1000 times that of the resistive layer 2. Of course, the conductivity of the conductive layer 1 and the conductivity of the resistive layer 2 may be set according to actual use requirements, and will not be further described herein.

Specifically, the resistance layer 2 in this embodiment includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon and phosphorus, for example, the resistance layer 2 may include an alloy such as a nickel-phosphorus alloy, or a metal such as nickel, or a combination of different metals such as nickel metal and chromium metal, or a combination of a nickel-phosphorus alloy and nickel metal, or a combination of nickel metal and silicon. Of course, the resistive layer 2 may also be made of other materials, which will not be described herein.

Specifically, the conductive layer 1 in this embodiment includes any one or more of aluminum, silver, copper, and gold. When the conductive layer 1 is made of copper, the buried resistance metal foil is a buried resistance copper foil product, and of course, the conductive layer 1 may also be made of other materials with good conductivity, which is not described herein. The thickness of the conductive layer 1 in this embodiment is 2 to 20 micrometers. The thickness of the conducting layer 1 is set to be 2-20 micrometers so as to meet the requirement of manufacturing a printed board fine circuit, and certainly, the thickness of the conducting layer 1 can be set to be other values according to the actual use requirement, which is not described herein.

In an optional embodiment, the buried barrier metal foil further includes a dielectric layer, and the dielectric layer is disposed on a surface of the resistive layer 2 away from the conductive layer 1. Specifically, the dielectric layer plays a role in carrying, and in a specific implementation, referring to fig. 3, the resistive layer 2 may be formed on the dielectric layer 6, and the dielectric layer 6 may protect the resistive layer 2. The dielectric layer 6 may be, but is not limited to, Polyimide (PI), in which case the dielectric layer 6 serves as a carrier, and the resistive layer 2 is formed on the dielectric layer 6, and the dielectric layer 6 does not need to be torn off when applied to a circuit board.

In another aspect, as shown in fig. 4, the dielectric layer may be a peelable carrier layer 5, which may be, but is not limited to, polyethylene terephthalate (PET), and where the peelable carrier layer 5 needs to be torn off when used in a circuit board. It will be readily appreciated that the peelable carrier layer 5 is also coated with the glue layer 3 to facilitate peeling, i.e. in the version shown in figure 4 the dielectric layer comprises the peelable carrier layer 5 and the glue layer 3. The thickness of the glue layer 3 can be set to be 10-100 angstroms, and the glue layer 3 is a peeling layer or a peeling agent, so that the peelable carrier layer 5 and the resistive layer 2 have good peeling strength, that is, the peelable carrier layer 5 is not easy to fall off, and the peelable carrier layer 5 can be well peeled off from the resistive layer 2 when the buried resistance metal foil is used subsequently. In addition, the glue layer 3 may also function to adjust the roughness of the resistive layer 2.

Correspondingly, the embodiment of the utility model provides a still provide a printing board, the printing board include bury hinder the metal forming. For example, when the resistive circuit is fabricated, the conductive layer 1 and the resistive layer 2 of the buried metal foil are etched according to a predetermined resistive circuit pattern, so as to obtain the desired resistive circuit. Illustratively, when a buried resistor needs to be designed in a certain area of the printed circuit board, the conductive layer 1 of the preset area may be etched to expose the resistive layer 2 of the preset area, and the corresponding particle clusters 4 on the preset area may be not etched or may be etched.

Referring to fig. 5, correspondingly, an embodiment of the present invention further provides a method for manufacturing a buried resistance metal foil, including:

step S101, forming the resistive layer 2;

a step S102 of forming a plurality of particle clusters 4 distributed at intervals on one surface of the resistive layer 2; wherein the particle cluster 4 consists of a plurality of first metal particles;

step S103 of forming a conductive layer 1 on a surface of the resistive layer 2 on which the particle clusters 4 are formed; wherein the first metal particles are of a different material than the conductive layer 1.

In an alternative embodiment, the step S101 "forming the resistive layer 2" specifically includes:

providing a medium layer 6;

forming a resistance layer 2 on one surface of the dielectric layer 6; in particular implementations, the resistive layer 2 may be formed on the dielectric layer 6 by a conventional process such as a coating or plating process.

In this embodiment, a plurality of particle clusters 4 may be formed on the resistive layer 2 by a conventional process such as a plating process. Since the plurality of particle clusters 4 are distributed at intervals on one surface of the resistive layer 2, the particle clusters 4 are not adhered to each other. In the middle of the concrete implementation, because factors such as process error, probably lead to the adhesion of a plurality of adjacent granule cluster 4, nevertheless the influence can not be very big, consequently the utility model discloses easily realize form interval distribution's granule cluster 4 on the resistance layer 2, its technological requirement need not too harsh, is favorable to reduction in production cost.

In an alternative embodiment, in the step S103 "forming the conductive layer 1 on the side of the resistive layer 2 where the particle clusters 4 are formed", the conductive layer 1 may be formed on the side of the resistive layer 2 where the particle clusters 4 are formed by a conventional process, such as one or more processes of electroplating, coating, or vacuum sputtering. In an implementation, the conductive layer 1 may be formed by combining a plurality of processes, for example, a vacuum sputtering process is used to sputter a metal layer on one surface of the resistive layer 2 on which the particle clusters 4 are formed, and then an electroplating process is used to form another metal layer on the sputtered metal layer, where the two metal layers together form the conductive layer 1. Of course, the process for forming the conductive layer 1 on the resistive layer 2 is more, and will not be further described herein.

To sum up, the embodiment of the present invention provides a plurality of spaced particle clusters 4 on one surface of the resistance layer 2, and a conductive layer 1 is disposed on the surface of the resistance layer 2 where the particle clusters 4 are disposed, so that the conductive layer 1 covers the resistance layer 2 and the particle clusters 4, thereby avoiding the problem of uneven resistance of different positions of the resistance layer due to uneven surface roughness of the copper foil directly contacting the resistance layer in the prior art, so as to reduce the difference of resistance of different positions of the resistance layer, and further facilitating the design of high-precision buried resistors; in addition, the particle clusters 4 are composed of a plurality of first metal particles, and the surface roughness is increased relative to that of a single metal particle, thereby being beneficial to increasing the adhesion of the conductive layer 1, so that the conductive layer 1 can be reliably connected with the resistance layer 2.

Example two

As shown in fig. 6, the present embodiment is different from the first embodiment only in that the plurality of particle clusters 4 of the present embodiment are distributed on one surface of the conductive layer 1 at intervals, and the plurality of particle clusters 4 are covered by the resistive layer 2. The technical effect of this embodiment is the same as that of the first embodiment, but the embodiment is different in the preparation method. In one embodiment of the present invention, the particle clusters 4 are formed on the conductive layer 1, the resistive layer 2 is additionally formed, and the surface of the conductive layer 1 on which the particle clusters 4 are formed is attached to the resistive layer 2.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and replacements can be made without departing from the technical principle of the present invention, and these modifications and replacements should also be regarded as the protection scope of the present invention.

Claims

1. A buried resistance metal foil includes a resistance layer, a conductive layer, and a plurality of particle clusters; the conducting layer and the resistance layer are arranged in a laminated mode;

2. The buried resistive metal foil of claim 1, wherein a plurality of the particle clusters are uniformly distributed on the resistive layer or the conductive layer.

3. The buried resistive metal foil of claim 1, wherein the resistive layer or the conductive layer is further provided with a plurality of second metal particles spaced apart on the surface provided with the particle clusters.

4. The buried resistive metal foil of claim 1, wherein the particle cluster comprises a number of the first metal particles in a range from 2 to 100.

5. The buried resistive metal foil of claim 1, wherein the height of the particle clusters is between 0.5 microns and 20 microns.

6. The buried resistive metal foil of claim 1, wherein the conductive layer has a thickness of 2 to 20 microns.

7. The buried resistive metal foil of claim 1, wherein the conductive layer is any one of aluminum, silver, copper, and gold.

8. The buried resistive metal foil of claim 1, wherein the conductive layer has an electrical conductivity 2 to 1000 times that of the resistive layer.

9. The buried resistive metal foil of any one of claims 1-8, further comprising a dielectric layer disposed on a side of the resistive layer remote from the conductive layer.