CN114521058B - Printed board with buried resistor and preparation method thereof - Google Patents
Printed board with buried resistor and preparation method thereof Download PDFInfo
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- CN114521058B CN114521058B CN202011304684.6A CN202011304684A CN114521058B CN 114521058 B CN114521058 B CN 114521058B CN 202011304684 A CN202011304684 A CN 202011304684A CN 114521058 B CN114521058 B CN 114521058B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 232
- 229910052751 metal Inorganic materials 0.000 claims description 38
- 239000002184 metal Substances 0.000 claims description 38
- 239000011888 foil Substances 0.000 claims description 32
- 238000004519 manufacturing process Methods 0.000 claims description 31
- 239000002923 metal particle Substances 0.000 claims description 26
- 238000005530 etching Methods 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 20
- 239000011241 protective layer Substances 0.000 claims description 12
- 239000002245 particle Substances 0.000 claims description 9
- 230000002378 acidificating effect Effects 0.000 claims description 8
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 claims description 6
- 238000005260 corrosion Methods 0.000 claims description 6
- 238000003825 pressing Methods 0.000 claims description 6
- 230000007797 corrosion Effects 0.000 claims description 4
- 235000019270 ammonium chloride Nutrition 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 3
- BZSXEZOLBIJVQK-UHFFFAOYSA-N 2-methylsulfonylbenzoic acid Chemical compound CS(=O)(=O)C1=CC=CC=C1C(O)=O BZSXEZOLBIJVQK-UHFFFAOYSA-N 0.000 claims description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 239000000463 material Substances 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910001096 P alloy Inorganic materials 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
The invention relates to the technical field of printed boards and discloses a printed board with a buried resistor and a preparation method thereof.
Description
Technical Field
The invention relates to the technical field of printed boards, in particular to a printed board with a buried resistor and a preparation method thereof.
Background
At present, along with the development trend of miniaturization of electronic products, higher requirements are put on the packaging density and the volume of the electronic products, and passive devices such as resistors and the like are buried in a printed board, so that the electronic products are an effective means for reducing the size of the electronic products.
In the existing method for preparing the printed board with the buried resistor, the finished product of the resistor copper foil is generally pressed with the printed board, and then the resistor copper foil is etched, so that the buried resistor pattern and the conductive end are manufactured, but if the resistor copper foil is unqualified in manufacturing the buried resistor pattern and the conductive end, the operation flows such as pressing, etching and the like are needed to be performed again, so that the preparation efficiency is low.
Disclosure of Invention
The embodiment of the invention aims to provide a printed board with a buried resistor and a preparation method thereof, which can improve the preparation efficiency of the printed board with the buried resistor.
In order to solve the above technical problems, an embodiment of the present invention provides a method for manufacturing a printed board with a buried resistor, including:
providing a buried resistive metal foil; the buried resistance metal foil comprises a conductive layer, a resistance layer and a dielectric layer, wherein the resistance layer is arranged between the conductive layer and the dielectric layer;
Manufacturing the conductive layer and the resistance layer to form a resistance circuit; wherein, the resistor layer after finishing the resistor circuit manufacture is partially exposed; the resistor circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by the resistor layer;
pressing the embedded resistor metal foil after finishing resistor circuit manufacture with the printed board to obtain the printed board with the embedded resistor; wherein, the dielectric layer pressfitting is on the printed board.
Preferably, the buried resistive metal foil further comprises a plurality of conductive bumps;
The conductive protrusions are distributed on one surface of the resistor layer at intervals, and the conductive protrusions are covered by the conductive layer.
Preferably, the plurality of conductive protrusions are first metal particles and/or particle clusters composed of a plurality of second metal particles.
As a preferred scheme, after the embedded resistor metal foil after the resistor circuit is manufactured is pressed with the printed board to obtain the printed board with the embedded resistor, the method further comprises the steps of:
and a protective layer is covered on the exposed part of the resistance layer.
Preferably, the height position of the surface of the protective layer, which is far away from the resistance layer, is lower than the height position of the surface of the conductive end, which is far away from the resistance layer, in the vertical direction.
Preferably, the protective layer is solder resist ink.
Preferably, the manufacturing of the conductive layer and the resistive layer to form a resistive circuit specifically includes:
covering a first dry film on the conductive layer;
Exposing and developing the first dry film covered on the conductive layer to obtain a first resist layer with a preset pattern;
etching the conductive layer and the resistive layer not covered by the first resist layer with an acidic etching solution to obtain the conductive layer and the resistive layer having the predetermined pattern;
Removing the first resist layer;
Covering a second dry film on the conductive layer to be used for manufacturing a conductive end area, and exposing and developing the second dry film to form a second corrosion resistant layer on the conductive layer to be used for manufacturing the conductive end area;
Etching the conductive layer uncovered by the second resist layer with an alkaline etching solution to form a conductive terminal on the conductive layer;
And removing the second corrosion resistance layer to obtain a resistance circuit, wherein the resistance circuit comprises a conductive end formed by the conductive layer and a circuit layer formed by the resistance layer.
Preferably, the alkaline etching solution is an alkaline etching solution of an ammonium chloride and ammonia system.
In order to solve the same technical problems, the embodiment of the invention also provides a printed board with the embedded resistor, which is prepared by using the preparation method of the printed board with the embedded resistor.
The embodiment of the invention has the following beneficial effects:
The printed board with the embedded resistor and the preparation method thereof provided by the embodiment of the invention comprise the steps of firstly providing the embedded resistor metal foil, wherein the embedded resistor metal foil comprises a conductive layer, a dielectric layer and a resistor layer arranged between the conductive layer and the dielectric layer, manufacturing the conductive layer and the resistor layer to form a resistor circuit, and then pressing the embedded resistor metal foil after the resistor circuit is manufactured with the printed board to obtain the printed board with the embedded resistor.
Drawings
FIG. 1 is a flow chart of a method for manufacturing a printed board with buried resistors in an embodiment of the present invention;
FIG. 2 is a schematic view of a buried resistive metal foil in accordance with an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a printed board obtained through step S1022 in the embodiment of the present invention;
fig. 4 is a schematic structural diagram of a printed board obtained through step S1024 in the embodiment of the present invention;
fig. 5 is a schematic structural diagram of a printed board obtained through step S1025 in the embodiment of the present invention;
Fig. 6 is a schematic structural diagram of a printed board obtained through step S1026 in the embodiment of the present invention;
FIG. 7 is a schematic diagram of a printed board with buried resistors in an embodiment of the present invention;
fig. 8 is a schematic structural view of a printed board including a protective layer and conductive bumps in an embodiment of the present invention.
Wherein, 1, a conductive layer; 11. a conductive terminal; 2. a resistive layer; 4. a conductive bump; 5. a dielectric layer; 6. a protective layer; 7. a printed board; 8. a first resist layer; 9. and a second resist layer.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a flowchart of a method for manufacturing a printed board with embedded resistor according to an embodiment of the invention.
The preparation method of the printed board with the buried resistor comprises the following steps:
Step S101, providing a buried resistance metal foil; the buried resistance metal foil comprises a conductive layer 1, a resistance layer 2 and a dielectric layer 5, wherein the resistance layer 2 is arranged between the conductive layer 1 and the dielectric layer 5;
Step S102, manufacturing the conductive layer 1 and the resistor layer to form a resistor circuit; wherein, the resistor layer 2 after finishing the resistor circuit manufacture is partially exposed; the resistor circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by the resistor layer;
step S103, pressing the embedded resistance metal foil after the resistor circuit is manufactured with the printed board 7 to obtain a printed board with embedded resistance, as shown in FIG. 7; wherein, dielectric layer 5 pressfitting is on printed plate 7.
In the embodiment of the invention, firstly, a buried resistor metal foil is provided, the buried resistor metal foil comprises a conductive layer 1, a dielectric layer 5 and a resistor layer 2 arranged between the conductive layer 1 and the dielectric layer 5, the conductive layer 1 and the resistor layer 2 are manufactured to form a resistor circuit, and then the buried resistor metal foil after the resistor circuit is manufactured is pressed with a printed board 7, so that the printed board with the buried resistor is obtained.
In an alternative embodiment, the buried resistive metal foil further comprises a plurality of conductive bumps 4; the conductive protrusions 4 are made of a material different from that of the conductive layer 1, a plurality of conductive protrusions 4 are distributed on one surface of the resistive layer 2 at intervals, and the conductive protrusions 4 are covered by the conductive layer 1. Set up a plurality of interval distribution's conductive protruding 4 through the one side of resistive layer 2 to set up conductive layer 1 on the one side of resistive layer 2 that is equipped with conductive protruding 4, so that conductive layer 2 covers on resistive layer 2 and conductive protruding 4, avoided among the prior art because the inhomogeneous copper foil of surface roughness directly contacts with the resistive layer and leads to the resistive layer inhomogeneous, cause the different problem of resistance of the unit area of resistive layer each direction, with the difference of the resistance of the unit area of each direction that reduces the resistive layer, and then be convenient for design high accuracy buried resistor.
It should be noted that, in the embodiment of the present invention, the conductive bump 4 is disposed between the resistive layer 2 and the conductive layer 1, so that the conductive layer 1 is prevented from directly contacting the resistive layer 2, and the adhesion between the conductive layer 1 and the resistive layer 2 is increased. The conductive protrusions 4 are distributed at intervals, so that when the resistivity of the conductive protrusions 4 is lower than that of the resistor layer 2, when the conductive protrusions 4 are adhered to each other, current flows to a passage formed by adhesion of the conductive protrusions 4 after passing through a conductive end formed by the conductive layer 1, the resistor layer 2 is disabled, and the use of the resistor layer 2 is affected. In this embodiment, since the plurality of conductive bumps 4 are spaced apart on one surface of the resistive layer 2, that is, the conductive bumps 4 are not adhered to each other, the plurality of conductive bumps 4 are not conducted to each other to form a resistor. In addition, in the implementation, due to factors such as process errors, a plurality of adjacent conductive protrusions 4 may adhere, but the influence is not very large, so that the invention is easy to form the conductive protrusions 4 distributed at intervals on the resistor layer 2, the process requirements are not required to be too severe, and the production cost is reduced.
Specifically, each of the conductive bumps 4 is a first metal particle or a particle cluster composed of a plurality of second metal particles; or a part of the conductive bumps 4 are first metal particles, and another part of the conductive bumps 4 are clusters of second metal particles. The materials of the first metal particles and the second metal particles may be the same or different. The first metal particles are individual particles, the first metal particles are distributed at intervals, and the particle clusters formed by a plurality of second metal particles are also distributed at intervals, so that the first metal particles and the particle clusters are alternately distributed, one or more particle clusters are distributed among a plurality of first metal particles distributed at intervals, or one or more second metal particles are distributed among a plurality of particle clusters distributed at intervals. When the conductive bump 4 is a particle cluster composed of a plurality of second metal particles, it increases the surface roughness with respect to a single metal particle, thereby facilitating an increase in the adhesion of the conductive layer 1, so that the conductive layer 1 can be reliably connected with the resistive layer 2.
As an alternative embodiment, the first metal particles are of a different material than the conductive layer 1. The first metal particles and the conductive layer 1 are made of different materials, the resistivity of the first metal particles and the resistivity of the conductive layer 1 are different, and when the resistivity of the first metal particles is lower than that of the conductive layer 1, after the resistive metal foil is buried to form the resistive circuit, the influence of the first metal particles on the resistive circuit is smaller. Correspondingly, the second metal particles may also be chosen to be of a different material than the conductive layer 1. The materials of both the first metal particles and the second metal particles may be the same or different.
Specifically, the height H of the conductive bump 4 in the present embodiment is 0.5 to 20 micrometers. The height H of the conductive bump 4 is a distance between the highest point and the lowest point of the conductive bump 4 in the vertical direction. In a specific application, if the height of the conductive bump 4 is too small, a good adhesion force cannot be added to the conductive layer 1 and the resistive layer 2, and if the height of the conductive bump 4 is too large, pinholes may be generated in the conductive layer 1, thereby affecting the performance of the conductive layer 1. The present embodiment ensures that the conductive bump 4 has a good effect of increasing the adhesion between the conductive layer 1 and the resistive layer 2 by setting the height of the conductive bump 4 to 0.5 to 20 micrometers. Of course, the height of the conductive bump 4 may be set to other values according to practical requirements, which will not be described in detail herein.
It should be noted that the conductive bumps 4 may be randomly distributed on the resistive layer 2, and in order to further ensure the connection stability between the conductive layer 1 and the resistive layer 2, the conductive bumps 4 in this embodiment are uniformly distributed on the resistive layer 2. The conductive protrusions 4 are uniformly distributed on the resistance layer 2, so that the peel strength of each connecting position of the conductive layer 1 and the resistance layer 2 is relatively close, and the connection stability between the conductive layer 1 and the resistance layer 2 is further ensured. In a specific implementation, a plurality of conductive bumps 4 are formed on the resistor layer 2 by a conventional process such as an electroplating process, and the conductive bumps 4 are ensured not to adhere. Furthermore, the height of the conductive bump 4 is set to be consistent, so that the direct adhesion between the conductive layer 1 and the resistive layer 2 is further improved, and the whole embedded resistive metal foil is smoother. The effect is better when the conductive bumps 4 are uniformly distributed and the heights are set to be uniform, and these two aspects are applied in combination.
It should be noted that, the resistive metal foil is used to make a resistive circuit, where the conductive layer 1 is made to form a conductive end by a process, and the resistive layer 2 is made to form a resistor by a process, when the resistive metal foil is applied, the resistive metal foil may be pressed onto a circuit board to form a resistive circuit by a process, or the resistive metal foil is pressed onto a circuit board to form a resistive circuit, the conductive end is conducted with an electrical device or circuit on the circuit board, and the conductive end is conducted with a resistor to form a conductive circuit, so that the conductivity of the conductive layer 1 is greater than that of the resistive layer 2, and the conductivity of the conductive layer 1 is 2-1000 times that of the resistive layer 2, for example. Of course, the conductivity of the conductive layer 1 and the conductivity of the resistive layer 2 may be set according to actual use requirements, and will not be described in more detail herein. Specifically, the resistive layer 2 in this embodiment includes any one metal of nickel, chromium, platinum, palladium, and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, and phosphorus, for example, the resistive layer 2 may include an alloy such as a nickel-phosphorus alloy, or a metal such as nickel, or a combination of different metals such as a nickel metal and a chromium metal, or a combination of a nickel-phosphorus alloy and a nickel metal, or a combination of a nickel metal and silicon, or the like. Of course, the resistive layer 2 may be made of other materials, which will not be described in more detail herein.
Specifically, the conductive layer 1 in the present embodiment includes any one or more of aluminum, silver, copper, and gold. When the conductive layer 1 is made of copper, the buried resistive metal foil is a buried resistive copper foil product, and of course, the conductive layer 1 may be made of other materials with good conductivity, which will not be described in detail herein. The thickness of the conductive layer 1 in this embodiment is2 micrometers to 20 micrometers. The thickness of the conductive layer 1 is set to be 2 micrometers to 20 micrometers to meet the requirement of manufacturing fine circuits of the printed board, and of course, the thickness of the conductive layer 1 can be set to other values according to actual use requirements, and no further description is given here.
Specifically, the dielectric layer 5 serves as a substrate for carrying, and in implementation, the resistive layer 2 may be formed on the dielectric layer 5, while the dielectric layer 5 may protect the resistive layer 2. The dielectric layer 5 is selected from, for example, but not limited to, polyimide (PI) or polyethylene terephthalate (PET).
Referring to fig. 8, in an alternative embodiment, after the step S103 "pressing the buried resistor metal foil after completing the manufacture of the resistor circuit with the printed board 7 to obtain the printed board with the buried resistor", the method further includes:
A protective layer 6 is provided over the exposed portion of the resistive layer 2.
In a specific application, the thickness of the resistance layer of the buried resistor is relatively small, so that the buried resistor in the conventional printed board is easily broken in actual use, and thus resistance change is caused. According to the embodiment of the invention, the protection layer 6 is coated on the exposed part of the resistance layer 2, so that the stress of the resistance layer 2 is eliminated, the resistance layer 2 is prevented from being broken, the resistance change caused by the breakage of the resistance layer 2 is avoided, the surface of the resistance layer 2 is effectively protected, the resistance change caused by the damage of the surface of the resistance layer 2 is prevented, and the resistance precision is ensured.
As shown in fig. 8, specifically, the height position of the surface of the protective layer 6 away from the resistor layer 2 in the vertical direction is lower than the height position of the surface of the conductive end 11 away from the resistor layer 2 in the vertical direction, which is equivalent to forming a reinforcing rib, increasing the overall structural strength of the buried resistor and the conductive end 11, and further preventing the resistor layer 2 from breaking, thereby ensuring the resistor precision. Of course, the protective layer 6 may also be flat, and will not be described in detail herein.
In the embodiment of the present invention, the protective layer 6 is solder resist ink.
As shown in fig. 3 to 6, in an alternative embodiment, the step S102 "the conductive layer 1 and the resistive layer 2 are fabricated to form a resistive circuit", specifically includes steps S1021 to S1027:
Step S1021, forming a first dry film on the conductive layer 1; the step is to paste the dry film for the first time.
Step S1022, exposing and developing the first dry film covered on the conductive layer 1 to obtain a first resist layer 8 with a preset pattern; wherein, the shape and the size of the first anti-corrosion layer 8 are matched with those of the resistance circuit to be manufactured. In this step, the exposure and development are adopted to protect the areas corresponding to the two conductive ends 11 and the areas corresponding to the buried resistor, and after the areas are exposed and developed, the areas are not etched by the acidic etching solution in the step S1023, but the resistor layer 2 and the conductive layer 1in the areas with non-design dimensions of the product structure are etched;
step S1023, etching the conductive layer 1 and the resistive layer 2 not covered by the first resist layer 8 with an acidic etching solution to obtain the conductive layer and the resistive layer having the predetermined pattern, as shown in fig. 3. The acidic etching liquid is an acidic etching liquid of a sodium chlorate system. This step is the first etch.
In step S1024, the first resist layer 8 is removed. The first resist layer 8 may be removed with a sodium hydroxide solution in particular;
step S1025, covering a second dry film on the conductive layer to be used for manufacturing the conductive end region, and exposing and developing the second dry film to form a second resist layer 9 on the conductive layer to be used for manufacturing the conductive end region, as shown in fig. 4; wherein, the shape and the size of the second anti-corrosion layer 9 are matched with those of the conductive end 11 to be manufactured. Because the buried resistor finally needs to leave the resistor layer 2 with the designed size corresponding area, and the conductive layer 1 corresponding to the non-conductive end position above the resistor layer 2 needs to be etched completely, in the step, a second dry film is attached above the conductive end 11, and the step is to attach the dry film for the second time, so as to protect the conductive end 11 from being etched;
Step S1026 of etching the conductive layer uncovered by the second resist layer with an alkaline etching solution to form a conductive terminal 11 on the conductive layer, as shown in fig. 5; the alkaline etching solution is an alkaline etching solution of an ammonium chloride and ammonia water system. The step is a second etching;
In step S1027, the second resist layer 9 is removed, and a resistive circuit is obtained, where the resistive circuit includes a conductive terminal 11 formed by a conductive layer and a circuit layer formed by a resistive layer, as shown in fig. 6. I.e. the second dry film is removed, in particular the second resist layer 9 may be removed with sodium hydroxide solution.
Correspondingly, the embodiment of the invention also provides a printed board with the embedded resistor, which is prepared by using the preparation method of the printed board with the embedded resistor.
In summary, the printed board with the embedded resistor and the preparation method thereof provided by the embodiment of the invention firstly provide an embedded resistor metal foil, the embedded resistor metal foil comprises a conductive layer 1, a dielectric layer 5 and a resistor layer 2 arranged between the conductive layer 1 and the dielectric layer 5, the conductive layer 1 and the resistor layer 2 are manufactured to form a resistor circuit, and then the embedded resistor metal foil after the resistor circuit is manufactured is pressed with the printed board 7, so that the printed board with the embedded resistor is obtained.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and substitutions can be made by those skilled in the art without departing from the technical principles of the present invention, and these modifications and substitutions should also be considered as being within the scope of the present invention.
Claims (9)
1. The preparation method of the printed board with the buried resistor is characterized by comprising the following steps of:
providing a buried resistive metal foil; the buried resistance metal foil comprises a conductive layer, a resistance layer and a dielectric layer, wherein the resistance layer is arranged between the conductive layer and the dielectric layer;
manufacturing the conductive layer and the resistor layer to form a resistor circuit; wherein, the resistor layer after finishing the resistor circuit manufacture is partially exposed; the resistor circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by the resistor layer;
pressing the embedded resistor metal foil after finishing resistor circuit manufacture with the printed board to obtain the printed board with the embedded resistor; the dielectric layer is pressed on the printed board;
the buried resistive metal foil further comprises a plurality of conductive bumps;
The conductive protrusions are distributed on one surface of the resistor layer at intervals, and the conductive protrusions are covered by the conductive layer.
2. The method for manufacturing a printed board with embedded resistor according to claim 1, wherein the plurality of conductive bumps are first metal particles and/or particle clusters composed of a plurality of second metal particles.
3. The method for manufacturing a printed board with embedded resistor according to claim 1, wherein after the embedded resistor metal foil after the resistor circuit is manufactured is pressed with the printed board to obtain the printed board with embedded resistor, the method further comprises:
and a protective layer is covered on the exposed part of the resistance layer.
4. The method for manufacturing a printed board with a buried resistor according to claim 3, wherein a height position in a vertical direction of a side of the protective layer away from the resistor layer is lower than a height position in a vertical direction of a side of the conductive terminal away from the resistor layer.
5. The method of manufacturing a printed board with embedded resistors of claim 3, wherein the protective layer is solder resist ink.
6. The method for manufacturing a printed board with embedded resistor according to any one of claims 1 to 5, wherein the manufacturing the conductive layer and the resistive layer to form a resistive circuit specifically comprises:
covering a first dry film on the conductive layer;
Exposing and developing the first dry film covered on the conductive layer to obtain a first resist layer with a preset pattern;
etching the conductive layer and the resistive layer not covered by the first resist layer with an acidic etching solution to obtain the conductive layer and the resistive layer having the predetermined pattern;
Removing the first resist layer;
Covering a second dry film on the conductive layer to be used for manufacturing a conductive end area, and exposing and developing the second dry film to form a second corrosion resistant layer on the conductive layer to be used for manufacturing the conductive end area;
Etching the conductive layer uncovered by the second resist layer with an alkaline etching solution to form a conductive terminal on the conductive layer;
And removing the second corrosion resistance layer to obtain a resistance circuit, wherein the resistance circuit comprises a conductive end formed by the conductive layer and a circuit layer formed by the resistance layer.
7. The method for manufacturing a printed board with a buried resistor according to claim 6, wherein the acidic etching solution is an acidic etching solution of sodium chlorate system.
8. The method for manufacturing a printed board with embedded resistor according to claim 6, wherein the alkaline etching solution is an alkaline etching solution of ammonium chloride or ammonia water system.
9. A printed board with embedded resistor, characterized in that the printed board with embedded resistor is prepared by the preparation method of the printed board with embedded resistor according to any one of claims 1-8.
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