CN114521058A - Printed board with buried resistor and preparation method thereof - Google Patents
Printed board with buried resistor and preparation method thereof Download PDFInfo
- Publication number
- CN114521058A CN114521058A CN202011304684.6A CN202011304684A CN114521058A CN 114521058 A CN114521058 A CN 114521058A CN 202011304684 A CN202011304684 A CN 202011304684A CN 114521058 A CN114521058 A CN 114521058A
- Authority
- CN
- China
- Prior art keywords
- layer
- conductive
- printed board
- resistance
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
The invention relates to the technical field of printed boards, and discloses a printed board with a buried resistor and a preparation method thereof.
Description
Technical Field
The invention relates to the technical field of printed boards, in particular to a printed board with a buried resistor and a preparation method thereof.
Background
At present, with the development trend of miniaturization of electronic products, higher requirements are put on the packaging density and the volume of the electronic products, and embedding passive devices such as resistors into a printed board is an effective means for reducing the size of the electronic products.
In the existing method for manufacturing the printed board with the buried resistor, the finished product of the resistor copper foil is generally pressed with the printed board, and then the resistor copper foil is etched, so as to manufacture the buried resistor pattern and the conductive end, however, if the resistor copper foil is unqualified in manufacturing the buried resistor pattern and the conductive end, the operation processes such as pressing and etching need to be performed again, and the manufacturing efficiency is low.
Disclosure of Invention
The embodiment of the invention aims to provide a printed board with a buried resistor and a preparation method thereof, which can improve the preparation efficiency of the printed board with the buried resistor.
In order to solve the technical problem, an embodiment of the present invention provides a method for manufacturing a printed board with a buried resistor, including:
providing a buried resistance metal foil; the embedded resistance metal foil comprises a conductive layer, a resistance layer and a dielectric layer, wherein the resistance layer is arranged between the conductive layer and the dielectric layer;
manufacturing the conductive layer and the resistance layer to form a resistance circuit; the resistor circuit is manufactured by a resistor wire manufacturing method, wherein the resistor wire is manufactured by a resistor wire manufacturing method; the resistance circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by a resistance layer;
pressing the buried resistor metal foil after the resistor circuit is manufactured with the printed board to obtain the printed board with the buried resistor; and the dielectric layer is pressed on the printed board.
Preferably, the buried resistance metal foil further comprises a plurality of conductive bumps;
the conductive protrusions are distributed on one surface of the resistance layer at intervals, and the conductive protrusions are covered by the conductive layer.
Preferably, the plurality of conductive protrusions are first metal particles and/or particle clusters composed of a plurality of second metal particles.
As a preferred scheme, after the buried resistor metal foil after the resistor circuit is manufactured is laminated with the printed board to obtain the printed board with the buried resistor, the method further includes:
and covering a protective layer on the exposed part of the resistance layer.
Preferably, the height position of the surface of the protective layer away from the resistive layer in the vertical direction is lower than the height position of the surface of the conductive end away from the resistive layer in the vertical direction.
Preferably, the protective layer is solder resist ink.
As a preferred scheme, the manufacturing the conductive layer and the resistive layer to form a resistive circuit specifically includes:
covering a first dry film on the conductive layer;
exposing and developing the first dry film covered on the conductive layer to obtain a first anti-corrosion layer with a preset pattern;
etching the conductive layer and the resistive layer not covered by the first resist layer with an acidic etching solution to obtain the conductive layer and the resistive layer having the preset pattern;
removing the first resist layer;
covering a second dry film on the conducting layer to be used for manufacturing a conducting end area, exposing and developing the second dry film to form a second anti-etching layer on the conducting layer to be used for manufacturing a conducting end area;
etching the conductive layer not covered by the second resist layer with an alkaline etching solution to form a conductive terminal on the conductive layer;
and removing the second resist layer to obtain a resistance line, wherein the resistance line comprises a conductive end formed by a conductive layer and a line layer formed by a resistance layer.
Preferably, the alkaline etching solution is an ammonium chloride or ammonia water system alkaline etching solution.
In order to solve the same technical problem, the embodiment of the invention also provides a printed board with the buried resistor, wherein the printed board with the buried resistor is prepared by using the preparation method of the printed board with the buried resistor.
The embodiment of the invention has the following beneficial effects:
the embodiment of the invention provides a printed board with a buried resistor and a preparation method thereof, and the preparation method comprises the steps of firstly providing a buried resistor metal foil, wherein the buried resistor metal foil comprises a conducting layer, a dielectric layer and a resistor layer arranged between the conducting layer and the dielectric layer, manufacturing the conducting layer and the resistor layer to form a resistor circuit, and then laminating the buried resistor metal foil after the resistor circuit is manufactured with the printed board to obtain the printed board with the buried resistor.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a printed board with a buried resistor according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a buried barrier metal foil in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of the printed board obtained in step S1022 in the embodiment of the present invention;
fig. 4 is a schematic structural diagram of the printed board obtained in step S1024 in the embodiment of the present invention;
fig. 5 is a schematic structural diagram of the printed board obtained in step S1025 in the embodiment of the present invention;
fig. 6 is a schematic structural diagram of the printed board obtained in step S1026 in the embodiment of the present invention;
fig. 7 is a schematic structural diagram of a printed board with a buried resistor in an embodiment of the present invention;
fig. 8 is a schematic structural view of a printed board including a protective layer and conductive bumps in an embodiment of the present invention.
Wherein, 1, a conductive layer; 11. a conductive terminal; 2. a resistive layer; 4. a conductive bump; 5. a dielectric layer; 6. a protective layer; 7. printing a board; 8. a first resist layer; 9. a second resist layer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart illustrating a method for manufacturing a printed board with a buried resistor according to an embodiment of the present invention.
The preparation method of the printed board with the buried resistor comprises the following steps:
step S101, providing a buried resistance metal foil; the buried resistance metal foil comprises a conducting layer 1, a resistance layer 2 and a dielectric layer 5, wherein the resistance layer 2 is arranged between the conducting layer 1 and the dielectric layer 5;
step S102, manufacturing the conducting layer 1 and the resistance layer to form a resistance circuit; wherein, the part of the resistance layer 2 after the resistance circuit is manufactured is exposed; the resistance circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by a resistance layer;
step S103, pressing the buried resistor metal foil after the resistor circuit is manufactured with the printed board 7 to obtain a printed board with a buried resistor, as shown in fig. 7; wherein, the dielectric layer 5 is pressed on the printed board 7.
In the embodiment of the invention, firstly, a buried resistance metal foil is provided, the buried resistance metal foil comprises a conducting layer 1, a dielectric layer 5 and a resistance layer 2 arranged between the conducting layer 1 and the dielectric layer 5, the conducting layer 1 and the resistance layer 2 are manufactured to form a resistance line, and then the buried resistance metal foil after the resistance line is manufactured is laminated with a printed board 7, so that the printed board with the buried resistance is obtained.
In an alternative embodiment, the buried barrier metal foil further comprises a plurality of conductive bumps 4; the conductive bumps 4 are made of a different material from the conductive layer 1, a plurality of the conductive bumps 4 are distributed on one surface of the resistive layer 2 at intervals, and the plurality of the conductive bumps 4 are covered by the conductive layer 1. Set up a plurality of interval distribution's electrically conductive protruding 4 on the one side through resistance layer 2 to set up conducting layer 1 on the one side of resistance layer 2 that is equipped with electrically conductive protruding 4, so that conducting layer 2 covers on resistance layer 2 and electrically conductive protruding 4, avoided among the prior art because the inhomogeneous copper foil of roughness directly contacts with the resistance layer and leads to the resistance layer inhomogeneous, cause the problem that the resistance of the unit area of resistance layer each direction is different, with the difference of the resistance of the unit area of reduction resistance layer each direction, and then be convenient for design the buried resistor of high accuracy.
It should be noted that, in the embodiment of the present invention, the conductive protrusion 4 is disposed between the resistive layer 2 and the conductive layer 1, so as to avoid direct contact between the conductive layer 1 and the resistive layer 2, and increase adhesion between the conductive layer 1 and the resistive layer 2. The conductive bumps 4 are distributed at intervals, so that the situation that the resistivity of the conductive bumps 4 is lower than that of the resistive layer 2 is avoided, and when the conductive bumps 4 are mutually adhered, current flows to a passage formed by the adhesion of the conductive bumps 4 after passing through a conductive end formed by the conductive layer 1, so that the resistive layer 2 loses effect and the use of the resistive layer 2 is influenced. In this embodiment, the conductive bumps 4 are distributed on one surface of the resistive layer 2 at intervals, that is, the conductive bumps 4 are not adhered to each other, so that the conductive bumps 4 are not conducted to each other to form a resistor. In addition, in the specific implementation, due to factors such as process errors, a plurality of adjacent conductive protrusions 4 may be adhered, but the influence is not great, so that the conductive protrusions 4 distributed at intervals are easily formed on the resistance layer 2, the process requirements are not too strict, and the production cost is favorably reduced.
Specifically, each of the conductive bumps 4 is a first metal particle or a particle cluster composed of a plurality of second metal particles; or a part of the conductive bumps 4 are first metal particles, and another part of the conductive bumps 4 are particle clusters composed of a plurality of second metal particles. The materials of the first metal particles and the second metal particles may be the same or different. The first metal particles are individually granular, the first metal particles are distributed at intervals, and the particle clusters formed by a plurality of second metal particles are also distributed at intervals. When the conductive protrusions 4 are a particle cluster composed of a plurality of second metal particles, the surface roughness thereof is increased relative to that of a single metal particle, thereby advantageously increasing the adhesion of the conductive layer 1, so that the conductive layer 1 can be reliably connected to the resistive layer 2.
As an alternative embodiment, the first metal particles are of a different material than the conductive layer 1. The first metal particles and the conductive layer 1 are made of different materials and have different resistivities, and when the resistivity of the first metal particles is lower than that of the conductive layer 1, the first metal particles have less influence on the resistive circuit after the resistive circuit is formed by the embedded metal foil. Correspondingly, the second metal particles can also be chosen to be of a different material than the conductive layer 1. The material of both the first metal particles and the second metal particles may be the same or different.
Specifically, the height H of the conductive bump 4 in the present embodiment is 0.5 to 20 micrometers. The height H of the conductive bump 4 is the distance between the highest point and the lowest point of the conductive bump 4 in the vertical direction. In a specific application, if the height of the conductive bump 4 is too small, a good adhesion force cannot be added to the conductive layer 1 and the resistive layer 2, and if the height of the conductive bump 4 is too large, a pinhole may be generated in the conductive layer 1, thereby affecting the performance of the conductive layer 1. In this embodiment, the height of the conductive bump 4 is set to 0.5 to 20 micrometers, so that the conductive bump 4 has a good effect of increasing the adhesion between the conductive layer 1 and the resistive layer 2. Of course, the height of the conductive bump 4 may also be set to other values according to the actual use requirement, and further details are not described herein.
It should be noted that the conductive bumps 4 may be randomly distributed on the resistive layer 2, and in order to further ensure the connection stability between the conductive layer 1 and the resistive layer 2, the conductive bumps 4 in this embodiment are uniformly distributed on the resistive layer 2. The conductive protrusions 4 are uniformly distributed on the resistive layer 2, so that the peel strength of each connection part of the conductive layer 1 and the resistive layer 2 is relatively close, and the connection stability between the conductive layer 1 and the resistive layer 2 is further ensured. In a specific implementation, a plurality of conductive bumps 4 may be formed on the resistive layer 2 by a conventional process such as an electroplating process, and the conductive bumps 4 are not adhered to each other. Furthermore, the height of the conductive bumps 4 is set to be consistent, so that the direct adhesive force between the conductive layer 1 and the resistance layer 2 is further improved, and the whole embedded resistance metal foil is smoother. When the conductive bumps 4 are uniformly distributed and the height is set to be uniform, the effect is better when the two aspects are combined.
It should be noted that, the embedded resistance metal foil disclosed in this embodiment is used for manufacturing a resistance circuit, where the conductive layer 1 is manufactured through a process to form a conductive end, and the resistance layer 2 is manufactured through a process to form a resistance, when the embedded resistance metal foil is applied, the embedded resistance metal foil may be firstly laminated on a circuit board, and the embedded resistance metal foil is manufactured through a process to form a resistance circuit, or the embedded resistance metal foil is firstly laminated to form a resistance circuit, and then the resistance circuit is laminated on the circuit board, the conductive end is conducted with an electric device or a circuit on the circuit board, and the conductive end is conducted with the resistance, so that a conducting circuit is formed, and thus the conductivity of the conductive layer 1 is greater than that of the resistance layer 2, and exemplarily, the conductivity of the conductive layer 1 is 2 to 1000 times that of the resistance layer 2. Of course, the conductivity of the conductive layer 1 and the conductivity of the resistive layer 2 may be set according to actual use requirements, and will not be further described herein. Specifically, the resistance layer 2 in this embodiment includes any one metal of nickel, chromium, platinum, palladium and titanium, or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon and phosphorus, for example, the resistance layer 2 may include an alloy such as a nickel-phosphorus alloy, or a metal such as nickel, or a combination of different metals such as nickel metal and chromium metal, or a combination of a nickel-phosphorus alloy and nickel metal, or a combination of nickel metal and silicon. Of course, the resistive layer 2 may also be made of other materials, which will not be described herein.
Specifically, the conductive layer 1 in this embodiment includes any one or more of aluminum, silver, copper, and gold. When the conductive layer 1 is made of copper, the buried resistance metal foil is a buried resistance copper foil product, and of course, the conductive layer 1 may also be made of other materials with good conductivity, which is not described herein. The thickness of the conductive layer 1 in this embodiment is 2 to 20 micrometers. The thickness of the conducting layer 1 is set to be 2-20 micrometers so as to meet the requirement of manufacturing a printed board fine circuit, and certainly, the thickness of the conducting layer 1 can be set to be other values according to the actual use requirement, which is not described herein.
Specifically, the dielectric layer 5 serves as a base material and plays a role in supporting, in a specific implementation, the resistive layer 2 may be formed on the dielectric layer 5, and the dielectric layer 5 may protect the resistive layer 2. The dielectric layer 5 is selected from materials such as, but not limited to, Polyimide (PI) or polyethylene terephthalate (PET).
Referring to fig. 8, in an alternative embodiment, after the step S103 "pressing the buried resistor metal foil after completing the resistor circuit manufacturing with the printed board 7 to obtain the printed board with the buried resistor", the method further includes:
a protective layer 6 is provided on the exposed portion of the resistive layer 2.
In a specific application, because the thickness of the resistance layer of the buried resistor is relatively small, the buried resistor in the existing printed board is easily broken in practical use, so that the resistance is changed. According to the embodiment of the invention, the protective layer 6 is coated on the exposed part of the resistance layer 2, so that on one hand, the stress of the resistance layer 2 is favorably eliminated to prevent the resistance layer 2 from being broken, thereby preventing the resistance change caused by the breakage of the resistance layer 2, on the other hand, the surface of the resistance layer 2 can be effectively protected, the resistance change caused by the damage of the surface of the resistance layer 2 is prevented, and thereby the resistance precision is ensured.
As shown in fig. 8, specifically, the height position of the surface of the protection layer 6 away from the resistance layer 2 in the vertical direction is lower than the height position of the surface of the conductive end 11 away from the resistance layer 2 in the vertical direction, which is equivalent to forming a reinforcing rib, so that the overall structural strength of the embedded resistor and the conductive end 11 is increased, and the resistance layer 2 is further prevented from being broken, thereby ensuring the resistance accuracy. Of course, the protective layer 6 may also have a flat surface, which is not described herein.
In the embodiment of the present invention, the protective layer 6 is solder resist ink.
In an alternative embodiment, as shown in fig. 3 to fig. 6, the step S102 "of fabricating the conductive layer 1 and the resistive layer 2 to form a resistive circuit" specifically includes steps S1021 to S1027:
step S1021, forming a first dry film on the conductive layer 1; the method comprises the step of sticking a dry film for the first time.
Step S1022, exposing and developing the first dry film covered on the conductive layer 1 to obtain a first resist layer 8 with a preset pattern; wherein the shape and size of the first resist layer 8 are matched with those of the resistance circuit to be manufactured. In this step, the areas corresponding to the two conductive terminals 11 and the areas corresponding to the buried resistors are protected by exposure and development, and after the areas are exposed and developed, the areas are not etched by the acid etching solution in step S1023, but the resistive layer 2 and the conductive layer 1 in the area of the product structure with the non-designed size are etched away;
step S1023, etching the conductive layer 1 and the resistive layer 2 not covered by the first resist layer 8 with an acidic etching solution to obtain the conductive layer and the resistive layer having the predetermined pattern, as shown in fig. 3. The acid etching solution is a sodium chlorate system acid etching solution. This step is the first etching.
In step S1024, the first resist layer 8 is removed. Specifically, the first resist layer 8 may be removed with a sodium hydroxide solution;
step S1025, covering a second dry film on the region of the conductive layer to be used for making a conductive end, and exposing and developing the second dry film to form a second resist layer 9 on the region of the conductive layer to be used for making a conductive end, as shown in fig. 4; wherein, the shape and the size of the second resist layer 9 are matched with the shape and the size of the conductive terminal 11 to be manufactured. Since the resistor layer 2 with the designed size corresponding to the area needs to be left at the end of the buried resistor, and the conductive layer 1 corresponding to the position of the non-conductive end above the resistor layer 2 needs to be completely etched, in this step, a second dry film is pasted above the conductive end 11, and the dry film is pasted for the second time in this step, so as to protect the conductive end 11 from being etched;
step S1026 of etching the conductive layer not covered by the second resist layer with an alkaline etching solution to form a conductive terminal 11 on the conductive layer, as shown in fig. 5; the alkaline etching solution is an ammonium chloride and ammonia water system alkaline etching solution. The step is the second etching;
step S1027, removing the second resist layer 9 to obtain a resistive circuit, wherein the resistive circuit includes a conductive terminal 11 formed by a conductive layer and a circuit layer formed by a resistive layer, as shown in fig. 6. That is, the second dry film is removed, and specifically, the second resist layer 9 may be removed using a sodium hydroxide solution.
Correspondingly, the embodiment of the invention also provides a printed board with the buried resistor, and the printed board with the buried resistor is prepared by using the preparation method of the printed board with the buried resistor.
To sum up, the printed board with the buried resistor and the manufacturing method thereof provided by the embodiment of the invention firstly provide a buried resistor metal foil, the buried resistor metal foil comprises a conducting layer 1, a dielectric layer 5 and a resistance layer 2 arranged between the conducting layer 1 and the dielectric layer 5, the conducting layer 1 and the resistance layer 2 are manufactured to form a resistor circuit, and then the buried resistor metal foil after the resistor circuit is manufactured is pressed with a printed board 7, so that the printed board with the buried resistor is obtained.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, many modifications and substitutions can be made without departing from the technical principle of the present invention, and these modifications and substitutions should also be regarded as the protection scope of the present invention.
Claims (10)
1. A preparation method of a printed board with a buried resistor is characterized by comprising the following steps:
providing a buried resistance metal foil; the embedded resistance metal foil comprises a conductive layer, a resistance layer and a dielectric layer, wherein the resistance layer is arranged between the conductive layer and the dielectric layer;
manufacturing the conductive layer and the resistance layer to form a resistance circuit; the resistor circuit is manufactured by a resistor wire manufacturing method, wherein the resistor wire is manufactured by a resistor wire manufacturing method; the resistance circuit comprises a conductive end formed by a conductive layer and a circuit layer formed by a resistance layer;
pressing the buried resistor metal foil after the resistor circuit is manufactured with the printed board to obtain the printed board with the buried resistor; and the dielectric layer is pressed on the printed board.
2. The method for manufacturing a printed board with a buried resistor according to claim 1, wherein the buried resistor metal foil further comprises a plurality of conductive bumps;
the conductive protrusions are distributed on one surface of the resistance layer at intervals, and the conductive protrusions are covered by the conductive layer.
3. The method for manufacturing a printed board with a buried resistor according to claim 2, wherein the plurality of conductive bumps are first metal particles and/or a particle cluster composed of a plurality of second metal particles.
4. The method for manufacturing the printed board with the embedded resistor according to claim 1, wherein after the embedded resistor metal foil after the resistor circuit is manufactured is laminated with the printed board to obtain the printed board with the embedded resistor, the method further comprises:
and covering a protective layer on the exposed part of the resistance layer.
5. The method for manufacturing a printed board with a buried resistor according to claim 4, wherein the height position of the surface of the protective layer away from the resistive layer in the vertical direction is lower than the height position of the surface of the conductive terminal away from the resistive layer in the vertical direction.
6. The method for preparing the printed board with the embedded resistor as claimed in claim 4, wherein the protective layer is solder resist ink.
7. The method for manufacturing the printed board with the buried resistor as claimed in any one of claims 1 to 6, wherein the manufacturing of the conductive layer and the resistive layer to form the resistive circuit specifically comprises:
covering a first dry film on the conductive layer;
exposing and developing the first dry film covered on the conductive layer to obtain a first anti-corrosion layer with a preset pattern;
etching the conductive layer and the resistive layer not covered by the first resist layer with an acidic etching solution to obtain the conductive layer and the resistive layer having the predetermined pattern;
removing the first resist layer;
covering a second dry film on the conducting layer to be used for manufacturing a conducting end area, exposing and developing the second dry film to form a second anti-etching layer on the conducting layer to be used for manufacturing a conducting end area;
etching the conductive layer not covered by the second resist layer with an alkaline etching solution to form a conductive terminal on the conductive layer;
and removing the second resist layer to obtain a resistance line, wherein the resistance line comprises a conductive end formed by a conductive layer and a line layer formed by a resistance layer.
8. The method for manufacturing a printed board with a buried resistor according to claim 7, wherein the acidic etching solution is an acidic etching solution of a sodium chlorate system.
9. The method for manufacturing a printed board with a buried resistor according to claim 7, wherein the alkaline etching solution is an alkaline etching solution of ammonium chloride and ammonia water system.
10. A printed board with a buried resistor, which is prepared by the method for preparing the printed board with the buried resistor according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011304684.6A CN114521058A (en) | 2020-11-19 | 2020-11-19 | Printed board with buried resistor and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011304684.6A CN114521058A (en) | 2020-11-19 | 2020-11-19 | Printed board with buried resistor and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114521058A true CN114521058A (en) | 2022-05-20 |
Family
ID=81594263
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011304684.6A Pending CN114521058A (en) | 2020-11-19 | 2020-11-19 | Printed board with buried resistor and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114521058A (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5674780A (en) * | 1995-07-24 | 1997-10-07 | Motorola, Inc. | Method of forming an electrically conductive polymer bump over an aluminum electrode |
| CN1817652A (en) * | 2005-02-07 | 2006-08-16 | 阿尔卑斯电气株式会社 | Thermal head including bonding pads having irregular surfaces formed by forming irregularities on underlayer |
| KR20070001350A (en) * | 2005-06-29 | 2007-01-04 | 삼성전기주식회사 | Flip chip type light emitting device |
| CN102246247A (en) * | 2008-11-05 | 2011-11-16 | 肖克科技有限公司 | Geometric and electric field considerations for including voltage switchable protective material in substrate devices |
| CN103906364A (en) * | 2012-12-25 | 2014-07-02 | 上海美维科技有限公司 | Printed circuit board buried resistor machining method |
| CN107466157A (en) * | 2017-06-20 | 2017-12-12 | 深圳崇达多层线路板有限公司 | A kind of method buried baffle-wall and baffle-wall making printed wiring board is buried using this |
| CN107743341A (en) * | 2017-09-28 | 2018-02-27 | 衢州顺络电路板有限公司 | Improve the printed wiring board and its manufacture method of embedded resistors reliability |
| CN110783016A (en) * | 2018-11-26 | 2020-02-11 | 广州方邦电子股份有限公司 | Conductive adhesive film, circuit board and preparation method of conductive adhesive film |
| CN110783022A (en) * | 2018-11-26 | 2020-02-11 | 广州方邦电子股份有限公司 | Conductive adhesive film, circuit board and preparation method of conductive adhesive film |
| CN111508976A (en) * | 2020-04-28 | 2020-08-07 | 合肥鑫晟光电科技有限公司 | Substrate, preparation method thereof and display device |
-
2020
- 2020-11-19 CN CN202011304684.6A patent/CN114521058A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5674780A (en) * | 1995-07-24 | 1997-10-07 | Motorola, Inc. | Method of forming an electrically conductive polymer bump over an aluminum electrode |
| CN1817652A (en) * | 2005-02-07 | 2006-08-16 | 阿尔卑斯电气株式会社 | Thermal head including bonding pads having irregular surfaces formed by forming irregularities on underlayer |
| KR20070001350A (en) * | 2005-06-29 | 2007-01-04 | 삼성전기주식회사 | Flip chip type light emitting device |
| CN102246247A (en) * | 2008-11-05 | 2011-11-16 | 肖克科技有限公司 | Geometric and electric field considerations for including voltage switchable protective material in substrate devices |
| CN103906364A (en) * | 2012-12-25 | 2014-07-02 | 上海美维科技有限公司 | Printed circuit board buried resistor machining method |
| CN107466157A (en) * | 2017-06-20 | 2017-12-12 | 深圳崇达多层线路板有限公司 | A kind of method buried baffle-wall and baffle-wall making printed wiring board is buried using this |
| CN107743341A (en) * | 2017-09-28 | 2018-02-27 | 衢州顺络电路板有限公司 | Improve the printed wiring board and its manufacture method of embedded resistors reliability |
| CN110783016A (en) * | 2018-11-26 | 2020-02-11 | 广州方邦电子股份有限公司 | Conductive adhesive film, circuit board and preparation method of conductive adhesive film |
| CN110783022A (en) * | 2018-11-26 | 2020-02-11 | 广州方邦电子股份有限公司 | Conductive adhesive film, circuit board and preparation method of conductive adhesive film |
| CN111508976A (en) * | 2020-04-28 | 2020-08-07 | 合肥鑫晟光电科技有限公司 | Substrate, preparation method thereof and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102867807B (en) | Manufacturing method of package substrate without core layer | |
| JP4529978B2 (en) | WIRING BOARD, WIRING MATERIAL, COPPER-CLAD LAMINATE, AND WIRING BOARD MANUFACTURING METHOD | |
| CN110612783B (en) | Printed wiring board and method for manufacturing same | |
| US10531569B2 (en) | Printed circuit board and method of fabricating the same | |
| US20160095215A1 (en) | Printed wiring board and method for manufacturing the same | |
| EP1942711B1 (en) | Method of manufacturing a wiring board including electroplating | |
| CN103416108A (en) | Printed circuit board and method for manufacturing same | |
| US8569873B2 (en) | Mitigation of plating stub resonance by controlling surface roughness | |
| CN114521058A (en) | Printed board with buried resistor and preparation method thereof | |
| EP1804202A1 (en) | Tape carrier and module for contact type IC card and method for manufacturing the tape carrier | |
| CN114521065A (en) | Printed board with buried resistor and preparation method thereof | |
| CN114521049A (en) | Buried resistance metal foil | |
| CN214014626U (en) | Buried resistance metal foil | |
| CN114516203A (en) | Buried resistance metal foil | |
| CN214014635U (en) | Buried resistance metal foil | |
| CN214606319U (en) | Buried resistance metal foil | |
| CN214014637U (en) | Buried resistance metal foil | |
| CN214014634U (en) | Buried resistance metal foil | |
| CN214627496U (en) | Buried resistance metal foil and printed board | |
| CN113394192A (en) | Inductor component and resin sealing body | |
| KR101926565B1 (en) | The printed circuit board and the method for manufacturing the same | |
| JP2002198635A (en) | Wiring board and its manufacturing method | |
| CN214014636U (en) | Buried resistance metal foil and printed board | |
| JPH1079568A (en) | Manufacturing method of printed circuit board | |
| CN114521048A (en) | Buried resistance metal foil |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |