CN212209460U

CN212209460U - Semiconductor packaging structure

Info

Publication number: CN212209460U
Application number: CN202021389331.6U
Authority: CN
Inventors: 黄水波; 苏剑锋; 李勉伟
Original assignee: Shenzhen Cansheng Industry Development Co ltd
Current assignee: Shenzhen Cansheng Industry Development Co ltd
Priority date: 2020-07-15
Filing date: 2020-07-15
Publication date: 2020-12-22
Anticipated expiration: 2030-07-15

Abstract

The embodiment of the utility model discloses packaging structure of semiconductor belongs to semiconductor packaging technology field. The utility model discloses an apron, encapsulation case and packaging structure are the box structure, and a plurality of spacing are installed to a packaging structure side, and spacing upper surface is provided with the roof, and the roof position suits with the apron, and a packaging case side is provided with a plurality of connectors, and the encapsulation case includes heat abstractor and stitch position fixing board, and heat abstractor is located stitch position fixing board's top. The utility model discloses a set up plug-type encapsulation case and conveniently reassemble and tear open putting semiconductor again, heat and damage internal element when avoiding the semiconductor operation to generate heat through the heat abstractor who sets up the overhead self heat conduction and heat absorption operation, carry out the fixed damage stitch influence normal use of avoiding of adaptation to the stitch of semiconductor through setting up stitch solid-state plate, but fix semiconductor itself through setting up lateral shifting's splint in order to adapt to the not semiconductor of equidimension.

Description

Semiconductor packaging structure

Technical Field

The utility model relates to a semiconductor package technical field, concretely relates to packaging structure of semiconductor.

Background

A semiconductor refers to a material having a conductivity between a conductor and an insulator at normal temperature. The semiconductor has wide application in radio, television and temperature measurement. Such as diodes, are devices fabricated using semiconductors. Semiconductor refers to a material with controllable conductivity ranging from insulator to conductor, and because of its convenience, it is widely used in various industries, and when manufacturing related electronic products, it is often necessary to package the semiconductor to form an integral body that can be used together with other components to form a product.

The existing semiconductor packaging structure usually only carries out mechanical packaging on a semiconductor and an acting element thereof by one side without other protective measures, so that the semiconductor generates a large amount of heat during working, pins are extremely fine and easy to damage, and unnecessary element damage and resource waste are caused.

Disclosure of Invention

Therefore, the embodiment of the present invention provides a semiconductor package structure to solve the problems in the prior art.

In order to achieve the above object, the embodiment of the present invention provides the following technical solutions:

a semiconductor packaging structure comprises a cover plate, a packaging box and a packaging structure, wherein the packaging box and the packaging structure are both box structures, a plurality of limiting strips are mounted on one side surface of the packaging structure, top plates are arranged on the upper surfaces of the limiting strips, the positions of the top plates are matched with those of the cover plate, a plurality of connectors are arranged on one side surface of the packaging box, the packaging box comprises a heat dissipation device and a pin retaining plate, and the heat dissipation device is located above the pin retaining plate;

the lower surface of the heat dissipation device is provided with a silicon plate, the upper surface of the silicon plate is provided with a plurality of welding pads, the upper surface of each welding pad is provided with a heat conduction column, the peripheral side surface of each heat conduction column is provided with a heat insulation plate, the upper surface of each heat conduction column is provided with a heat dissipation plate, and the heat dissipation plates are in extrusion fit with the heat conduction columns;

the improved heat dissipation device is characterized in that a circuit substrate is arranged on the upper surface of the pin retention plate, the circuit substrate is in extrusion fit with the silicon plate, an embedding groove is formed in one side surface of the circuit substrate, the embedding groove is matched with the heat dissipation device, first pin columns are arranged at two ends of the pin retention plate, second pin columns are arranged on the lower surfaces of the first pin columns, the first pin columns are in sliding fit with the second pin columns, a groove is formed in one side surface of the second pin columns, pin heads are connected to the lower surfaces of the second pin columns, and the pin heads are in sliding fit with the groove.

Further, a side face of the heat dissipation device is provided with an anode, the other side face of the heat dissipation device is provided with a cathode, the surfaces of the anode and the cathode are provided with wires, and the wires are electrically connected with the circuit substrate.

Further, a soldering tin paste plate is arranged on the lower surface of the pin retaining plate, heat insulation layers are arranged on the upper surface and the lower surface of the soldering tin paste plate, protrusions are arranged at two ends of each heat insulation layer, a clamping block is arranged on one surface inside the packaging box, and the protrusions and the clamping blocks are clamped and matched.

Further, both ends of the pin fixing plate are provided with threaded columns, the threaded columns are in extrusion fit with the pin fixing plate, one end of each threaded column is provided with a rotary rod, and the rotary rods are in running fit with the threaded columns.

Furthermore, the lower surface of the cover plate is provided with a plurality of fixing blocks, and the fixing blocks are clamped and matched with the packaging box.

The embodiment of the utility model provides a have following advantage:

(1) the utility model discloses a set up plug-type encapsulation case and conveniently reassemble and tear open putting the semiconductor again, heat conduction and endothermic operation are carried out to semiconductor self through setting up the heat abstractor of overhead and are avoided semiconductor operation to generate heat and damage internal component, fix through setting up stitch retention board and carry out the fixing of adaptation to the stitch of semiconductor and avoid damaging the stitch and influence normal use, fix semiconductor self through setting up the splint that can transversely move so as to adapt to the semiconductor of different sizes;

(2) the utility model discloses can effectual protection whole part and use plug-type placing method convenient to detach to change when carrying out the encapsulation operation of semiconductor, two-layer heat abstractor can guarantee that the produced heat energy of semiconductor work can be abundant distribute away and avoid damaging the component about utilizing to use and its stitch fixed plate protection that semiconductor itself suited to avoid damaging the security and the flexibility that have improved packaging structure.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It should be apparent that the drawings in the following description are merely exemplary, and that other embodiments can be derived from the drawings provided by those of ordinary skill in the art without inventive effort.

The structure, ratio, size and the like shown in the present specification are only used for matching with the content disclosed in the specification, so as to be known and read by people familiar with the technology, and are not used for limiting the limit conditions which can be implemented by the present invention, so that the present invention has no technical essential significance, and any structure modification, ratio relationship change or size adjustment should still fall within the scope which can be covered by the technical content disclosed by the present invention without affecting the efficacy and the achievable purpose of the present invention.

FIG. 1 is a schematic view of the overall structure of the present invention;

FIG. 2 is a view showing the inner structure of the packaging box of the present invention;

FIG. 3 is a structural view of the pin retention plate of the present invention;

fig. 4 is a structural view of the heat dissipation device of the present invention.

In the figure: 1-cover plate; 2-packaging the box; 3-a limiting strip; 4-packaging the structure; 5-a connecting port; 6-a top plate; 7-a heat sink; 8-a retention block; 9-positive electrode; 10-rotating rod; 11-stitch retention plate; 12-a fixture block; 13-a thermally insulating layer; 14-solder paste plate; 15-bulge; 16-a threaded post; 17-a wire; 18-negative electrode; 19-a first stitch post; 20-a second stitch leg; 21-a groove; 22-stitch head; 23-a fitting groove; 24-a circuit substrate; 25-a heat insulation plate; 26-a silicon plate; 27-a thermally conductive post; 28-a heat sink; 29-pad.

Detailed Description

The present invention is described in terms of specific embodiments, and other advantages and benefits of the present invention will become apparent to those skilled in the art from the following disclosure. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

As shown in fig. 1 to 4, the utility model provides a packaging structure of semiconductor, a serial communication port, including apron 1, packaging box 2 and packaging structure 4 are the box structure, a plurality of spacing 3 are installed to 4 sides of packaging structure, spacing 3 upper surfaces are provided with roof 6, roof 6 position suits with apron 1, 2 sides of packaging box are provided with a plurality of connectors 5, packaging box 2 includes heat abstractor 7 and stitch position fixing board 11, heat abstractor 7 is located stitch position fixing board 11's top, and in this field heat abstractor 7 is used for carrying out the radiating operation for the semiconductor conventional technical means, the utility model discloses just no longer describe repeatedly, as long as can realize that radiating circuit homoenergetic enough can satisfy above-mentioned demand.

The lower surface of the heat dissipation device 7 is provided with a silicon plate 26, the upper surface of the silicon plate 26 is provided with a plurality of welding pads 29, the upper surface of the welding pads 29 is provided with heat conduction columns 27, the peripheral sides of the heat conduction columns 27 are provided with heat insulation plates 25, the upper surfaces of the heat conduction columns 27 are provided with heat dissipation plates 28, and the heat dissipation plates 28 are in extrusion fit with the heat conduction columns 27.

To better illustrate the above structure, the following will be further described with respect to its specific operation: the semiconductor to be packaged is placed in the pin fixing plate 11, the first pin column 19 and the second pin column 20 are adjusted to adapt to the specification of the semiconductor, pins of the semiconductor and pin heads 22 are matched and fixed, the screw rod 10 is used for enabling the threaded column 16 to extrude to fix the pin fixing plate 11, the heat dissipation device 7 at the top conducts heat through the heat dissipation plate 28, the solder paste plate 14 and the heat insulation layer 13 at the bottom separate the heat of the semiconductor to avoid damaging other elements, and the anode 9 and the cathode 18 at the two ends of the packaging box 2 are connected with the connecting port 5 through the conducting wires 17 to be normally used.

In the foregoing, it is further preferable that a circuit substrate 24 is disposed on the upper surface of the pin retention plate 11, the circuit substrate 24 is in press fit with the silicon plate 26, an engagement groove 23 is disposed on one side surface of the circuit substrate 24, the engagement groove 23 is adapted to the heat dissipation device 7, first pins 19 are disposed at two ends of the pin retention plate 11, second pins 20 are mounted on the lower surface of the first pins 19, the first pins 19 are in sliding fit with the second pins 20, a groove 21 is disposed on one side surface of the second pins 20, pins 22 are connected to the lower surface of the second pins 20, and the pins 22 are in sliding fit with the groove 21.

A positive electrode 9 is arranged on one side surface of the heat dissipation device 7, a negative electrode 18 is arranged on the other side surface of the heat dissipation device 7, a lead 17 is arranged on one surface of each of the positive electrode 9 and the negative electrode 18, and the lead 17 is electrically connected with a circuit substrate 24.

The purpose of arranging the pin retention plate 11 and the heat dissipation device 7 is two aspects: firstly, the pins of the semiconductor are made of fine metal, so that the semiconductor is low in strength and easy to damage, and the pin retention plate 11 can provide a shell with a fixed position for the pins, so that the pins are not easy to break and waste is caused; secondly, when the semiconductor is used, a large amount of heat may be generated to damage internal components, thereby avoiding unnecessary economic waste, and the heat dissipation device 7 is provided to provide a good heat dissipation measure, for better illustration of the above effects, the following matters are specifically made:

for avoiding generating heat and the problem of unable adaptation different specification sizes semiconductor, be provided with soldering tin cream board 14 at stitch position fixing plate 11 lower surface and absorb produced heat, the soldering tin cream board 14 upper and lower surface all is provided with insulating layer 13 and avoids damaging the component with the heat isolation, and insulating layer 13 both ends all are provided with

arch

15, and 2 inside surfaces of encapsulation case are provided with fixture block 12, and arch 15 and fixture block 12 clamp the cooperation and conveniently tear it open and trade. Both ends of the stitch fixing plate 11 are provided with threaded columns 16, the threaded columns 16 are in extrusion fit with the stitch fixing plate 11, one end of each threaded column 16 is provided with a rotary rod 10, and the rotary rods 10 are in rotary fit with the threaded columns 16. The lower surface of the cover plate 1 is provided with a plurality of fixing blocks 8, and the fixing blocks 8 are clamped and matched with the packaging box 2, so that the operations of dismounting and replacing the internal heat dissipation device 7 and the pin fixing plate 11 are facilitated.

Although the invention has been described in detail with respect to the general description and the specific embodiments, it will be apparent to those skilled in the art that modifications and improvements can be made based on the invention. Therefore, such modifications and improvements are intended to be within the scope of the invention as claimed.

Claims

1. The semiconductor packaging structure is characterized by comprising a cover plate (1), a packaging box (2) and a packaging structure (4), wherein the packaging box (2) and the packaging structure (4) are both box structures, a plurality of limiting strips (3) are mounted on one side surface of the packaging structure (4), a top plate (6) is arranged on the upper surfaces of the limiting strips (3), the positions of the top plates (6) are matched with those of the cover plate (1), a plurality of connectors (5) are arranged on one side surface of the packaging box (2), the packaging box (2) comprises a heat dissipation device (7) and a pin retention plate (11), and the heat dissipation device (7) is located above the pin retention plate (11);

the lower surface of the heat dissipation device (7) is provided with a silicon plate (26), the upper surface of the silicon plate (26) is provided with a plurality of welding pads (29), the upper surface of each welding pad (29) is provided with a heat conduction column (27), the peripheral side surface of each heat conduction column (27) is provided with a heat insulation plate (25), the upper surface of each heat conduction column (27) is provided with a heat dissipation plate (28), and the heat dissipation plates (28) are in extrusion fit with the heat conduction columns (27);

the improved structure of the LED lamp is characterized in that a circuit substrate (24) is arranged on the upper surface of the stitch retention plate (11), the circuit substrate (24) is in extrusion fit with a silicon plate (26), an embedding groove (23) is formed in one side surface of the circuit substrate (24), the embedding groove (23) is matched with a heat dissipation device (7), first stitch columns (19) are arranged at two ends of the stitch retention plate (11), second stitch columns (20) are arranged on the lower surfaces of the first stitch columns (19), the first stitch columns (19) are in sliding fit with the second stitch columns (20), a groove (21) is formed in one side surface of the second stitch columns (20), needle heads (22) are connected to the lower surfaces of the second stitch columns (20), and the needle heads (22) are in sliding fit with the groove (21).

2. The semiconductor package structure according to claim 1, wherein a positive electrode (9) is disposed on one side surface of the heat sink (7), a negative electrode (18) is disposed on the other side surface of the heat sink (7), and a conductive wire (17) is disposed on each of the surfaces of the positive electrode (9) and the negative electrode (18), and the conductive wire (17) is electrically connected to the circuit substrate (24).

3. The semiconductor package structure according to claim 1, wherein a solder paste plate (14) is disposed on a lower surface of the pin retention plate (11), a heat insulation layer (13) is disposed on each of an upper surface and a lower surface of the solder paste plate (14), protrusions (15) are disposed on both ends of the heat insulation layer (13), a fixture block (12) is disposed on a surface inside the package box (2), and the protrusions (15) and the fixture block (12) are in clamping fit.

4. The semiconductor package structure according to claim 1, wherein the stitch retention plate (11) is provided with a threaded post (16) at both ends, the threaded post (16) is press-fitted with the stitch retention plate (11), one end of the threaded post (16) is provided with a rotating rod (10), and the rotating rod (10) is rotatably fitted with the threaded post (16).

5. A semiconductor package structure according to claim 1, wherein the cover plate (1) is provided with a plurality of retaining blocks (8) on the lower surface thereof, and the retaining blocks (8) are snap-fitted with the package box (2).