CN217114365U - Internal insulation packaging structure and semiconductor product - Google Patents

Internal insulation packaging structure and semiconductor product Download PDF

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Publication number
CN217114365U
CN217114365U CN202123442061.8U CN202123442061U CN217114365U CN 217114365 U CN217114365 U CN 217114365U CN 202123442061 U CN202123442061 U CN 202123442061U CN 217114365 U CN217114365 U CN 217114365U
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China
Prior art keywords
lead frame
insulating
heat dissipation
package structure
inter
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CN202123442061.8U
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Chinese (zh)
Inventor
周刚
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Great Team Backend Foundry Dongguan Co Ltd
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Great Team Backend Foundry Dongguan Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model discloses an internal insulation packaging structure and semiconductor product, internal insulation packaging structure include first lead frame and second lead frame, first lead frame has and keeps away from the first surface and the orientation of second lead frame the second surface of second lead frame, the first surface is provided with the chip, the second surface with be provided with insulating heat dissipation layer between the second lead frame, setting up on insulating heat dissipation layer makes first lead frame with second lead frame looks interval. The first lead frame and the second lead frame are isolated through the insulating heat dissipation layer in the scheme, so that the first lead frame and the second lead frame are insulated and can realize heat diffusion, the insulating heat dissipation layer is thinner in structure, the size of a packaged product can be effectively reduced, and the product can be applied to miniaturized high-power equipment.

Description

Internal insulation packaging structure and semiconductor product
Technical Field
The application relates to the field of semiconductors, in particular to an internal insulation packaging structure and a semiconductor product.
Background
The semiconductor is a material with a conductive capability between a conductor and a non-conductor, and the semiconductor element belongs to a solid-state element according to the characteristics of the semiconductor material, and the volume of the semiconductor element can be reduced to a small size, so that the power consumption is low, the integration level is high, and the semiconductor element is widely introduced in the field of electronic technology.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an aim at: there is provided an internal insulation package structure capable of solving the above-mentioned problems occurring in the prior art.
In order to achieve the purpose, the following technical scheme is adopted in the application:
on the one hand, provide an interior insulation packaging structure, including first lead frame and second lead frame, first lead frame has and keeps away from the first surface and the orientation of second lead frame the second surface of second lead frame, the first surface is provided with the chip, the second surface with be provided with insulating heat dissipation layer between the second lead frame, setting up on insulating heat dissipation layer makes first lead frame with second lead frame looks interval.
Optionally, the insulating heat dissipation layer is an insulating thermal interface material.
Optionally, the second lead frame has a third surface facing the first lead frame and a fourth surface far away from the first lead frame, the third surface is provided with a groove, and the insulating thermal interface material is disposed in the groove.
Optionally, the grooves include a first groove disposed on the third surface and a plurality of second grooves disposed on a bottom of the first groove, and the insulating thermal interface material fills the second grooves and at least partially fills the first grooves.
Optionally, the first lead frame has a stage, the first surface and the second surface are both located on the stage, and the size of the first groove is larger than that of the stage.
Optionally, the sizes of the plurality of second grooves are the same or different, and the plurality of second grooves are uniformly arranged at the bottom of the first groove in an array manner.
Optionally, the insulating heat dissipation layer is a high thermal conductivity insulating heat dissipation coating, and is formed on the entire surface of the second lead frame facing the first lead frame through an electroplating process.
Optionally, the first lead frame further includes a pin, and the chip is connected to the pin through a metal wire.
Optionally, the package structure further includes a package material, the package material encapsulates the chip and the first lead frame, and the pins of the first lead frame extend from the inside of the package material to the outside.
In another aspect, a semiconductor product having the inner insulation package structure is provided.
The beneficial effect of this application does: in the scheme, the first lead frame and the second lead frame are isolated through the insulating heat dissipation layer, so that the first lead frame and the second lead frame are insulated and can realize heat diffusion, and the insulating heat dissipation layer has a thinner structure, so that the volume of a packaged product can be effectively reduced, and the product can be applied to miniaturized high-power equipment;
when the insulating heat dissipation layer is made of the insulating thermal interface material, the effect of internal insulation is achieved by utilizing the high thermal conductivity and the insulating property of the insulating heat dissipation layer, the cost is lower than that of a ceramic plate, and the thickness can reach 0.02 mm, so that the thickness of the product is smaller than that of the ceramic plate product, the internal insulation of a packaged product can be achieved under the condition that the thickness of a packaging body is not increased, the universality of the product can be greatly improved, and the packaging process is simplified.
The insulating heat dissipation layer is high heat conduction insulating heat dissipation coating, it through electroplating process shaping in the second lead frame orientation the whole surface of first lead frame, under this structure, the bonding material can be conducting material also can be insulating material, greatly increased the breadth of material selection, can select the better electrically conductive bonding material of heat conductivility to connect to promote the heat dispersion of product.
Drawings
The present application will be described in further detail below with reference to the accompanying drawings and examples.
Fig. 1 is a schematic view of an internal insulation package structure according to an embodiment of the present application.
Fig. 2 is a side cross-sectional view of the structure shown in fig. 1.
Fig. 3 is a schematic cross-sectional view illustrating a connection structure of a first lead frame and a second lead frame through an insulating thermal interface material according to an embodiment of the disclosure.
Fig. 4 is an enlarged view of fig. 3 at I.
Fig. 5 is a sectional view of a structure after a chip is mounted in the structure shown in fig. 3.
Fig. 6 is a schematic cross-sectional view of the structure of fig. 5 in which the chip and the leads are connected by metal wires.
Fig. 7 is a schematic view of another internal insulation package structure according to an embodiment of the present application.
Fig. 8 is a side cross-sectional view of the structure shown in fig. 7.
Fig. 9 is a schematic cross-sectional view illustrating a connection structure of a first lead frame and a second lead frame through an insulating thermal interface material according to an embodiment of the disclosure.
Fig. 10 is a sectional view of a structure after a chip is mounted in the structure shown in fig. 9.
Fig. 11 is a schematic cross-sectional view of the structure of fig. 10 in which the chip and the leads are connected by metal wires.
In the figure:
100. a first lead frame; 110. a first surface; 120. a second surface; 130. a slide stage; 140. a pin; 150. a metal wire; 200. a second lead frame; 210. a third surface; 211. a first groove; 212. a second groove; 220. a fourth surface; 300. a chip; 400. an insulating thermal interface material; 500. a high thermal conductivity insulating heat dissipation coating; 600. and (5) packaging the material.
Detailed Description
In order to make the technical problems solved, technical solutions adopted, and technical effects achieved by the present application clearer, the following describes technical solutions of embodiments of the present application in further detail, and it is obvious that the described embodiments are only a part of embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, removably connected, or integral to one another; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
As shown in fig. 1 to 6, the present embodiment provides an inner insulation package structure, which includes a first lead frame 100 and a second lead frame 200, the first lead frame 100 has a first surface 110 far away from the second lead frame 200 and a second surface 120 facing the second lead frame 200, the first surface 110 is provided with a chip 300, an insulation heat dissipation layer is disposed between the second surface 120 and the second lead frame 200, and the first lead frame 100 is spaced from the second lead frame 200 by the arrangement of the insulation heat dissipation layer.
The insulating heat dissipation layer in this embodiment is the insulating thermal interface material 400, and the effect of internal insulation is achieved by utilizing the high thermal conductivity and the insulating property of the insulating thermal interface material, so that the cost is lower than that of a ceramic plate, and the thickness can reach 0.02 mm, and the thickness of the product is smaller than that of the ceramic plate product, so that the internal insulation of the packaged product can be achieved under the condition that the thickness of the packaging body is not increased, the universality of the product can be greatly increased, and the packaging process is simplified.
Further, in the inner insulation package structure according to the embodiment of the present application, the second lead frame 200 has a third surface 210 facing the first lead frame 100 and a fourth surface 220 away from the first lead frame 100, a groove is disposed on the third surface 210, and the insulation thermal interface material 400 is disposed in the groove.
By arranging the groove on the third surface 210, the thickness of the connecting position of the first lead frame 100 and the second lead frame 200 can be reduced under the condition of ensuring the thickness of the rest part of the second lead frame 200, so that the thickness of the whole packaging body can be further reduced, and the product can be more miniaturized.
Specifically, the grooves include a first groove 211 disposed on the third surface 210 and a plurality of second grooves 212 disposed on the bottom of the first groove 211, and the insulating thermal interface material 400 fills the second grooves 212 and at least partially fills the first groove 211.
In a use state, the insulating thermal interface material 400 firstly enters the first groove 211, the insulating thermal interface material 400 moves from the first groove 211 to the second groove 212 under the action of gravity, after the second groove 212 is filled, the insulating thermal interface material 400 is continuously added, at this time, the insulating thermal interface material 400 starts to be accumulated in the second groove 212, when the insulating thermal interface material 400 is accumulated in the second groove 212 to a proper thickness, the increase can be stopped, at this time, the insulating thermal interface material 400 fills the second groove 212 and at least partially fills the first groove 211.
It should be noted that, the above-mentioned insulating thermal interface material 400 partially filling the first groove 211 may refer to that the insulating thermal interface material 400 does not fill the first groove 211 in the thickness direction of the second lead frame 200, in which state the overall thickness of the package structure may be reduced, but the above-mentioned solution is not a limitation to the present application, and in other embodiments, the insulating thermal interface material 400 may also fill the first groove 211 in the thickness direction of the second lead frame 200, that is, in this direction, the insulating thermal interface material 400 is filled to be flush with the third surface 210; it is also possible that the insulating thermal interface material 400 exceeds the first recess 211 in the thickness direction of the second lead frame 200, i.e. in this direction the insulating thermal interface material 400 protrudes from said third surface 210.
The insulating thermal interface material 400 partially fills the first recess 211 may not fill the entire area occupied by the first recess 211, but the insulating thermal interface material 400 may fill the entire area occupied by the first recess 211 in other embodiments.
The above filling schemes are all intended to fall within the scope of the present application, and other filling methods that can be conceived by those skilled in the art can also be applied to the present scheme.
For example, in other embodiments, the first recesses 211 may be more than one, but the height of the spacer between adjacent first recesses 211 is lower than the height of the third surface 210, so as to avoid the first lead frame 100 contacting the second lead frame 200.
Specifically, in this embodiment, the first lead frame 100 has a stage 130, the first surface 110 and the second surface 120 are both located on the stage 130, and the size of the first recess 211 is larger than that of the stage 130. Thereby, it can be ensured that the stage 130 can migrate into the first recess 211, so that the thickness of the package structure is reduced.
It should be noted that the sizes of the second grooves 212 may be the same or different, and the second grooves 212 are uniformly arranged at the bottom of the first groove 211 in an array manner.
In another embodiment of the internal insulation package structure according to the present application, as shown in fig. 7-11, the insulating heat dissipation layer is a high thermal conductivity insulating heat dissipation plating layer 500 formed on the entire surface of the second lead frame 200 facing the first lead frame 100 by a plating process.
In this scheme, the high thermal conductivity insulating heat dissipation coating 500 technology is adopted, and the second lead frame 200 is directly operated on the surface. Make its surface form the insulating heat dissipation layer of one deck and reach the insulating effect of heat dissipation, under this structure, the bonding material can be conducting material also can be insulating material, greatly increased the breadth of material selection, can select the better electrically conductive bonding material of thermal conductivity to connect to promote the heat dispersion of product.
The first lead frame 100 of the internal insulation package structure further includes a pin 140 and a packaging material, the chip 300 is connected to the pin 140 through a metal wire 150, the packaging material covers the chip 300 and the first lead frame 100, and the pin 140 of the first lead frame 100 extends from the inside of the packaging material to the outside.
Meanwhile, the embodiment also provides a semiconductor product which is provided with the internal insulation packaging structure.
In the description herein, it is to be understood that the terms "upper," "lower," "left," "right," and the like are used in an orientation or positional relationship merely for convenience in description and simplicity of operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the present application. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principles of the present application have been described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the present application and is not to be construed in any way as limiting the scope of the application. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present application without inventive effort, which shall fall within the scope of the present application.

Claims (10)

1. The utility model provides an interior insulating packaging structure, characterized in that, includes first lead frame (100) and second lead frame (200), first lead frame (100) have keep away from first surface (110) of second lead frame (200) and orientation second surface (120) of second lead frame (200), first surface (110) are provided with chip (300), second surface (120) with be provided with insulating heat dissipation layer between second lead frame (200), setting up on insulating heat dissipation layer makes first lead frame (100) with second lead frame (200) looks interval.
2. The inter-insulating package structure of claim 1, wherein the insulating heat sink layer is an insulating thermal interface material (400).
3. The inter-insulating package structure according to claim 2, wherein the second lead frame (200) has a third surface (210) facing the first lead frame (100) and a fourth surface (220) facing away from the first lead frame (100), the third surface (210) having a groove disposed thereon, the insulating thermal interface material (400) being disposed in the groove.
4. The inter-insulating packaging structure of claim 3, wherein the recesses comprise a first recess (211) formed in the third surface (210) and a plurality of second recesses (212) formed at a bottom of the first recess (211), and the insulating thermal interface material (400) fills the second recesses (212) and at least partially fills the first recess (211).
5. The inter-insulating packaging structure according to claim 4, wherein the first lead frame (100) has a stage (130), the first surface (110) and the second surface (120) are both located on the stage (130), and the first recess (211) has a size larger than that of the stage (130).
6. The inter-insulating package structure according to claim 4, wherein the second recesses (212) have the same or different sizes, and the second recesses (212) are uniformly arranged in an array at the bottom of the first recess (211).
7. The inner insulation package structure according to claim 1, wherein the insulating heat dissipation layer is a high thermal conductivity insulating heat dissipation plating layer (500) formed on the entire surface of the second lead frame (200) facing the first lead frame (100) by an electroplating process.
8. The inter-insulating package structure according to any one of claims 1 to 7, wherein the first lead frame (100) further comprises leads (140), and the chip (300) and the leads (140) are connected by metal wires (150).
9. The inter-insulating package structure of claim 8, further comprising an encapsulation material encapsulating the chip (300) and the first lead frame (100), wherein the leads (140) of the first lead frame (100) extend from the inside to the outside of the encapsulation material.
10. A semiconductor product having the internal insulation package structure of any one of claims 1 to 7.
CN202123442061.8U 2021-12-30 2021-12-30 Internal insulation packaging structure and semiconductor product Active CN217114365U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202123442061.8U CN217114365U (en) 2021-12-30 2021-12-30 Internal insulation packaging structure and semiconductor product

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202123442061.8U CN217114365U (en) 2021-12-30 2021-12-30 Internal insulation packaging structure and semiconductor product

Publications (1)

Publication Number Publication Date
CN217114365U true CN217114365U (en) 2022-08-02

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Country Status (1)

Country Link
CN (1) CN217114365U (en)

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