CN216354169U - Semiconductor structure for enhancing heat dissipation - Google Patents
Semiconductor structure for enhancing heat dissipation Download PDFInfo
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- CN216354169U CN216354169U CN202122667816.8U CN202122667816U CN216354169U CN 216354169 U CN216354169 U CN 216354169U CN 202122667816 U CN202122667816 U CN 202122667816U CN 216354169 U CN216354169 U CN 216354169U
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- lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a semiconductor structure for enhancing heat dissipation, which comprises a lead frame and a chip, wherein the chip is arranged on the surface of the lead frame; one side of the chip, which is far away from the lead frame, is connected with a copper clip, and the copper clip and the chip are packaged in a packaging body; wherein, the surface of the copper clamp is provided with a groove and/or a lug boss; for increasing the bonding area between the copper clip and the package. The combination area between the copper clamp and the packaging body can be effectively increased through the groove and/or the boss, the heat exchange path is increased, and the efficiency of the copper clamp for transferring heat to the packaging body and dissipating the heat from the packaging body is accelerated; in addition, the bonding force between the packaging body and the copper clamp can be enhanced through the groove and/or the boss, the possibility of layering between the packaging body and the copper clamp is reduced, and the reliability of a product is improved.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a semiconductor structure for enhancing heat dissipation.
Background
A semiconductor is a material having a conductive ability between a conductor and a nonconductor, and a semiconductor element is a solid-state element according to the characteristics of the semiconductor material, and its volume can be reduced to a small size, so that it consumes less power and has a high integration level, and has been widely introduced in the field of electronic technology. With the development of electronic products in the light, thin and small directions, the market has higher and higher requirements for semiconductor heat dissipation, and therefore, the heat dissipation performance of the conventional semiconductor needs to be further improved.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model aims to: a semiconductor structure with enhanced heat dissipation is provided, which can further improve the heat dissipation performance of the semiconductor.
In order to achieve the purpose, the following technical scheme is adopted in the application:
the semiconductor structure for enhancing heat dissipation comprises a lead frame and a chip, wherein the chip is arranged on the surface of the lead frame; one side of the chip, which is far away from the lead frame, is connected with a copper clip, and the copper clip and the chip are packaged in a packaging body; wherein, the surface of the copper clamp is provided with a groove and/or a lug boss; for increasing the bonding area between the copper clip and the package.
Optionally, the groove and/or the boss are/is arranged on one side of the copper clip far away from the chip.
Optionally, the copper clip is far away from the end face distance of the lead frame the packaging body is far away from the end face of the lead frame by 0.05-0.15 mm.
Optionally, the distance between the end face of the lead frame and the copper clip is 0.1mm from the end face of the lead frame.
Optionally, the depth/height of the groove/boss is 0.05-0.3 mm.
Optionally, the surface of the copper clip is provided with a plurality of grooves and/or bosses arranged at intervals.
Optionally, the groove and/or the boss are/is in a pyramid shape with a step.
Optionally, the cross section of the groove and/or the boss is circular or polygonal.
Optionally, a connecting boss is arranged on one side of the copper clip facing the chip, and the connecting boss is connected with the chip.
Optionally, the copper clip is provided with a copper clip body and a support leg, the support leg is connected to one side of the copper clip body, and the support leg is connected with the lead frame.
The beneficial effect of this application does: the utility model discloses a semiconductor structure for enhancing heat dissipation.A copper clip is connected to one side of a chip, which is far away from a lead frame, so that the heat generated by the chip can be conducted and dissipated by the lead frame and the copper clip on the two sides, and the heat dissipation performance of the semiconductor is effectively improved; the chip and the copper clamp are packaged and wrapped by the packaging body, the packaging of the chip is completed, the surface of the copper clamp can be isolated from the outside, the insulation treatment of the copper clamp is completed, and the copper clamp does not need to be subjected to insulation treatment by other means subsequently, so that the preparation process is simplified; the surface of the copper clamp is provided with the groove and/or the boss, so that the combination area between the copper clamp and the packaging body can be effectively increased through the groove and/or the boss, a heat exchange path is increased, and the efficiency of the copper clamp for transferring heat to the packaging body and dissipating the heat from the packaging body is accelerated; in addition, the bonding force between the packaging body and the copper clamp can be enhanced through the groove and/or the boss, the possibility of layering between the packaging body and the copper clamp is reduced, and the reliability of a product is improved.
Drawings
The present application will be described in further detail below with reference to the accompanying drawings and examples.
FIG. 1 is a schematic diagram illustrating one embodiment of a heat dissipation enhancing semiconductor structure according to the present application;
FIG. 2 is a schematic longitudinal cross-sectional view of the structure of FIG. 1;
FIG. 3 is a schematic diagram of the structure-removed package of FIG. 1;
FIG. 4 is a schematic longitudinal cross-sectional view of the structure of FIG. 3;
FIG. 5 is a schematic vertical cross-sectional view of another embodiment of a heat dissipation enhancing semiconductor structure of the present application;
FIG. 6 is a schematic vertical cross-sectional view of another embodiment of a heat dissipation enhancement semiconductor structure of the present application;
fig. 7 is a schematic structural diagram of another embodiment of a heat dissipation enhancement semiconductor structure according to the present application.
In the figure:
1. a lead frame; 2. a chip; 3. a copper clip; 31. a copper clip body; 32. a support leg; 33. connecting the bosses; 4. a package body; 5. a groove; 6. a bonding material; 7. and (4) gold wires.
Detailed Description
In order to make the technical problems solved, technical solutions adopted, and technical effects achieved by the present application clearer, the following describes technical solutions of embodiments of the present application in further detail, and it is obvious that the described embodiments are only a part of embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, removably connected, or integral to one another; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
As shown in fig. 1-4, a semiconductor structure for enhancing heat dissipation is provided, which includes a lead frame 1 and a chip 2, wherein the chip 2 is disposed on a surface of the lead frame 1; one side, far away from the lead frame 1, of the chip 2 is connected with a copper clip 3, the copper clip 3 and the chip 2 are packaged in a packaging body 4, and a groove 5 and/or a boss are/is arranged on the surface of the copper clip 3; the grooves and/or the bosses are used for increasing the bonding area between the copper clip 3 and the packaging body 4.
In the semiconductor field, lead frame 1 has the work for chip 2 and provides mechanical support, the electric property switches on and functions such as heat-conduction, therefore, lead frame 1 need possess elements such as base plate and pin, when installing chip 2, chip 2 is fixed in on the base plate through bonding material 6 bonding, rethread gold thread 7 with chip 2 and the pin bonding that corresponds, later use encapsulation resin to encapsulate, during the encapsulation, only encapsulate lead frame 1 and have one side of chip 2, and lead frame 1 keeps naked empty deviating from one side of chip 2, thereby can be convenient for the heat on the lead frame 1 and dispel fast. In order to accelerate the heat generated by the chip 2 to be transferred to the lead frame 1, the bonding material 6 is preferably a heat-conductive bonding material, such as a solder paste bonding material.
For further accelerating the heat dissipation, set up copper in this scheme and pressed from both sides 3 in one side (being the top surface of chip 2) that chip 2 kept away from lead frame 1, the heat that chip 2 during operation produced can transmit to copper fast and press from both sides 3 on, and because copper presss from both sides 3 area big, for chip 2, it can give packaging body 4 with the heat diffusion more fast to realized the two-sided heat dissipation to chip 2, effectively accelerated the radiating efficiency. The connection between the copper clip 3 and the chip 2 is preferably made by using a thermally conductive bonding material.
On the basis of the arrangement of the copper clip 3, in order to further improve the heat dissipation efficiency, the surface of the copper clip 3 is also provided with the groove and/or the boss, so that the combination area between the copper clip 3 and the packaging body 4 can be effectively increased through the groove and/or the boss, the heat exchange path is increased, and the efficiency of the copper clip 3 in transferring heat to the packaging body 4 and dissipating the heat from the packaging body 4 is accelerated; in addition, the bonding force between the packaging body 4 and the copper clamp 3 can be enhanced through the groove and/or the boss, the possibility of layering between the packaging body 4 and the copper clamp 3 is reduced, and the reliability of a product is improved. Wherein, both the principle of setting up of recess and boss is the same, all is through the surface unevenness who makes copper press from both sides 3 to increase the surface area that copper pressed from both sides, consequently, to this scheme, 3 surfaces of copper clamp can only set up recess or boss, do and combine recess and boss to set up.
Compared with the arrangement of the boss, the process of arranging the groove 5 on the surface of the copper clamp 3 is simpler, and the material is directly removed from the surface of the copper clamp 3 during processing, so that as a preferred embodiment, the groove 5 is only arranged on the surface of the copper clamp 3, as shown in fig. 1 to 7. The copper of this scheme presss from both sides 3, can directly press from both sides structural direct realization at traditional encapsulation copper, and the recess is direct machine-shaping at the in-process that makes the copper clamp, consequently does not have the problem of cost increase.
It should be noted that, in the prior art, there is also a product in which a heat dissipation plate connected to a chip is disposed on a top surface of a semiconductor to achieve double-sided heat dissipation, but the heat dissipation plate is connected to the chip and also serves as a Source electrode of the chip, so that the heat dissipation of the product is increased, but the increased heat dissipation plate needs to be subjected to insulation treatment, so that the difficulty in using the product is increased, which obviously does not have product competitiveness. The copper clip 3 that directly utilizes the encapsulation of chip to increase in this scheme encapsulates in packaging body 4, has accomplished the insulating processing to copper clip 3 promptly, need not to carry on other insulating processing means afterwards again, has simplified technology promptly, can not increase the use degree of difficulty of product again, has improved the competitiveness of product.
In one embodiment, the groove 5 and/or the projection are disposed on a side of the copper clip 3 away from the chip 2. That is, the recess 5 is provided only on the side away from the chip 2, and the side of the copper clip 3 connected to the chip 2 is flat, so that the connection between the chip 3 and the copper clip 3 is not hindered.
In order to guarantee that the surface of the copper clamp 3 can be completely wrapped, enough insulating property is guaranteed, meanwhile, heat dissipation is facilitated, preferably, the copper clamp 3 is far away from the end face distance of the lead frame 1, the packaging body 4 is far away from the end face of the lead frame 1 by 0.05-0.15 mm. In this thickness range, can make copper press from both sides 3 to be buried inside packaging body 4, guaranteed the insulating properties of product, in addition, because this thickness can not be too thick, copper presss from both sides 3 and gives off the heat to packaging body 4 back, and the heat in packaging body 4 can be followed its surface fast and distributed.
Further, as an optimal option, the end face of the copper clip 3, which is far away from the lead frame 1, is 0.1mm away from the end face of the package body 4, which is far away from the lead frame 1.
For the depth/height setting of the groove/boss, the actual structure setting of the product can be combined, for example, the design of parameters such as the thickness of the copper clip 3, the packaging thickness of a semiconductor and the like is combined, and preferably, the depth/height of the groove/boss is 0.05-0.3 mm.
In order to effectively increase the bonding area and bonding strength of the package 4 and the copper clip 3, the surface of the copper clip 3 is provided with a plurality of grooves 5 and/or bosses arranged at intervals. That is, the surface area of the copper clip 3 can be effectively increased by providing the plurality of grooves 5/bosses, so that the heat dissipation area is increased, and the bonding strength between the package body 4 and the copper clip 3 is improved.
Further, as a preferred embodiment, referring to the embodiment of fig. 1 to 4, the grooves 5 and/or the bosses have a pyramid shape having a step. This structure can further enhance the bonding strength of the package 4 and the copper clip 3.
Optionally, the cross section of the groove 5 and/or the boss is circular or polygonal. The cross-section of the groove 5 is circular, as in the embodiment of fig. 1, and the cross-section of the groove 5 is square, as in the embodiment of fig. 7. Of course, other shapes of the grooves/projections are also possible.
Further, in order to facilitate the connection between the copper clip 3 and the chip 2, referring to the structures of fig. 5 to 6, a side of the copper clip 3 facing the chip 2 is provided with a connection boss 33, and the connection boss 33 is connected with the chip 2. The copper clip 3 can be conveniently aligned and installed on the chip 2 by arranging the connecting boss 33, and meanwhile, the bonding strength of the copper clip 3 and the chip 2 can be enhanced. Meanwhile, the thickness of the copper clip 3 in the region corresponding to the connecting boss 33 is thicker, and the depth of the groove 5 arranged in the region can be deeper, so that the area of the groove 5 is increased, and the bonding strength of the packaging body 4 and the copper clip 3 is improved. On this basis, referring to fig. 5, the grooves 5 may be equally distributed over the entire outer surface of the copper clip 3, or referring to fig. 6, the grooves 5 may be arranged only in the region of the copper clip 3 corresponding to the connection boss 33.
Further, the copper clip 3 has a copper clip body 31 and a leg 32, the leg 32 is connected to one side of the copper clip body 31, and the leg 32 is connected to the lead frame 1. The copper clip 3 is connected with the lead frame 1 through the support leg 32, and heat on the copper clip 3 can be transferred to the lead frame 1 through the support leg 32 to be dissipated, so that heat dissipation is further accelerated.
In summary, the semiconductor structure provided by the embodiment has the advantages of high heat dissipation efficiency, good structural reliability and the like.
In the description herein, it is to be understood that the terms "upper," "lower," "left," "right," and the like are used in an orientation or positional relationship merely for convenience in description and simplicity of operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the present application. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principles of the present application have been described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the present application and is not to be construed in any way as limiting the scope of the application. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present application without inventive effort, which shall fall within the scope of the present application.
Claims (10)
1. A semiconductor structure for enhancing heat dissipation is characterized by comprising a lead frame (1) and a chip (2), wherein the chip (2) is arranged on the surface of the lead frame (1); one side, far away from the lead frame (1), of the chip (2) is connected with a copper clip (3), and the copper clip (3) and the chip (2) are packaged in a packaging body (4); the surface of the copper clip (3) is provided with a groove (5) and/or a boss for increasing the combination area between the copper clip (3) and the packaging body (4).
2. The heat spreading enhancement semiconductor structure according to claim 1, wherein the grooves (5) and/or the lands are provided on a side of the copper clip (3) remote from the chip (2).
3. The structure of claim 2, wherein the end face of the copper clip (3) far away from the lead frame (1) is 0.05-0.15 mm away from the end face of the package body (4) far away from the lead frame (1).
4. The structure of claim 3, wherein the end face of the copper clip (3) away from the lead frame (1) is 0.1mm away from the end face of the package body (4) away from the lead frame (1).
5. The structure of claim 3, wherein the depth/height of the grooves (5)/the bosses is 0.05-0.3 mm.
6. The semiconductor structure for enhancing heat dissipation according to claim 1, wherein the surface of the copper clip (3) is provided with a plurality of the grooves (5) and/or the bosses arranged at intervals.
7. The enhanced heat dissipation semiconductor structure of claim 1, wherein the grooves (5) and/or lands are pyramid-shaped with a step level.
8. The semiconductor structure for enhancing heat dissipation according to claim 1, wherein the cross-section of the groove (5) and/or the boss is circular or polygonal.
9. The semiconductor structure for enhancing heat dissipation according to claim 1, wherein the side of the copper clip (3) facing the chip (2) has a connection boss (33), and the connection boss (33) is connected with the chip (2).
10. The enhanced heat dissipation semiconductor structure according to any of claims 1-9, wherein the copper clip (3) has a copper clip body (31) and a leg (32), the leg (32) is connected to one side of the copper clip body (31), and the leg (32) is connected to the lead frame (1).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122667816.8U CN216354169U (en) | 2021-11-02 | 2021-11-02 | Semiconductor structure for enhancing heat dissipation |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122667816.8U CN216354169U (en) | 2021-11-02 | 2021-11-02 | Semiconductor structure for enhancing heat dissipation |
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| CN216354169U true CN216354169U (en) | 2022-04-19 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116995041A (en) * | 2023-09-26 | 2023-11-03 | 深圳平创半导体有限公司 | Packaging structure and packaging method of power semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116995041A (en) * | 2023-09-26 | 2023-11-03 | 深圳平创半导体有限公司 | Packaging structure and packaging method of power semiconductor device |
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