CN100454536C - Semiconductor chip encapsulation structure and its application device - Google Patents
Semiconductor chip encapsulation structure and its application device Download PDFInfo
- Publication number
- CN100454536C CN100454536C CNB2006100667491A CN200610066749A CN100454536C CN 100454536 C CN100454536 C CN 100454536C CN B2006100667491 A CNB2006100667491 A CN B2006100667491A CN 200610066749 A CN200610066749 A CN 200610066749A CN 100454536 C CN100454536 C CN 100454536C
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- Prior art keywords
- semiconductor chip
- conductor
- insulating barrier
- light source
- encapsulating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
A semiconductor chip package structure attaches a plurality of semiconductor chips onto a plurality of package surfaces at peripheral of the columnar body, which is composed of at least three conductors isolated by an insulating layer, allowing a plurality of package surfaces of two different conductors isolated by the insulating layer to be formed at the periphery of the columnar body, and connecting the semiconductor chip to the conductors isolated by the insulating layer in series and/or parallel way, make contact and/or shunt mode electrical continuity bonding is to insulating layer kept apart on, as an electrode for supplying power to users. Moreover, the light source applying this semiconductor chip package structure, is disposed in the housing of the condensing cup, may form a semiconductor light source apparatus of giving attention to both condensation and heat radiating.
Description
Technical field
The present invention relates to a kind of semiconductor chip package, particularly a kind of semiconductor chip package and application apparatus thereof of taking into account optically focused and heat radiation.
Background technology
Existing as light-emitting diode (Light Emitting Diode is called for short LED) waits the application of semiconductor chip, all must be encapsulated in the encapsulating structure also extraction electrode, is beneficial to the user and connects power supply and power and make its running or luminous.
For single lower powered light-emitting diode, heat radiation is not the major consideration of encapsulating structure.Recently, in order to improve the range of application of light-emitting diode, multicore sheet, high-power LED package have become inevitable trend requirement.For example, name is called " Concentrically Leaded Power SemiconductorDevice Package " the 6th, 492, No. 725 patents of the U.S., a kind of concentrical encapsulating structure is promptly proposed, be beneficial to encapsulate the heat radiation of the structure of a plurality of high-power die.This kind encapsulating structure, though can solve the heat dissipation problem of a plurality of high-power die of encapsulation, but because of periphery at mounting structure, only there is one side can attach semiconductor chip, make the encapsulation quantity of semiconductor chip be restricted, and when semiconductor chip is light-emitting diode,, make it can't satisfy optically focused requirement when being applied in semi-conductor light source device also because the periphery of mounting structure does not have even distribution semiconductor chip.
Summary of the invention
The purpose of this invention is to provide a kind of semiconductor chip package and application apparatus thereof,, more can take into account the optically focused demand of heat radiation and light supply apparatus except can in smaller volume, encapsulating the more semiconductor chip.
For reaching above-mentioned and other purpose, the invention provides a kind of semiconductor chip package, it is characterized in that, comprise: cylindrical body, it is made up of three conductors and insulating barrier at least, isolate by described insulating barrier between each described conductor, the periphery of described cylindrical body has a plurality of encapsulating faces, and described encapsulating face is through the isolation of described insulating barrier and form by wantonly two adjacent described conductors; A plurality of semiconductor chips are attached at respectively on the described encapsulating face, and described semiconductor chip adopts series connection and/or parallel way to be electrically connected to described conductor.
Described encapsulating face is the periphery that is evenly distributed in described cylindrical body.The encapsulating face area ratio difference that the described conductor of described insulating barrier both sides is shared.Described semiconductor chip is to be attached to occupy on the bigger described conductor of described encapsulating face area.Described semiconductor chip is connected on the described conductor of described insulating barrier both sides respectively by lead.Described semiconductor chip is to be flip-chip, directly attaches and is electrically connected on the described conductor of described insulating barrier both sides.Described semiconductor chip is a light-emitting diode chip for backlight unit.
The present invention also provides a kind of semi-conductor light source device, it is characterized in that, comprising: housing has the prefocus cup in order to optically focused; Cylindrical body, be disposed in the described prefocus cup, described cylindrical body is to be made up of three conductors and insulating barrier at least, isolate by described insulating barrier between each described conductor, periphery also has a plurality of encapsulating faces, and described encapsulating face is to be formed through the isolation of described insulating barrier by wantonly two adjacent described conductors; A plurality of semiconductor chips are attached at respectively on the described encapsulating face, and described semiconductor chip adopts series connection and/or parallel way to be electrically connected to described conductor.
Described encapsulating face is the periphery that is evenly distributed in described cylindrical body.The encapsulating face area ratio difference that the described conductor of described insulating barrier both sides is shared.Described semiconductor chip is to be attached to occupy on the bigger described conductor of described encapsulating face area.Described semiconductor chip is connected on the described conductor of described insulating barrier both sides respectively by lead.Described semiconductor chip is to be flip-chip, directly attaches and is electrically connected on the described conductor of described insulating barrier both sides.Described semiconductor chip is a light-emitting diode chip for backlight unit.
For above and other objects of the present invention, feature and advantage can be become apparent, hereinafter special with preferred embodiment, and cooperate appended graphicly, be described in detail below:
Description of drawings
Fig. 1 is a kind of semiconductor chip package schematic perspective view that shows according to first embodiment of the invention;
Fig. 2 is the vertical view of the semiconductor chip package of displayed map 1;
Fig. 3 is a kind of semiconductor chip package schematic perspective view that shows according to second embodiment of the invention;
Fig. 4 is the vertical view of the semiconductor chip package of displayed map 2;
Fig. 5 is a kind of semiconductor chip package vertical view that shows according to third embodiment of the invention;
Fig. 6 is a kind of semiconductor chip package vertical view that shows according to fourth embodiment of the invention;
Fig. 7 is a kind of semi-conductor light source device schematic diagram that shows the preferred embodiment according to the present invention;
Fig. 8 is the another kind of semiconductor chip connected mode of the semiconductor chip package of displayed map 1.
Description of reference numerals: 110 cylindrical body; 111,112,113,114,311,312,313,314 conductors; 119,319,519,619 insulating barriers; 120,320 semiconductor chips; 121 leads; 131,132,133,134,331,332,333,334 encapsulating faces; 511,512,513,611,612,613,614,615 conductors; 531,532,533,631,632,633,634,635 encapsulating faces; 700 semi-conductor light source devices; 710 housings; 711 prefocus cups; 720 light sources.
Embodiment
Please refer to Figure 1 and Figure 2, it is respectively a kind of semiconductor chip package schematic perspective view and vertical view according to first embodiment of the invention.Among the figure, semiconductor chip package comprise cylindrical body 110 and a plurality of for example be the semiconductor chip 120 of light-emitting diode.Cylindrical body 110 is made up of with insulating barrier 119 isolation respectively conductor 111,112,113 and 114, conductor 111,112,113 and 114 shape are to be complementation, make conductor 111,112,113 and 114 to isolate by insulating barrier 119 therebetween, and form the equilateral quadrangle column structure that periphery has 4 encapsulating faces that are evenly distributed 131,132,133 and 134.
As shown in the figure, encapsulating face 131 is insulating barrier 119 insulated conductor 111 and 112 formed planes, encapsulating face 132 is insulating barrier 119 insulated conductor 112 and 113 formed planes, encapsulating face 133 is insulating barrier 119 insulated conductor 113 and 114 formed planes, and encapsulating face 134 then is insulating barrier 119 insulated conductor 114 and 111 formed planes.Herein, though encapsulating face 131,132,133 and 134 is to be example with the plane, right those skilled in the art should know to have the nonplanar structure of difference of height, also are selectable another way.
Among the figure, in order semiconductor chip 120 to be attached at respectively on the conductor of encapsulating face 131,132,133 and 134, therefore, be positioned at the conductor 111 and 112, conductor 112 and 113, conductor 113 and 114 and shared area ratio such as conductor 114 and 111 and inequality of insulating barrier 119 both sides of encapsulating face 131,132,133 and 134, be beneficial to semiconductor chip 120 is attached on the bigger conductor of occupied area 111,112,113 and 114, make semiconductor chip 120 be positioned at the middle position of encapsulating face 131,132,133 and 134.
In addition, among the figure and respectively semiconductor chip 120 is connected to lead 121 on the conductor 111,112,113 and 114 of insulating barrier 119 both sides, make semiconductor chip 120 adopt series connection and/or parallel way to be electrically connected to conductor 111,112,113 and 114.Wherein, use the mode that lead 121 connects semiconductor chip 120, can be as Fig. 1 and shown in Figure 2, semiconductor chip 120 is connected to respectively on the conductor 111,112,113 and 114 of insulating barrier 119 both sides, make the semiconductor chip 120 that is attached on same conductor 111,112,113 and 114, can form the relation that is connected in parallel.Certainly, its also can be as illustrated in fig. 8 with a plurality of be attached at same conductor 111,112,113 and the semiconductor chip 120 on 114 connected in advance after, be connected to again on the conductor 111,112,113 and 114 of insulating barrier 119 both sides, so that the selection of different power voltage to be provided.
Except illustrated two kinds of connected modes, those skilled in the art should know, also can be according to different application demands, to be disposed at the semiconductor chip 120 on encapsulating face 131,132,133 and 134, carry out series, parallel or series-parallel combination of interactions respectively, with this encapsulating structure of applying in a flexible way, reach various functional requirement.
Please refer to Fig. 3 and shown in Figure 4, it is respectively a kind of semiconductor chip package schematic perspective view and vertical view according to second embodiment of the invention.Different with Fig. 1 and Fig. 2 is, semiconductor chip 320 among this embodiment is to be flip-chip (Flip Chip), therefore, be positioned at encapsulating face 331,332,333 and 334 insulating barrier 319 both sides conductor 311 and 312, conductor 312 and 313, conductor 313 and 314 and shared area ratio such as conductor 314 and 311 can be identical, and semiconductor chip 320 is directly attached and is electrically connected to insulating barrier 319 both sides conductor 311 and 312, conductor 312 and 313, conductor 313 and 314 and conductor 314 and 311 on.
Please refer to Fig. 5 and shown in Figure 6, it is respectively the cylindrical body vertical view of a kind of semiconductor chip package of the 3rd and the 4th embodiment according to the present invention.Among Fig. 5, cylindrical body is made up of with insulating barrier 519 isolation respectively conductor 511,512 and 513, conductor 511,512 and 513 shape are to be complementation, make conductor 511,512 and 513 to isolate by insulating barrier 519 therebetween, and form the equilateral triangle column structure that periphery has 3 encapsulating faces that are evenly distributed 531,532 and 533.
Among Fig. 6, cylindrical body is made up of with insulating barrier 619 isolation respectively conductor 611,612,613,614 and 615, conductor 611,612,613,614 and 615 shape are to be complementation, make conductor 611,612,613,614 and 615 to isolate by insulating barrier 619 therebetween, and form the equilateral pentagon column structure that periphery has 5 encapsulating faces that are evenly distributed 631,632,633,634 and 635.So, the rest may be inferred and as can be known, according to semiconductor chip package of the present invention, except using respectively as described above the embodiment of 3,4 or 5 conductors, also can use, form and have the equilateral of a plurality of encapsulating faces or even unequal-sided polygon column structure more than the conductor more than 5.
Please refer to shown in Figure 7ly, it is a kind of semi-conductor light source device schematic diagram according to a preferred embodiment of the present invention.Among the figure, this semi-conductor light source device 700 also comprises and uses the light source 720 of the semiconductor chip package of embodiment as described above except housing 710.Certainly, as is known to the person skilled in the art, the light source 720 of this semi-conductor light source device 700 also can be other polygon column structure that spirit according to the present invention changes.
As shown in the figure, the housing 710 of this semi-conductor light source device 700 has can be in order to the prefocus cup 711 of optically focused, and light source 720 is positioned at the center of prefocus cup 711, makes prefocus cup 711 light that light source 720 is produced can be converged to the place ahead of light supply apparatus.Because this semiconductor light supply apparatus 700 is to use the light source 720 of the semiconductor chip package of embodiment as described above, so as previously mentioned, it can encapsulate more semiconductor chip 120 in smaller volume, reach preferable spotlight effect.In addition, because the cylindrical body of light source 720 is except the current electrode that can be used as semi-conductor light source device 700, also can by with the thermal coupling of housing 710, or with the coupling that adds radiator (not illustrating), the feasible heat energy that is produced as semiconductor chips such as High Power LED 120 is dispersed fast, reaches preferable heat radiation function.
Though the present invention discloses as above with preferred embodiment, so it is not in order to qualification the present invention, any those skilled in the art, and various changes and the retouching done without departing from the spirit and scope of the present invention also belong to scope of the present invention.Therefore, protection scope of the present invention defines and is as the criterion when looking claim.
Claims (14)
1. a semiconductor chip package is characterized in that, comprising:
Cylindrical body, it is made up of three conductors and insulating barrier at least, isolate by described insulating barrier between each described conductor, the periphery of described cylindrical body has a plurality of encapsulating faces, and described encapsulating face is through the isolation of described insulating barrier and form by wantonly two adjacent described conductors;
A plurality of semiconductor chips are attached at respectively on the described encapsulating face, and described semiconductor chip adopts series connection and/or parallel way to be electrically connected to described conductor.
2. semiconductor chip package as claimed in claim 1 is characterized in that: described encapsulating face is the periphery that is evenly distributed in described cylindrical body.
3. semiconductor chip package as claimed in claim 1 is characterized in that: the encapsulating face area ratio difference that the described conductor of described insulating barrier both sides is shared.
4. semiconductor chip package as claimed in claim 3 is characterized in that: described semiconductor chip is to be attached to occupy on the bigger described conductor of described encapsulating face area.
5. semiconductor chip package as claimed in claim 1 is characterized in that: described semiconductor chip is connected on the described conductor of described insulating barrier both sides respectively by lead.
6. semiconductor chip package as claimed in claim 1 is characterized in that: described semiconductor chip is to be flip-chip, directly attaches and is electrically connected on the described conductor of described insulating barrier both sides.
7. semiconductor chip package as claimed in claim 1 is characterized in that: described semiconductor chip is a light-emitting diode chip for backlight unit.
8. a semi-conductor light source device is characterized in that, comprising:
Housing has the prefocus cup in order to optically focused;
Cylindrical body, be disposed in the described prefocus cup, described cylindrical body is to be made up of three conductors and insulating barrier at least, isolate by described insulating barrier between each described conductor, periphery also has a plurality of encapsulating faces, and described encapsulating face is to be formed through the isolation of described insulating barrier by wantonly two adjacent described conductors;
A plurality of semiconductor chips are attached at respectively on the described encapsulating face, and described semiconductor chip adopts series connection and/or parallel way to be electrically connected to described conductor.
9. semi-conductor light source device as claimed in claim 8 is characterized in that: described encapsulating face is the periphery that is evenly distributed in described cylindrical body.
10. semi-conductor light source device as claimed in claim 8 is characterized in that: the encapsulating face area ratio difference that the described conductor of described insulating barrier both sides is shared.
11. semi-conductor light source device as claimed in claim 10 is characterized in that: described semiconductor chip is to be attached to occupy on the bigger described conductor of described encapsulating face area.
12. semi-conductor light source device as claimed in claim 8 is characterized in that: described semiconductor chip is connected on the described conductor of described insulating barrier both sides respectively by lead.
13. semi-conductor light source device as claimed in claim 8 is characterized in that: described semiconductor chip is to be flip-chip, directly attaches and is electrically connected on the described conductor of described insulating barrier both sides.
14. semi-conductor light source device as claimed in claim 8 is characterized in that: described semiconductor chip is a light-emitting diode chip for backlight unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100667491A CN100454536C (en) | 2006-04-11 | 2006-04-11 | Semiconductor chip encapsulation structure and its application device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100667491A CN100454536C (en) | 2006-04-11 | 2006-04-11 | Semiconductor chip encapsulation structure and its application device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101055864A CN101055864A (en) | 2007-10-17 |
| CN100454536C true CN100454536C (en) | 2009-01-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2006100667491A Expired - Fee Related CN100454536C (en) | 2006-04-11 | 2006-04-11 | Semiconductor chip encapsulation structure and its application device |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102064166B (en) * | 2010-11-20 | 2012-03-14 | 李光 | Curved surface package structure of light-emitting semiconductor chip and light-emitting semiconductor light source device thereof |
| CN102064167B (en) * | 2010-11-20 | 2012-07-25 | 李光 | Helical packaging structure of light-emitting semiconductor chip and light-emitting semiconductor light source device thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5191224A (en) * | 1987-04-22 | 1993-03-02 | Hitachi, Ltd. | Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein |
| US6492725B1 (en) * | 2000-02-04 | 2002-12-10 | Lumileds Lighting, U.S., Llc | Concentrically leaded power semiconductor device package |
-
2006
- 2006-04-11 CN CNB2006100667491A patent/CN100454536C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5191224A (en) * | 1987-04-22 | 1993-03-02 | Hitachi, Ltd. | Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein |
| US6492725B1 (en) * | 2000-02-04 | 2002-12-10 | Lumileds Lighting, U.S., Llc | Concentrically leaded power semiconductor device package |
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| Publication number | Publication date |
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| CN101055864A (en) | 2007-10-17 |
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Granted publication date: 20090121 Termination date: 20100411 |