201006000 九、發明說明： - 【發明所屬之技術領域】 . 本發明涉及一種發光二極體及製造方法，特別涉及一 種覆晶式發光二極體及其製造方法。 【先前技術】 現有之發光二極體（Light Emitting Diode，LED)之晶片 (chip)與基板（substrate)之電性接合方式一般包括打線接合 (Wire Bonding)與覆晶接合(Flip-chip bonding)兩種。參見圖 _ 1，一種晶片與基板覆晶接合之發光二極體50,其包括封裝 殼體51、基板52及晶片53。封裝殼體51具有一容置槽 510 ’基板52設置於容置槽510底部。晶片53具有電極之 一面藉由接合層54與基板52接合。接合層54可為金屬凸 塊（如金凸塊）或焊料凸塊（Solder Bump)等接合物質。晶片 53之電極與基板52藉由接合層54相接合，而晶片53之出 光面530位於基板52之上方，從而可避免晶片53之電極 遮蔽出光面530出光以提高出光率。另外，覆晶式發光二 ®極體50還具有較高之散熱效率及較小之封裝體積。 然而’接合層54與基板52、以及晶片53之電極接合 不夠牢固’晶片53容易相對基板52產生移位，從而造成 晶片53與基板52電連接性能不佳。另外，於覆晶式發光 二極體50之製造過程中，接合層54於基板52與晶片53 之間會產生接點移位，造成接合良率不佳之情形。因此， 有必要提供一種晶片與基板藉由接合層穩固接合之發光二 極體及其製造方法。 201006000 【發明内容】 以下將以實施例說明一種晶片與基板藉由接合層穩固 接合之發光二極體及其製造方法。 一種發光二極體，其包括：一個基板；一個發光二極 體晶片’其覆晶接合於該基板上；一個接合層，其設置於 該基板與S亥發光二極體晶片之間用以接合該基板與該發光 二極體晶片並使二者電性導通。該基板之與該發光二極體 晶片相接合之表面具有至少一個凹槽，該接合層設置於該 霸至少一個凹槽中。 一種發光二極體之製造方法，包括：提供一發光二極 體晶片與一具有至少一凹槽之基板；提供一第一接合層並 使其與該發光二極體晶片相接合；提供一第二接合層並將 其設置於該基板之至少一凹槽中；將該發光二極體晶片壓 向該基板，使該第一接合層與該第二接合層相接觸；加熱 該第一接合層與該第二接合層直至二者結合為一體。 〇 與先刖技術相比，上述發光二極體及其製造方法中基 板之與發光二極體晶片相接合之表面具有至少一個凹槽， 接合層設置於該至少-個凹槽中，發光二極體晶片藉由接 U層覆晶接合於基板上，使得發光：極體晶片與基板藉由 接》層接合之較為穩固，並且接合層不易產生移位，保證 了發光二極體晶片與基板具有較好之電連接性能。 【實施方式】 了面結合附圖對本發明作進一步之詳細說明。 凊參見圖2,本發明第—實施例提供之發光二極體 201006000 其包括封裝殼體（Housing)ll，基板12,發光二極體晶片i3， • 接合層14，封裝層15。 封裝殼體11具有一容置槽110。封裝殼體11所用材料 為絕緣材料，例如液晶聚合物（Liquid Crystal Polymer)、塑 膠等。 基板12設置於容置槽110之底部，其用於承載發光二 極體晶片13。基板12與外部電源（圖未示）相連，使外部電 源藉由基板12傳導驅動電流至發光二極體晶片13。基板 ❹12為一導線架（Lead Frame)，其所用材料為高導電性材料， 例如金、銀、銅等金屬。基板12之暴露於容置槽110底部 之表面121上具有一第一凹槽122及一與第一凹槽122並 列設置之第二凹槽123。第一凹槽122與第二凹槽123均為 一立方體凹槽。可理解的是，第一凹槽122與第二凹槽123 亦可為其他形狀之凹槽’如半球形凹槽等。 發光二極體晶片13為一半導體發光元件，其可為氮化 鎵（GaN)，氮化鋁銦鎵（AlInGaN)，砷化鎵（GaAs)，麟化鎵 ® (GaP)，磷化鋁銦鎵（AlInGaP)等發光二極體晶片。驅動電流 流過發光二極體晶片13時可使其發出特定波長之光。以氮 化鎵發光二極體晶片為例，其包含藍寶石層（SaPPhire)，氮 化鎵過渡層（Buffer)，N型氮化鎵層，多重量子阱（Multiple Quantum Well，MQW)發光層’ P型氮化鎵層，第一電極層 及第二電極層。於本實施例中，發光二極體晶片13為一氮 化鎵發光二極體晶片，其設置於容置槽110中且覆晶接合 於基板12,即發光二極體晶片13之第一電極131與第二電 201006000 極132位於發光二極體晶片13之同一側且藉由接合層14 與基板12相接合。 接合層14設置於基板12與發光二極體晶片13之間， 用以接合基板12與發光二極體晶片13並使二者電性導 通。接合層14為金屬塊（如金塊）或焊料塊（錫塊）。根據基 板12之材料及發光二極體之製程條件，可選擇不同之錫塊 種類，例如高熔點之95%鉛-5%錫合金，或低熔點之51%銦 -32.5%鉍-16.5%錫合金、63%鉛-37%錫合金、50%鉛-50%銦 _合金等。於本實施例中，接合層14包括第一焊料塊141與 第二焊料塊142,其均為51%銦-32.5%鉍-16.5%錫合金。第 一焊料塊141部分嵌入基板12之第一凹槽122内並與發光 二極體晶片13之第一電極131相連，第二焊料塊142部分 嵌入於基板12之第二凹槽123内並與發光二極體晶片13 之第二電極132相連。由於接合層14所包括之第一焊料塊 141與第二焊料塊142分別設置於第一凹槽122與第二凹槽 _ 123内，使得發光二極體晶片13與基板12藉由接合層14 接合之較為穩固，並且接合層14不易產生移位，保證了發 光二極體晶片13與基板12具有較好之電連接性能。於此， 接合層14之平行於基板12之表面121之橫截面積小於第 一凹槽122及第二凹槽123之平行於基板12之表面121之 橫截面積，即第一焊料塊141、第二焊料塊142之平行於基 板12之表面121橫截面積分別小於第一凹槽122及第二凹 槽123之平行於基板12之表面121橫截面積。 封裝層15設置於容置槽110中以覆蓋發光二極體晶片 201006000 13。封裝層15可為矽膠等透明膠體。發光二極體10還可 進一步包括光波長轉換物質16，例如螢光粉。光波長轉換 物質16摻雜於封裝層15中，用以對發光二極體晶片13發 出之特定波長進行光色轉換，使得發光二極體10發出白光 或多色光。 參見圖3，本發明第二實施例提供之發光二極體20， 其與上述第一實施例所提供之發光二極體10基本相同，不 同之處在於：基板22包括一絕緣層221及一設置於絕緣層 瘳221上之導電層222。導電層222位於與發光二極體晶片13 相鄰之一侧。發光二極體晶片13藉由與接合層14與導電 層222電性連接。絕緣層221所用材料可為陶瓷，矽，氮 化鋁，氮化硼或碳化矽。導電層222所用材料可為金、銀、 銅等。可理解的是，基板22還可為金屬芯電路板（Metal core PCB，MCPCB)或 IS 基板(Aluminum Substrate)等。 參見圖4，本發明第三實施例提供之發光二極體30， ©其與上述第一實施例所提供之發光二極體10基本相同，不 同之處在於：發光二極體30進一步包括接著膠層35。 接著膠層35設置於發光二極體晶片13與基板12之間 除了由接合層14接合以外之空隙處，使得發光二極體晶片 13藉由接合層14與基板12電性導通之外之部位不會與基 板12電性導通，以避免造成短路或電極擊穿等現象而損壞 發光二極體晶片13。接著膠層35還可用以提高發光二極體 晶片13與基板12接合過程之穩定性，以提升接合過程之 良率。接著膠層35為一柔性膠質絕緣材料，如高分子絕緣 11 201006000 膠、助焊劑（flux)、非導電性固晶膠等。 參見圖5，本發明第四實施例提供之發光二極體40， 其與上述第二實施例所提供之發光二極體20基本相同，不 同之處在於：發光二極體40進一步包括接著膠層35。接著 膠層35設置於發光二極體晶片13與基板22之導電層222 之間除了藉由接合層14接合以外之空隙處。 參見圖6至圖12,本發明第五實施例提供之發光二極 體30之製造方法，包括以下步驟： 如圖6所示，提供一發光二極體晶片13與一接合層 17。接合層17包括第一焊料塊171與第二焊料塊172。第 一焊料塊171之一端為半球形，第二焊料塊172之一端為 錐形。接合層17之形成方式主要有蒸鍍、沈積、焊料印刷 或電鍍法等。 如圖7所示，將接合層17與發光二極體晶片13接合。 於此，將第一焊料塊171之與其半球形端部相對之一端與 發光二極體晶片13之第一電極131接合，將第二焊料塊172 之與其錐形端部相對之一端與發光二極體晶片13之第二電 極132接合。 如圖8所示，提供一基板12，基板12之一表面具有第 一凹槽122與第二凹槽123。第一凹槽122與第二凹槽123 之平行於基板12之表面121之橫截面積分別大於第一焊料 塊171、第二焊料塊172之橫截面積。 如圖9所示，將接合物質置入基板12之第一凹槽122 與第二凹槽123内以形成接合層18。接合層18與接合層 12 201006000 17為同一物質。第一凹槽122與第二凹槽123之平行於基 ' 板12之表面121之橫截面積分別大於第一焊料塊171、第 ’ 二烊料塊172之橫截面積，有利於接合層17與接合層18 相接合。 如圖10所示，將一接著膠層35設置於基板12之表面 以覆蓋第一凹槽122,第二凹槽123及接合層18。接著膠 層35之形成方法可為印刷、塗佈、點膠等。 如圖11所示，發光二極體晶片13及與其連結之接合 ⑩層17下壓於基板12上之接合層18。於此，第一焊料塊171 之半球形端部壓入第一凹槽122内之接合層18，第二焊料 塊172之錐形端部壓入第二凹槽123内之接合層18。由於 接合層17與接合層18為一硬性材料，其硬度比由柔性膠 質材料構成之接著膠層35大，因此，發光二極體晶片13 及與其連結之接合層17之下壓過程中，會將接著膠層35 往周圍排開使得接合層17與接合層18直接接觸。第一焊 _料塊171與第二焊料塊172分別具有半球形端部與錐形端 部，從而有利於接合層17與接合層18相接合。 如圖12所示，藉由溫度控制以使接合層17與接合層 18形成熔融態，使得接合層17插入接合層18内部以結合 為一體以接合發光二極體晶片13與基板12。此時，接著膠 層35分佈於發光二極體晶片13與基板12間除了由接合層 17與接合層18接合之外之空隙處。接著膠層35還可防止 接合層17與接合層18融合為一體前因外力作用造成二者 間滑動移位，避免接合層17與接合層18對位不精準而造 13 201006000 成良率降低。 綜上所述，本發明確已符合發明專利之要件，遂依法 提出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案 技藝之人士援依本發明之精神所作之等效修飾或變化，皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係一種現有之覆晶式發光二極體之截面示意圖。 圖2係本發明第一實施例提供之發光二極體之截面示 意圖。 圖3係本發明第二實施例提供之發光二極體之截面示 意圖。 圖4係本發明第三實施例提供之發光二極體之截面示 意圖。 圖5係本發明第四實施例提供之發光二極體之截面示 ❹意圖。 圖ό至圖12係本發明第五實施例提供之發光二極體之 製造方法之流程示意圖。 【主要元件符號說明】 發光二極體 50、10、20、30、40 封裝殼體 51、11 基板容置槽接合層 52、12、22 510 、 110 54、14、17、18 201006000 出光面 530 發光二極體晶片 13 > 53 封裝層 15 表面 121 第一凹槽 122 第二凹槽 123 第一電極 131 第二電極 132 第一焊料塊 141 、 171 第二焊料塊 142、172 光波長轉換物質 16 絕緣層 221 導電層 222 接著膠層 35 參 15201006000 IX. Description of the invention: - Technical field to which the invention pertains. The present invention relates to a light-emitting diode and a method of fabricating the same, and more particularly to a flip-chip light-emitting diode and a method of fabricating the same. [Prior Art] The electrical bonding method of a chip and a substrate of a conventional light emitting diode (LED) generally includes wire bonding and Flip-chip bonding. Two. Referring to FIG. 1, a light-emitting diode 50 in which a wafer and a substrate are flip-chip bonded to each other includes a package case 51, a substrate 52, and a wafer 53. The package housing 51 has a receiving groove 510 ′. The substrate 52 is disposed at the bottom of the receiving groove 510. The wafer 53 has one side of the electrode joined to the substrate 52 by a bonding layer 54. The bonding layer 54 may be a bonding material such as a metal bump (e.g., gold bump) or a solder bump (Solder Bump). The electrode of the wafer 53 is bonded to the substrate 52 by the bonding layer 54, and the light emitting surface 530 of the wafer 53 is positioned above the substrate 52, so that the electrode of the wafer 53 can be prevented from shielding the light surface 530 to increase the light extraction rate. In addition, the flip-chip light-emitting diode body 50 also has high heat dissipation efficiency and a small package volume. However, the bonding of the bonding layer 54 to the substrate 52 and the electrodes of the wafer 53 is not strong enough. The wafer 53 is easily displaced relative to the substrate 52, resulting in poor electrical connection between the wafer 53 and the substrate 52. Further, in the manufacturing process of the flip-chip type light-emitting diode 50, the bonding layer 54 is displaced between the substrate 52 and the wafer 53, causing a poor bonding yield. Therefore, it is necessary to provide a light-emitting diode in which a wafer and a substrate are firmly bonded by a bonding layer and a method of manufacturing the same. 201006000 SUMMARY OF THE INVENTION Hereinafter, a light-emitting diode in which a wafer and a substrate are firmly bonded by a bonding layer and a method of manufacturing the same will be described by way of embodiments. A light-emitting diode comprising: a substrate; a light-emitting diode wafer 'which is flip-chip bonded to the substrate; and a bonding layer disposed between the substrate and the S-light emitting diode chip for bonding The substrate and the light emitting diode chip are electrically connected to each other. The surface of the substrate that is bonded to the light-emitting diode wafer has at least one recess disposed in at least one of the recesses. A method for manufacturing a light emitting diode, comprising: providing a light emitting diode chip and a substrate having at least one groove; providing a first bonding layer and bonding the same to the light emitting diode chip; a bonding layer disposed in at least one recess of the substrate; pressing the LED wafer toward the substrate to contact the first bonding layer with the second bonding layer; heating the first bonding layer And the second bonding layer until the two are integrated. The surface of the substrate in which the light-emitting diode and the manufacturing method thereof are bonded to the light-emitting diode wafer has at least one groove, and the bonding layer is disposed in the at least one groove, and the light-emitting diode The polar body wafer is flip-chip bonded to the substrate by the U layer, so that the light-emitting body is bonded to the substrate by the bonding layer, and the bonding layer is less likely to be displaced, thereby ensuring the LED substrate and the substrate. Has a good electrical connection performance. [Embodiment] The present invention will be further described in detail with reference to the accompanying drawings. Referring to FIG. 2, a light-emitting diode 201006000 according to a first embodiment of the present invention includes a package housing 11, a substrate 12, a light-emitting diode wafer i3, a bonding layer 14, and an encapsulation layer 15. The package housing 11 has a receiving groove 110. The material used for the package housing 11 is an insulating material such as liquid crystal polymer, plastic, or the like. The substrate 12 is disposed at the bottom of the accommodating groove 110 for carrying the light emitting diode chip 13. The substrate 12 is connected to an external power source (not shown) such that the external power source conducts a drive current to the LED chip 13 via the substrate 12. The substrate ❹12 is a lead frame, and the material used is a highly conductive material such as metal such as gold, silver or copper. The surface 121 of the substrate 12 exposed to the bottom of the accommodating groove 110 has a first groove 122 and a second groove 123 arranged in parallel with the first groove 122. The first groove 122 and the second groove 123 are both a cubic groove. It can be understood that the first groove 122 and the second groove 123 may also be grooves of other shapes such as hemispherical grooves or the like. The light-emitting diode chip 13 is a semiconductor light-emitting element, which may be gallium nitride (GaN), aluminum indium gallium nitride (AlInGaN), gallium arsenide (GaAs), gallium arsenide (GaP), aluminum indium phosphide. A light-emitting diode wafer such as gallium (AlInGaP). The driving current flows through the light-emitting diode chip 13 to emit light of a specific wavelength. Taking a gallium nitride light-emitting diode wafer as an example, it includes a sapphire layer (SaPPhire), a gallium nitride transition layer (Buffer), an N-type gallium nitride layer, and a multiple quantum well (Multiple Quantum Well (MQW) light-emitting layer' P a gallium nitride layer, a first electrode layer and a second electrode layer. In the present embodiment, the LED chip 13 is a gallium nitride light-emitting diode chip disposed in the accommodating groove 110 and bonded to the substrate 12, that is, the first electrode of the LED chip 13. The 131 and the second electric 201006000 pole 132 are located on the same side of the LED chip 13 and are joined to the substrate 12 by the bonding layer 14. The bonding layer 14 is disposed between the substrate 12 and the LED wafer 13 for bonding the substrate 12 and the LED wafer 13 and electrically conducting the two. The bonding layer 14 is a metal block (such as a gold nugget) or a solder bump (a tin block). According to the material of the substrate 12 and the processing conditions of the light-emitting diode, different tin block types can be selected, for example, a high melting point of 95% lead-5% tin alloy, or a low melting point of 51% indium-32.5% 铋-16.5% tin. Alloy, 63% lead -37% tin alloy, 50% lead -50% indium alloy. In the present embodiment, the bonding layer 14 includes a first solder bump 141 and a second solder bump 142, both of which are 51% indium - 32.5% 铋 - 16.5% tin alloy. The first solder bump 141 is partially embedded in the first recess 122 of the substrate 12 and connected to the first electrode 131 of the LED chip 13. The second solder bump 142 is partially embedded in the second recess 123 of the substrate 12 and The second electrodes 132 of the LED chips 13 are connected. Since the first solder bumps 141 and the second solder bumps 142 included in the bonding layer 14 are respectively disposed in the first recess 122 and the second recess _ 123, the LEDs 13 and the substrate 12 are bonded to each other by the bonding layer 14 . The bonding is relatively stable, and the bonding layer 14 is less likely to be displaced, which ensures that the LED chip 13 and the substrate 12 have better electrical connection properties. Here, the cross-sectional area of the bonding layer 14 parallel to the surface 121 of the substrate 12 is smaller than the cross-sectional area of the first recess 122 and the second recess 123 parallel to the surface 121 of the substrate 12, that is, the first solder bump 141, The cross-sectional area of the second solder bump 142 parallel to the surface 121 of the substrate 12 is smaller than the cross-sectional area of the surface 121 of the first recess 122 and the second recess 123 parallel to the substrate 12, respectively. The encapsulation layer 15 is disposed in the accommodating groove 110 to cover the illuminating diode chip 201006000 13 . The encapsulation layer 15 may be a transparent colloid such as silicone. The light emitting diode 10 may further include a light wavelength converting substance 16, such as a phosphor powder. The light wavelength converting substance 16 is doped in the encapsulating layer 15 for color-converting the specific wavelength emitted from the light-emitting diode chip 13, so that the light-emitting diode 10 emits white light or polychromatic light. Referring to FIG. 3, a light-emitting diode 20 according to a second embodiment of the present invention is substantially the same as the light-emitting diode 10 provided in the first embodiment, except that the substrate 22 includes an insulating layer 221 and a The conductive layer 222 is disposed on the insulating layer 22121. The conductive layer 222 is located on one side adjacent to the light emitting diode chip 13. The LED wafer 13 is electrically connected to the bonding layer 14 and the conductive layer 222. The material used for the insulating layer 221 may be ceramic, tantalum, aluminum nitride, boron nitride or tantalum carbide. The material used for the conductive layer 222 may be gold, silver, copper or the like. It can be understood that the substrate 22 can also be a metal core circuit board (MCPCB) or an IS substrate (Aluminum Substrate). Referring to FIG. 4, a light-emitting diode 30 according to a third embodiment of the present invention is substantially the same as the light-emitting diode 10 provided in the first embodiment, except that the light-emitting diode 30 further includes Adhesive layer 35. Then, the adhesive layer 35 is disposed between the light-emitting diode wafer 13 and the substrate 12 except for the bonding of the bonding layer 14 , so that the light-emitting diode wafer 13 is electrically connected to the substrate 12 through the bonding layer 14 . It is not electrically connected to the substrate 12 to avoid damage to the LED chip 13 due to short circuit or electrode breakdown. The adhesive layer 35 can also be used to improve the stability of the bonding process of the LED 13 and the substrate 12 to improve the yield of the bonding process. Then, the adhesive layer 35 is a flexible gel insulating material, such as polymer insulation 11 201006000 glue, flux, non-conductive solid crystal glue, and the like. Referring to FIG. 5, a light-emitting diode 40 according to a fourth embodiment of the present invention is substantially the same as the light-emitting diode 20 provided in the second embodiment, except that the light-emitting diode 40 further includes a glue. Layer 35. Next, the adhesive layer 35 is disposed between the light-emitting diode wafer 13 and the conductive layer 222 of the substrate 22 except for the bonding by the bonding layer 14. Referring to FIG. 6 to FIG. 12, a manufacturing method of a light-emitting diode 30 according to a fifth embodiment of the present invention includes the following steps: As shown in FIG. 6, a light-emitting diode chip 13 and a bonding layer 17 are provided. The bonding layer 17 includes a first solder bump 171 and a second solder bump 172. One end of the first solder bump 171 is hemispherical, and one end of the second solder bump 172 is tapered. The bonding layer 17 is formed mainly by evaporation, deposition, solder printing, plating, or the like. As shown in FIG. 7, the bonding layer 17 is bonded to the LED wafer 13. Here, one end of the first solder bump 171 opposite to the hemispherical end portion is bonded to the first electrode 131 of the light emitting diode chip 13, and the opposite end of the second solder bump 172 opposite to the tapered end portion thereof is illuminated. The second electrode 132 of the polar body wafer 13 is joined. As shown in Fig. 8, a substrate 12 is provided, and one surface of the substrate 12 has a first recess 122 and a second recess 123. The cross-sectional areas of the first recess 122 and the second recess 123 parallel to the surface 121 of the substrate 12 are larger than the cross-sectional areas of the first solder bump 171 and the second solder bump 172, respectively. As shown in FIG. 9, the bonding substance is placed into the first recess 122 and the second recess 123 of the substrate 12 to form the bonding layer 18. The bonding layer 18 is the same material as the bonding layer 12 201006000 17 . The cross-sectional areas of the first recess 122 and the second recess 123 parallel to the surface 121 of the base plate 12 are respectively larger than the cross-sectional areas of the first solder bump 171 and the second solder bump 172, which is advantageous for the bonding layer 17 Engaged with the bonding layer 18. As shown in FIG. 10, a bonding layer 35 is disposed on the surface of the substrate 12 to cover the first recess 122, the second recess 123, and the bonding layer 18. The formation of the adhesive layer 35 can be followed by printing, coating, dispensing, and the like. As shown in Fig. 11, the light-emitting diode chip 13 and the bonding layer 10 connected thereto are pressed down to the bonding layer 18 on the substrate 12. Here, the hemispherical end portion of the first solder bump 171 is pressed into the bonding layer 18 in the first recess 122, and the tapered end portion of the second solder bump 172 is pressed into the bonding layer 18 in the second recess 123. Since the bonding layer 17 and the bonding layer 18 are a hard material, the hardness of the bonding layer 17 and the bonding layer 18 is larger than that of the bonding layer 35 composed of the flexible colloid material. Therefore, during the depression process of the LED chip 13 and the bonding layer 17 connected thereto, The adhesive layer 35 is then routed around so that the bonding layer 17 is in direct contact with the bonding layer 18. The first solder _block 171 and the second solder bump 172 have hemispherical ends and tapered ends, respectively, to facilitate bonding of the bonding layer 17 to the bonding layer 18. As shown in Fig. 12, the bonding layer 17 and the bonding layer 18 are melted by temperature control so that the bonding layer 17 is inserted inside the bonding layer 18 to be integrated to bond the LED wafer 13 and the substrate 12. At this time, the adhesive layer 35 is then distributed between the light-emitting diode wafer 13 and the substrate 12 except for the gap between the bonding layer 17 and the bonding layer 18. Then, the adhesive layer 35 can prevent the sliding layer from being displaced between the bonding layer 17 and the bonding layer 18 due to the external force, and avoiding the inaccuracy of the bonding layer 17 and the bonding layer 18 to reduce the yield of 13 201006000. In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the present invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view of a conventional flip-chip light-emitting diode. Fig. 2 is a cross-sectional view showing a light-emitting diode according to a first embodiment of the present invention. Fig. 3 is a cross-sectional view showing a light-emitting diode according to a second embodiment of the present invention. Fig. 4 is a cross-sectional view showing a light-emitting diode according to a third embodiment of the present invention. Fig. 5 is a cross-sectional view showing a light-emitting diode according to a fourth embodiment of the present invention. Figure 12 is a flow chart showing a method of manufacturing a light-emitting diode according to a fifth embodiment of the present invention. [Description of main component symbols] Light-emitting diodes 50, 10, 20, 30, 40 Package housings 51, 11 Substrate receiving groove bonding layers 52, 12, 22 510, 110 54, 14, 17, 18 201006000 Light-emitting surface 530 LED Diode Wafer 13 > 53 Encapsulation Layer 15 Surface 121 First Groove 122 Second Groove 123 First Electrode 131 Second Electrode 132 First Solder Block 141, 171 Second Solder Block 142, 172 Light Wavelength Conversion Substance 16 insulating layer 221 conductive layer 222 followed by glue layer 35