JP4507358B2 - Optical semiconductor device - Google Patents

Optical semiconductor device Download PDF

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JP4507358B2
JP4507358B2 JP2000181770A JP2000181770A JP4507358B2 JP 4507358 B2 JP4507358 B2 JP 4507358B2 JP 2000181770 A JP2000181770 A JP 2000181770A JP 2000181770 A JP2000181770 A JP 2000181770A JP 4507358 B2 JP4507358 B2 JP 4507358B2
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electrode
positive electrode
light emitting
emitting element
optical semiconductor
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JP2001358371A (en
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広昭 為本
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Nichia Corp
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Nichia Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

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Description

【０００１】
【発明の属する技術分野】
本発明は発光素子チップがフリップチップ接合されてなる光半導体素子に関する。
【０００２】
【従来の技術】
近年、窒化物化合物半導体を用いた青色系の発光が可能なＬＥＤ素子を備えた発光素子が注目されている。このＬＥＤチップは、サファイヤ基板上にｎ型窒化物半導体層を成長させ、そのｎ型窒化物半導体層上に直接又は発光層を介してｐ型窒化物半導体層を成長させることにより構成される。このように窒化物半導体層を用いたＬＥＤチップは、絶縁体であるサファイア基板を用いて構成されているので、導電性の半導体基板を用いて構成される他の発光素子とは異なり、正電極及び負電極が同一面側の半導体層上に形成される。すなわち、ｐ側の正電極はｐ型窒化物半導体層上に形成され、ｎ側の負電極は、所定の位置で、ｐ型窒化窒化物半導体層（発光層を備えたものでは発光層も含む）をエッチングにより除去してｎ型窒化物半導体層の上面を露出させて形成される。
【０００３】
また、上述の窒化物半導体を用いたＬＥＤチップでは、ｐ型窒化物半導体層の抵抗値が比較的高いことから、ｐ側電極はｐ型窒化物半導体層を実質的に覆うようにオーミック電極を形成し、そのオーミック電極の表面の一部にｐパッド電極を形成することにより構成される。
【０００４】
以上のように構成された窒化物半導体を用いたＬＥＤチップは、ｎ側電極とｐパッド電極の上にマイクロバンプを形成してそのマイクロバンプを用いて、例えばパッケージの電極に接合されることにより実装される。
尚、このＬＥＤチップでは、マイクロバンプが形成されるｎ側電極とｐパッド電極の上を除いて、ｐとｎの電極間及び電極と半導体層間の短絡を防止するために絶縁膜が形成されている。
【０００５】
【発明が解決しようとする課題】
しかしながら、窒化物半導体を用いたＬＥＤチップは、近年ますます高出力化が図られそれに伴い活性層及びその近傍における動作時の発熱量が増加してきているために、実装された後の放熱特性を良好にできる構造が求められているが、十分な放熱特性が得られる構造はまだなかった。
【０００６】
そこで、本発明は、ＬＥＤチップがフリップチップボンディングされてなり、十分な放熱特性を有する光半導体素子を提供することを目的とする。
【０００７】
【課題を解決するための手段】
以上の目的を達成するために、本発明に係る光半導体素子は、基板上に、一部にｎ電極が形成されたｎ型窒化ガリウム系半導体層と、上記ｎ電極が形成された一部を除く上記ｎ型窒化ガリウム系半導体層上に上記ｎ電極とは離れて、発光層を介して形成されたｐ型窒化ガリウム系半導体層と、上記ｐ型窒化ガリウム系半導体層上に上記発光層全体に電流を注入するように形成されたｐ電極と、そのｐ電極の一部に形成されたｐパッド電極とを有する発光素子チップと、正電極及び負電極を有する基材とを備え、上記基材の正電極と上記発光素子チップのｐパッド電極とが互いに導電性接合部材によって接合されかつ上記基材の負電極と上記発光素子チップのｎ電極とが互いに導電性接合部材によって接合されてなり、上記正電極と上記負電極の上にそれぞれ接続された外部接続電極を有する光半導体素子であって、
上記発光素子チップのｐ電極側の放熱が上記ｎ電極側の放熱に比較して大きくなるように、上記正電極上のｐパッド電極が接続される位置と上記正電極上の外部接続電極が接続される位置との間の熱抵抗を上記負電極上のｎ電極が接続される位置と上記負電極上の外部接続電極が接続される位置との間の熱抵抗より小さくしたことを特徴とする。
この本発明に係る光半導体素子では、発光層で発生した熱を効率よく放出でき、光半導体素子の放熱特性を良好にできる。
【０００８】
また、本発明に係る光半導体素子は、上記発光素子チップのｐ電極と上記基材の正電極とは上記絶縁膜を介して対向し、上記ｐ電極上の絶縁膜と上記正電極の間に上記導電性接合部材が充填されるようにしてもよい。
この光半導体素子では、絶縁膜及び接合部材を介して正電極に伝達することができるので、放熱特性を良好にできる。
【０００９】
本発明に係る光半導体素子では、上記正電極上のｐパッド電極が接続される位置と、上記正電極上の外部接続電極が接続される位置との距離をＬａ、上記負電極上のｎ電極が接続される位置と、上記負電極上の外部接続電極が接続される位置との間の距離をＬｃ、１つの発光素子チップに対応する正電極の幅をＷａ、１つの発光素子チップに対応して設けられた負電極の幅をＷｃとしたとき、Ｌａ／ＷａがＬｃ／Ｗｃより小さくしてもよい。
【００１０】
本発明に係る光半導体素子では、上記発光素子チップを２以上備えている場合、その発光素子チップにそれぞれ対応して設けられた正電極を互いに連結して一体で形成するようにしてもよい。
【００１１】
また、本発明に係る光半導体素子では、上記発光素子チップにおいて上記ｎ電極と上記ｐパッド電極とをそれぞれ上記基板の端部に形成することが好ましい。
【００１２】
【発明の実施の形態】
以下、図面を参照しながら本発明に係る実施の形態の光半導体素子について説明する。
実施の形態１．
本発明に係る実施の形態１の光半導体素子は、パッケージ１の凹部１５に発光素子チップ２がフリップチップボンディングされ、その発光素子チップ２が凹部１５内において透光性樹脂４で封止されてなるチップ型の光半導体素子であって、後述するようにして発光素子チップ２の活性層で発生する熱の放熱特性を良好にしたことを特徴としている。
【００１３】
詳細に説明すると、本実施の形態１において、発光素子チップ２は、例えば、サファイア基板等からなる透光性の基板２１上に、その一部にｎ電極２４が形成されたｎ型窒化ガリウム系半導体層２２が形成され、その上に順次以下の各層が形成されてなる。
すなわち、例えばＰｔからなるｎ電極２４が形成された部分とその周辺を除くｎ型窒化ガリウム系半導体層２２上にｎ電極２４と電気的に分離された、ｐ型窒化ガリウム系半導体層２３が形成される。
そして、そのｐ型窒化ガリウム系半導体層２３上のほぼ全面に発光層全体に電流を注入するための電流拡散電極であるｐオーミック電極２５が形成され、そのｐオーミック電極２５上の一部に例えばＰｔからなるｐパッド電極２６が形成される。尚、ｐオーミック電極は例えばＡｕ又は白金などにより形成することができる。
さらに、ｎ電極２４上（外部の電極と接続するための部分）と、ｐパッド電極２６上とを除いて、発光素子チップ２の上面全体を覆うように、例えばＳｉＯ2あるいはポリイミド又はそれらが積層された層などからなる絶縁保護膜２７が形成される。
尚、図１に示すように、ｎ電極２４の上面とｐパッド電極２６の上面の周辺部は絶縁保護膜２７によって覆われていることが好ましい。
【００１４】
また、パッケージ１は、例えばガラスエポキシ積層板などからなり、正電極１２及び負電極１３が設けられた基材１１とパッケージ１の凹部１５を形成するための外枠１４とからなる。ここで、外枠１４は例えば基材１１と同様の材料からなる。尚、本発明において、外枠１４により光利用効率を高めることができるが、薄型化を目的として外枠を省略してもよい。また、本実施の形態１のパッケージ１において、正電極１２と負電極１３は、発光素子チップ２を正電極１２及び負電極１３上に載置した時にｐパット電極２６が形成されていない部分のｐオーミック電極と正電極１２とが対向するように近接させて形成する。
【００１５】
以上のように構成されたパッケージ１の凹部１５において、基材１１に形成された正電極１２と発光素子チップ２のｐパッド電極２６とを対向させ、負電極１３とｎ電極２４とを対向させて互いに接合部材３により接合するフリップチップボンディングにより発光素子チップ２を固定し、透光性樹脂４で封止する。
ここで、接合部材３は、はんだ、金又は錫等の金属あるいは銀、金、パラジウム、銅、ニッケル等の金属微粒子を含んだ樹脂からなる部材等の種種の導電性接合部材を用いることができる。また、本明細書において、はんだとは融点が３００℃以下の接合用に用いられる金属の総称として用いている。
また、透光性樹脂４として、エポキシ、シリコーン、変性アクリル、不飽和ポリエステル、ポリイミド、非晶質ポリアミド等の樹脂を用いることができる。
【００１６】
ここで、特に本実施の形態１では、上述のように、パッケージ１の正電極１２と負電極１３を、発光素子チップ２のｐオーミック電極２５とｎ電極２４の間隔と略等しい間隔になるように形成し、図１に示すように、ｐオーミック電極２５におけるｐパッド電極２６が形成されていない部分が正電極１２とが対向し、その対向する部分に接合部材３が充填されるように構成している。
すなわち、本実施の形態１では、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分が絶縁保護膜２７で覆われ、その絶縁保護膜２７と正電極１２の間に接合部材３を設けることにより、発光層で発生した熱がｐパッド電極２６を経由することなく、直接、絶縁保護膜２７及び接合部材３を介して正電極１２に伝達されるようにしたものである。
このように、本実施の形態１では、接合部材３によりｐパッド電極２６と正電極１２とを導通させる（導通領域３ｂ）とともに、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分と正電極１２の間に接合部材３を設けることにより熱伝導領域３ａを形成して放熱特性を向上させている。
また、本発明では、接合部材３を介して放熱効果を高くするために、ｐオーミック電極２５の２／３以上（面積比）を接合部材３で覆うことが好ましい。
また、発光素子チップ２において、発光層が最も発熱の大きい部分であるため、図３に示すように、側面においても絶縁膜２７を介して発光層を覆い隠すように接合部材３を設け、熱伝導領域３ｃを形成することがさらに好ましい。
【００１７】
以下、本実施の形態１のボンディング方法について説明する。
本方法は、粒径が５〜２５μｍ程度のはんだ金属粒子とフラックスの混合物であるクリームはんだを、スタンピングあるいはディスペンス等を用いて、発光素子チップ２より概略１０％程度大きな径で厚さ（高さ）１０μｍ〜３０μｍ程度の大きさに正電極１２及び負電極１３にまたがるように供給することにより、はんだドットを形成する。
【００１８】
次に、そのはんだドットの上に発光素子チップ２を適当な力で押圧しながら搭載する。
そして、加熱することにより、はんだを溶融させる。この時、正電極１２及び負電極１３にまたがって形成されていたクリームはんだは、溶融することで正電極１２及び負電極１３上に分かれ、正負の電極間を短絡させることなく発光素子チップ２を接合固定する。ここで、本実施の形態１では、はんだドットを形成するクリームはんだの量を通常のフリップチップボンディングの場合に比較して多く設定することにより、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分に形成された絶縁保護膜２７と正電極１２の間にはんだが形成される。これにより、発光層で発生した熱がｐパッド電極２６を経由することなく、直接、絶縁保護膜２７及び接合部材（はんだ）３を介して正電極１２に伝達されるようにできる。
【００１９】
以上のように構成された本発明に係る実施の形態１の光半導体素子は、上述のように、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分に形成された絶縁保護膜２７と正電極１２の間にはんだが形成されるように構成している。
本実施の形態１の光半導体素子においては、発光層で発生した熱がｐパッド電極２６を経由して正電極１２に伝達される伝達経路に加え、直接、絶縁保護膜２７及びはんだ３を介して正電極１２に伝達される伝達経路が構成されるので、発光素子チップ２において発生する熱を効率よく正電極１２に伝達させることができ、正電極１２を介して効果的に放熱することができる。
【００２０】
以上の実施の形態１の光半導体素子では、上述のように、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分を正電極１２に対向させてその対向するｐオーミック電極２６と正電極１２との間に絶縁保護膜２７を介して接合部材３を形成するようにしたが、本発明はこれに限られるものではなく、図４に示すように構成してもよい。
すなわち、図４では、ｐオーミック電極２５のうちのｐパッド電極２６が形成されていない部分を負電極１３に対向させてその対向するｐオーミック電極２６と負電極１３との間に絶縁保護膜２７を介して接合部材３を形成するようにしている。このようにしても、実施の形態１と同様の作用効果が得られる。
【００２１】
実施の形態２．
本発明に係る実施の形態２の光半導体素子は、正電極１１２及び負電極１１３を備えた基材１１１上に発光素子チップ２を設けた光半導体素子であって、詳細後述するようにして、発光素子チップ２の発光層で発生する熱が主として伝達される正電極１１２の熱抵抗を負電極１１３の熱抵抗に比較して小さくしたことを特徴としている。
ここで、実施の形態２の発光素子チップ２は、図６に示すように、実施の形態１の発光素子チップと同様に構成される。
【００２２】
具体的には、図５に示すように、本実施の形態２の光半導体素子において、発光素子チップ２のｐパッド電極２６が接続される正電極１１２を以下のようにして、正電極１１２の熱抵抗を負電極１１３の熱抵抗に比較して小さくしている。
（１）第１に、正電極１１２上のｐパッド電極２６が接続される位置と、正電極上の外部接続電極１１５が接続される位置との間の距離Ｌａを、負電極１１３上のｎ電極２４が接続される位置と、負電極１１３上の外部接続電極１１６が接続される位置との間の距離Ｌｃより小さくしている。
このようにして、正電極１１２上で熱が伝達される距離を短くして、熱抵抗を小さくしている。
（２）第２に、複数ある発光素子チップ２の各ｐパッド電極２６と接続される正電極を一体で形成することにより、１つの発光素子チップ２に対応する正電極の幅Ｗａを、１つの発光素子チップ２に対応して設けられた負電極１１３の幅Ｗｃに比較して広くなるように形成している。
すなわち、本実施の形態２の光半導体素子においては、正電極１１２の熱の伝達方向の長さを短くしてかつ熱の伝達方向に直交方向の幅を広くすることにより正電極１１２の熱抵抗を負電極１１３の熱抵抗より小さくしている。
【００２３】
ここで、本実施の形態において、基材１１１は例えばガラスエポキシ積層板よりなる基板であり、正負の電極１１２，１１３は、銅、ニッケルまたはその積層物等で構成することができ、その上にさらに、メッキ、スパッタリングまたはＣＶＤ等を用いて形成された金、銀、銅、パラジウム、はんだ等の金属薄膜を形成するようにしてもよい。
また、外部接続電極１１５，１１６としては、例えば、ハーネス、プリント基板若しくはフレキシブル基板等に形成された電極などの種々のものが挙げられ、正負の電極１１２，１１３とははんだ付け、抵抗溶接、異方性導電性接着剤等を用いて接続することができる。
【００２４】
以上の実施の形態２の光半導体素子において、発光素子チップ２を発光させた時に、ｎ型窒化ガリウム系半導体層２２とｐ型窒化ガリウム系半導体層２３の間の発光層で発生された熱は、主としてｐパッド電極２６を介して正電極１１２に伝達され、その正電極１１２及び外部接続電極１１５で放熱される。
ここで、特に、本実施の形態２の光半導体素子では、正電極１１２の熱抵抗を小さくしているので、放熱特性を良好にできる。
【００２５】
以上の実施の形態２では、正電極１１２の熱伝達距離Ｌａを負電極１１３の熱伝達距離Ｌｃより短くし、かつ正電極１１２の幅Ｗａを負電極１１３の幅Ｗｃより広くしたが、本発明はこれに限られるものではなく、以下のようにしてもよい。
すなわち、正電極１１３の熱抵抗はＬａ／Ｗａに比例するので、Ｌａ／Ｗａを負電極１１２のＬｃ／Ｗｃに設定して正電極１１２の熱抵抗が負電極１１３の熱抵抗より小さくなるようにすればよい。
また、本実施の形態２では、発光素子チップ２が３つの場合について説明したが、本発明はこれに限られるものではなく、３以上であっても良いし、１または２であってもよい。
【００２６】
【発明の効果】
以上詳細に説明したように、本発明に係る光半導体素子によれば、放熱特性の良好な光半導体素子を提供することができる。
【図面の簡単な説明】
【図１】 本発明に係る実施の形態１の光半導体素子の断面図である。
【図２】 実施の形態１の光半導体素子の平面図である。
【図３】 図２のＡ−Ａ’線についての断面図である。
【図４】 本発明に係る実施の形態１の変形例の光半導体素子の断面図である。
【図５】 本発明に係る実施の形態２の光半導体素子の平面図である。
【図６】 図５のＢ−Ｂ’線についての断面図である。
【符号の説明】
１…パッケージ、
２…発光素子チップ、
３…接合部材、
４…透光性樹脂、
１１，１１１…基材、
１２，１１２…正電極、
１３，１１３…負電極、
１４…外枠、
１５…凹部
２１…基板、
２２…ｎ型窒化ガリウム系半導体層、
２３…ｐ型窒化ガリウム系半導体層、
２４…ｎ電極、
２５…ｐオーミック電極、
２６…ｐパッド電極、
２７…絶縁保護膜、
１１５，１１６…外部接続電極。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an optical semiconductor element in which a light emitting element chip is flip-chip bonded.
[0002]
[Prior art]
2. Description of the Related Art In recent years, attention has been focused on light-emitting elements including LED elements that can emit blue light using a nitride compound semiconductor. This LED chip is configured by growing an n-type nitride semiconductor layer on a sapphire substrate and growing a p-type nitride semiconductor layer on the n-type nitride semiconductor layer directly or through a light emitting layer. Thus, since the LED chip using the nitride semiconductor layer is configured using a sapphire substrate that is an insulator, unlike other light-emitting elements configured using a conductive semiconductor substrate, the positive electrode And the negative electrode is formed on the same semiconductor layer. That is, the p-side positive electrode is formed on the p-type nitride semiconductor layer, and the n-side negative electrode is formed at a predetermined position at the p-type nitride nitride semiconductor layer (including the light-emitting layer in the case where the light-emitting layer is provided). ) Is removed by etching to expose the upper surface of the n-type nitride semiconductor layer.
[0003]
Further, in the LED chip using the nitride semiconductor described above, since the resistance value of the p-type nitride semiconductor layer is relatively high, the p-side electrode is an ohmic electrode so as to substantially cover the p-type nitride semiconductor layer. The p-pad electrode is formed on a part of the surface of the ohmic electrode.
[0004]
An LED chip using a nitride semiconductor configured as described above is formed by forming a microbump on the n-side electrode and the p-pad electrode and then bonding the microbump to the electrode of the package, for example. Implemented.
In this LED chip, an insulating film is formed to prevent a short circuit between the p and n electrodes and between the electrode and the semiconductor layer, except on the n-side electrode and the p pad electrode where the micro bumps are formed. Yes.
[0005]
[Problems to be solved by the invention]
However, LED chips using nitride semiconductors have been increasing in output in recent years, and the amount of heat generated during operation in the active layer and its vicinity has increased accordingly. There is a demand for a structure that can be improved, but there has not yet been a structure that can provide sufficient heat dissipation characteristics.
[0006]
Accordingly, an object of the present invention is to provide an optical semiconductor element having a sufficient heat dissipation characteristic, in which an LED chip is flip-chip bonded.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, an optical semiconductor device according to the present invention includes an n-type gallium nitride based semiconductor layer in which an n electrode is partially formed on a substrate, and a portion in which the n electrode is formed. A p-type gallium nitride-based semiconductor layer formed on the n-type gallium nitride-based semiconductor layer excluding the n-electrode and via a light-emitting layer, and the entire light-emitting layer on the p-type gallium nitride-based semiconductor layer includes a p electrode formed so as to inject a current, a light emitting element chip and a p-pad electrode formed on a part of the p-electrode, and a substrate having a positive electrode and a negative electrode, the upper Symbol The positive electrode of the substrate and the p-pad electrode of the light emitting element chip are bonded to each other by a conductive bonding member, and the negative electrode of the substrate and the n electrode of the light emitting element chip are bonded to each other by a conductive bonding member. Do Ri, the positive electrode and the negative electrode An optical semiconductor device that have a respective connected external connection electrodes on,
The position where the p pad electrode on the positive electrode is connected and the external connection electrode on the positive electrode are connected so that the heat radiation on the p electrode side of the light emitting element chip is larger than the heat radiation on the n electrode side. The thermal resistance between the n electrode on the negative electrode and the position where the external connection electrode on the negative electrode is connected is smaller than the thermal resistance between the n electrode on the negative electrode and the external electrode .
In the optical semiconductor element according to the present invention, the heat generated in the light emitting layer can be efficiently released, and the heat dissipation characteristics of the optical semiconductor element can be improved.
[0008]
In the optical semiconductor device according to the present invention, the p-electrode of the light-emitting element chip and the positive electrode of the base material face each other through the insulating film, and the insulating film on the p-electrode is interposed between the positive electrode and the positive electrode. The conductive bonding member may be filled.
In this optical semiconductor element, since it can transmit to a positive electrode through an insulating film and a joining member, a heat dissipation characteristic can be made favorable.
[0009]
In the optical semiconductor device according to the present invention, the position of p-pad electrode on the positive electrode is connected, the distance between the position where the external connection electrode on the positive electrode is connected La, n electrode on the negative electrode Lc is the distance between the position where the external connection electrode is connected and the position where the external connection electrode on the negative electrode is connected, Lc is the width of the positive electrode corresponding to one light emitting element chip, Wa is one corresponding to one light emitting element chip La / Wa may be smaller than Lc / Wc, where Wc is the width of the negative electrode provided.
[0010]
In the optical semiconductor element according to the present invention, when two or more light emitting element chips are provided, the positive electrodes provided corresponding to the light emitting element chips may be integrally connected to each other.
[0011]
In the optical semiconductor device according to the present invention, it is preferable that the n-electrode and the p-pad electrode are respectively formed at end portions of the substrate in the light-emitting device chip.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EMBODIMENTS Hereinafter, an optical semiconductor element according to an embodiment of the present invention will be described with reference to the drawings.
Embodiment 1 FIG.
In the optical semiconductor device according to the first embodiment of the present invention, the light-emitting element chip 2 is flip-chip bonded to the recess 15 of the package 1, and the light-emitting element chip 2 is sealed with the translucent resin 4 in the recess 15. The chip-type optical semiconductor device is characterized in that the heat radiation characteristic of the heat generated in the active layer of the light emitting device chip 2 is improved as will be described later.
[0013]
More specifically, in the first embodiment, the light-emitting element chip 2 is an n-type gallium nitride system in which an n-electrode 24 is formed on a light-transmitting substrate 21 made of, for example, a sapphire substrate. A semiconductor layer 22 is formed, and the following layers are sequentially formed thereon.
That is, for example, the p-type gallium nitride semiconductor layer 23 electrically isolated from the n-electrode 24 is formed on the n-type gallium nitride semiconductor layer 22 excluding the portion where the n-electrode 24 made of Pt is formed and its periphery. Is done.
Then, a p ohmic electrode 25 which is a current diffusion electrode for injecting a current into the entire light emitting layer is formed on almost the entire surface of the p-type gallium nitride based semiconductor layer 23. A p-pad electrode 26 made of Pt is formed. The p ohmic electrode can be formed of, for example, Au or platinum.
Further, for example, SiO 2, polyimide, or the like is laminated so as to cover the entire upper surface of the light emitting element chip 2 except on the n electrode 24 (portion for connecting to an external electrode) and the p pad electrode 26. An insulating protective film 27 made of the formed layer is formed.
As shown in FIG. 1, it is preferable that the periphery of the upper surface of the n electrode 24 and the upper surface of the p pad electrode 26 is covered with an insulating protective film 27.
[0014]
The package 1 is made of, for example, a glass epoxy laminate, and is made up of a base material 11 on which a positive electrode 12 and a negative electrode 13 are provided, and an outer frame 14 for forming a recess 15 of the package 1. Here, the outer frame 14 is made of the same material as that of the base material 11, for example. In the present invention, the light utilization efficiency can be increased by the outer frame 14, but the outer frame may be omitted for the purpose of thinning. In the package 1 of the first embodiment, the positive electrode 12 and the negative electrode 13 are portions of the portion where the p-pad electrode 26 is not formed when the light emitting element chip 2 is placed on the positive electrode 12 and the negative electrode 13. The p ohmic electrode and the positive electrode 12 are formed close to each other so as to face each other.
[0015]
In the recess 15 of the package 1 configured as described above, the positive electrode 12 formed on the substrate 11 and the p-pad electrode 26 of the light emitting element chip 2 are opposed to each other, and the negative electrode 13 and the n-electrode 24 are opposed to each other. Then, the light emitting element chip 2 is fixed by flip chip bonding which is bonded to each other by the bonding member 3, and sealed with a translucent resin 4.
Here, as the joining member 3, various conductive joining members such as a member made of a metal including solder, gold or tin, or a resin containing metal fine particles such as silver, gold, palladium, copper, or nickel can be used. . In the present specification, the term “solder” is used as a general term for metals used for bonding having a melting point of 300 ° C. or lower.
Further, as the translucent resin 4, resins such as epoxy, silicone, modified acrylic, unsaturated polyester, polyimide, amorphous polyamide can be used.
[0016]
Here, in particular, in the first embodiment, as described above, the positive electrode 12 and the negative electrode 13 of the package 1 are set to have an interval substantially equal to the interval between the p ohmic electrode 25 and the n electrode 24 of the light emitting element chip 2. As shown in FIG. 1, the portion of the p ohmic electrode 25 where the p pad electrode 26 is not formed is opposed to the positive electrode 12, and the facing member is filled with the bonding member 3. is doing.
That is, in the first embodiment, a portion of the p ohmic electrode 25 where the p pad electrode 26 is not formed is covered with the insulating protective film 27, and the bonding member 3 is interposed between the insulating protective film 27 and the positive electrode 12. The heat generated in the light emitting layer is directly transferred to the positive electrode 12 via the insulating protective film 27 and the bonding member 3 without passing through the p pad electrode 26.
As described above, in the first embodiment, the p-pad electrode 26 and the positive electrode 12 are conducted by the bonding member 3 (conduction region 3b), and the p-pad electrode 26 of the p-ohmic electrode 25 is not formed. By providing the bonding member 3 between the portion and the positive electrode 12, the heat conduction region 3a is formed to improve the heat dissipation characteristics.
In the present invention, it is preferable to cover 2/3 or more (area ratio) of the p ohmic electrode 25 with the bonding member 3 in order to increase the heat dissipation effect through the bonding member 3.
Further, in the light emitting element chip 2, since the light emitting layer is the portion that generates the most heat, the bonding member 3 is provided on the side surface so as to cover the light emitting layer through the insulating film 27 as shown in FIG. More preferably, the conductive region 3c is formed.
[0017]
Hereinafter, the bonding method of the first embodiment will be described.
In this method, a cream solder, which is a mixture of solder metal particles having a particle size of about 5 to 25 μm and a flux, is thicker (height) by a diameter approximately 10% larger than that of the light emitting element chip 2 by stamping or dispensing. ) Solder dots are formed by supplying a size of about 10 μm to 30 μm across the positive electrode 12 and the negative electrode 13.
[0018]
Next, the light emitting element chip 2 is mounted on the solder dots while being pressed with an appropriate force.
Then, the solder is melted by heating. At this time, the cream solder formed across the positive electrode 12 and the negative electrode 13 is melted to be separated on the positive electrode 12 and the negative electrode 13, and the light emitting element chip 2 is formed without short-circuiting between the positive and negative electrodes. Join and fix. Here, in the first embodiment, the p pad electrode 26 of the p ohmic electrode 25 is formed by setting a larger amount of cream solder for forming solder dots than in the case of normal flip chip bonding. Solder is formed between the insulating protective film 27 and the positive electrode 12 formed in the portion that is not formed. Thereby, the heat generated in the light emitting layer can be directly transmitted to the positive electrode 12 via the insulating protective film 27 and the bonding member (solder) 3 without passing through the p pad electrode 26.
[0019]
As described above, the optical semiconductor element according to the first embodiment of the present invention configured as described above is an insulating protective film formed in a portion of the p ohmic electrode 25 where the p pad electrode 26 is not formed. The solder is formed between the positive electrode 12 and the positive electrode 12.
In the optical semiconductor device according to the first embodiment, in addition to the transmission path through which the heat generated in the light emitting layer is transmitted to the positive electrode 12 via the p-pad electrode 26, it directly passes through the insulating protective film 27 and the solder 3. Since the transmission path transmitted to the positive electrode 12 is configured, the heat generated in the light emitting element chip 2 can be efficiently transmitted to the positive electrode 12 and can be effectively radiated through the positive electrode 12. it can.
[0020]
In the optical semiconductor device of the first embodiment described above, as described above, the portion of the p ohmic electrode 25 where the p pad electrode 26 is not formed is opposed to the positive electrode 12, and the opposing p ohmic electrode 26 Although the bonding member 3 is formed between the positive electrode 12 and the insulating protective film 27, the present invention is not limited to this and may be configured as shown in FIG.
That is, in FIG. 4, the portion of the p ohmic electrode 25 where the p pad electrode 26 is not formed is opposed to the negative electrode 13, and the insulating protective film 27 is interposed between the facing p ohmic electrode 26 and the negative electrode 13. The joining member 3 is formed via Even if it does in this way, the effect similar to Embodiment 1 is acquired.
[0021]
Embodiment 2. FIG.
The optical semiconductor element according to the second embodiment of the present invention is an optical semiconductor element in which the light emitting element chip 2 is provided on a base material 111 provided with a positive electrode 112 and a negative electrode 113, and will be described in detail later. The heat resistance of the positive electrode 112 to which heat generated in the light emitting layer of the light emitting element chip 2 is mainly transmitted is smaller than the heat resistance of the negative electrode 113.
Here, as shown in FIG. 6, the light emitting element chip 2 of the second embodiment is configured in the same manner as the light emitting element chip of the first embodiment.
[0022]
Specifically, as shown in FIG. 5, in the optical semiconductor element of the second embodiment, the positive electrode 112 to which the p-pad electrode 26 of the light-emitting element chip 2 is connected is changed as follows. The thermal resistance is made smaller than that of the negative electrode 113.
(1) First, the distance La between the position where the p pad electrode 26 on the positive electrode 112 is connected and the position where the external connection electrode 115 on the positive electrode is connected is expressed as n on the negative electrode 113. The distance Lc is smaller than the distance Lc between the position where the electrode 24 is connected and the position where the external connection electrode 116 on the negative electrode 113 is connected.
In this way, the heat transfer distance on the positive electrode 112 is shortened to reduce the thermal resistance.
(2) Second, the positive electrode width Wa corresponding to one light emitting element chip 2 is set to 1 by integrally forming the positive electrodes connected to the p pad electrodes 26 of the plurality of light emitting element chips 2. It is formed so as to be wider than the width Wc of the negative electrode 113 provided corresponding to one light emitting element chip 2.
That is, in the optical semiconductor device of the second embodiment, the thermal resistance of the positive electrode 112 is reduced by shortening the length of the positive electrode 112 in the heat transfer direction and increasing the width in the direction orthogonal to the heat transfer direction. Is smaller than the thermal resistance of the negative electrode 113.
[0023]
Here, in the present embodiment, the base material 111 is a substrate made of, for example, a glass epoxy laminate, and the positive and negative electrodes 112 and 113 can be made of copper, nickel, or a laminate thereof, and the like. Furthermore, a metal thin film such as gold, silver, copper, palladium, or solder formed by plating, sputtering, CVD, or the like may be formed.
Examples of the external connection electrodes 115 and 116 include various electrodes such as an electrode formed on a harness, a printed circuit board, a flexible circuit board, and the like, and the positive and negative electrodes 112 and 113 are different from those of the positive and negative electrodes 112 and 113. It is possible to connect using an isotropic conductive adhesive or the like.
[0024]
In the optical semiconductor device of the second embodiment, when the light emitting device chip 2 emits light, the heat generated in the light emitting layer between the n-type gallium nitride semiconductor layer 22 and the p-type gallium nitride semiconductor layer 23 is The heat is transmitted to the positive electrode 112 mainly through the p-pad electrode 26 and is radiated by the positive electrode 112 and the external connection electrode 115.
Here, in particular, in the optical semiconductor element of the second embodiment, the thermal resistance of the positive electrode 112 is reduced, so that the heat dissipation characteristics can be improved.
[0025]
In Embodiment 2 above, the heat transfer distance La of the positive electrode 112 is shorter than the heat transfer distance Lc of the negative electrode 113, and the width Wa of the positive electrode 112 is wider than the width Wc of the negative electrode 113. Is not limited to this, and may be as follows.
That is, since the thermal resistance of the positive electrode 113 is proportional to La / Wa, La / Wa is set to Lc / Wc of the negative electrode 112 so that the thermal resistance of the positive electrode 112 is smaller than the thermal resistance of the negative electrode 113. do it.
In the second embodiment, the case where there are three light emitting element chips 2 has been described. However, the present invention is not limited to this, and may be three or more, or may be one or two. .
[0026]
【The invention's effect】
As described above in detail, according to the optical semiconductor element of the present invention, an optical semiconductor element with good heat dissipation characteristics can be provided.
[Brief description of the drawings]
FIG. 1 is a sectional view of an optical semiconductor element according to a first embodiment of the present invention.
FIG. 2 is a plan view of the optical semiconductor element according to the first embodiment.
FIG. 3 is a cross-sectional view taken along the line AA ′ in FIG. 2;
FIG. 4 is a cross-sectional view of an optical semiconductor element according to a modification of the first embodiment of the present invention.
FIG. 5 is a plan view of the optical semiconductor element according to the second embodiment of the present invention.
6 is a cross-sectional view taken along line BB ′ of FIG.
[Explanation of symbols]
1 ... Package,
2 ... Light emitting element chip,
3 ... Joining member,
4 ... translucent resin,
11, 111 ... base material,
12, 112 ... positive electrode,
13, 113 ... negative electrode,
14 ... Outer frame,
15 ... recess 21 ... substrate,
22 ... n-type gallium nitride based semiconductor layer,
23 ... p-type gallium nitride based semiconductor layer,
24 ... n electrode,
25 ... p-ohmic electrode,
26 ... p pad electrode,
27. Insulating protective film,
115, 116 ... external connection electrodes.

Claims (5)

基板上に、一部にｎ電極が形成されたｎ型窒化ガリウム系半導体層と、上記ｎ電極が形成された一部を除く上記ｎ型窒化ガリウム系半導体層上に上記ｎ電極とは離れて、発光層を介して形成されたｐ型窒化ガリウム系半導体層と、上記ｐ型窒化ガリウム系半導体層上に上記発光層全体に電流を注入するように形成されたｐ電極と、そのｐ電極の一部に形成されたｐパッド電極とを有する発光素子チップと、
正電極及び負電極を有する基材とを備え、
上記基材の正電極と上記発光素子チップのｐパッド電極とが互いに導電性接合部材によって接合されかつ上記基材の負電極と上記発光素子チップのｎ電極とが互いに導電性接合部材によって接合されてなり、上記正電極と上記負電極の上にそれぞれ接続された外部接続電極を有する光半導体素子であって、
上記発光素子チップのｐ電極側の放熱が上記ｎ電極側の放熱に比較して大きくなるように、上記正電極上のｐパッド電極が接続される位置と上記正電極上の外部接続電極が接続される位置との間の熱抵抗を上記負電極上のｎ電極が接続される位置と上記負電極上の外部接続電極が接続される位置との間の熱抵抗より小さくしたことを特徴とする光半導体素子。An n-type gallium nitride-based semiconductor layer in which an n-electrode is partially formed on a substrate, and the n-type gallium nitride-based semiconductor layer excluding a portion in which the n-electrode is formed apart from the n-electrode A p-type gallium nitride-based semiconductor layer formed through the light-emitting layer, a p-electrode formed on the p-type gallium nitride-based semiconductor layer so as to inject current into the entire light-emitting layer, and the p-electrode A light emitting device chip having a p-pad electrode formed in part;
A substrate having a positive electrode and a negative electrode,
The positive electrode of the substrate and the p-pad electrode of the light emitting element chip are bonded to each other by a conductive bonding member, and the negative electrode of the substrate and the n electrode of the light emitting element chip are bonded to each other by a conductive bonding member. Do Te Ri, an optical semiconductor device that have a external connection electrodes connected respectively to the top of the positive electrode and the negative electrode,
The position where the p pad electrode on the positive electrode is connected and the external connection electrode on the positive electrode are connected so that the heat radiation on the p electrode side of the light emitting element chip is larger than the heat radiation on the n electrode side. an optical semiconductor, wherein a heat resistance was smaller than the thermal resistance between the positions where the external connection electrodes on the position and the negative electrode n electrode on the negative electrode is connected is connected between the positions element. 上記発光素子チップのｐ電極と上記基材の正電極とは上記絶縁膜を介して対向し、上記ｐ電極上の絶縁膜と上記正電極の間に上記導電性接合部材が充填されるようにした請求項１記載の光半導体素子。The p-electrode of the light-emitting element chip and the positive electrode of the base material are opposed to each other through the insulating film, and the conductive bonding member is filled between the insulating film on the p-electrode and the positive electrode. The optical semiconductor device according to claim 1. 上記正電極上のｐパッド電極が接続される位置と、上記正電極上の外部接続電極が接続される位置との距離をＬａ、The distance between the position where the p-pad electrode on the positive electrode is connected and the position where the external connection electrode on the positive electrode is connected is La,
上記負電極上のｎ電極が接続される位置と、上記負電極上の外部接続電極が接続される位置との間の距離をＬｃ、  The distance between the position where the n electrode on the negative electrode is connected and the position where the external connection electrode on the negative electrode is connected is Lc,
１つの発光素子チップに対応する正電極の幅をＷａ、１つの発光素子チップに対応して設けられた負電極の幅をＷｃとしたとき、  When the width of the positive electrode corresponding to one light emitting element chip is Wa, and the width of the negative electrode provided corresponding to one light emitting element chip is Wc,
Ｌａ／ＷａがＬｃ／Ｗｃより小さい請求項１又は２記載の光半導体素子。  The optical semiconductor element according to claim 1, wherein La / Wa is smaller than Lc / Wc. 上記光半導体素子は上記発光素子チップを２以上有してなり、各発光素子チップに対応して設けられた正電極を互いに一体で形成した請求項１〜３のうちのいずれか１つに記載の光半導体素子。The said optical semiconductor element has two or more of the said light emitting element chips | tips, The positive electrode provided corresponding to each light emitting element chip | tip was integrally formed mutually, The Claim 1 or Claim 1 characterized by the above-mentioned. Optical semiconductor element. 上記ｎ電極と上記ｐパッド電極とをそれぞれ上記基板の端部に形成した請求項１〜４のうちのいずれか１つに記載の光半導体素子。  The optical semiconductor element according to claim 1, wherein the n-electrode and the p-pad electrode are respectively formed at end portions of the substrate.
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JP4889193B2 (en) * 2003-07-23 2012-03-07 日亜化学工業株式会社 Nitride semiconductor light emitting device
KR100533635B1 (en) 2003-11-20 2005-12-06 삼성전기주식회사 Led package
CN100375300C (en) * 2003-11-25 2008-03-12 葛世潮 High power LED
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WO2010059013A2 (en) * 2008-11-24 2010-05-27 주식회사 케이엠더블유 Led package furnished with substrate of high heat radiation
CN102473806B (en) 2009-07-22 2014-09-10 松下电器产业株式会社 Light emitting diode
KR101194844B1 (en) * 2010-11-15 2012-10-25 삼성전자주식회사 light emitting diode device and method of manufacturing the same
JP2015195244A (en) * 2014-03-31 2015-11-05 ソニー株式会社 Semiconductor unit, semiconductor element, light emitting device, display device and semiconductor element manufacturing method
CN111129265B (en) 2017-12-22 2023-06-02 首尔伟傲世有限公司 Light emitting diode
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223846A (en) * 1996-02-16 1997-08-26 Nichia Chem Ind Ltd Nitride semiconductor laser device
JPH1197742A (en) * 1997-09-22 1999-04-09 Nichia Chem Ind Ltd Nitride semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223846A (en) * 1996-02-16 1997-08-26 Nichia Chem Ind Ltd Nitride semiconductor laser device
JPH1197742A (en) * 1997-09-22 1999-04-09 Nichia Chem Ind Ltd Nitride semiconductor element

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* Cited by examiner, † Cited by third party
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US10107458B2 (en) 2015-10-16 2018-10-23 Seoul Viosys Co., Ltd. Compact light emitting diode chip and light emitting device including the same
US10126831B2 (en) 2015-10-16 2018-11-13 Seoul Viosys Co., Ltd. Compact light emitting diode chip, light emitting device and electronic device including the same
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US10359153B2 (en) 2015-10-16 2019-07-23 Seoul Viosys Co., Ltd. Light emitting diode chip having a small area and slim thickness, light emitting device and electronic device including the same
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