CN210443566U - Solar cell - Google Patents

Solar cell Download PDF

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Publication number
CN210443566U
CN210443566U CN201921581439.2U CN201921581439U CN210443566U CN 210443566 U CN210443566 U CN 210443566U CN 201921581439 U CN201921581439 U CN 201921581439U CN 210443566 U CN210443566 U CN 210443566U
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layer
solar cell
silicon carbide
doped silicon
carbide layer
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CN201921581439.2U
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邓伟伟
陈海燕
熊震
蒋方丹
邢国强
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Canadian Solar Inc
CSI Cells Co Ltd
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CSI Cells Co Ltd
CSI Solar Power Group Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/52PV systems with concentrators
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The application provides a solar cell, which comprises a silicon wafer, a front electrode and a back electrode, wherein the front electrode and the back electrode are respectively arranged on two sides of the silicon wafer; the solar cell further comprises a tunneling layer and a doped silicon carbide layer which are sequentially arranged on the front surface of the first region, and an antireflection layer which is arranged on the doped silicon carbide layer and the diffusion layer of the second region, wherein the front electrode penetrates through the antireflection layer and is in contact with the doped silicon carbide layer. The solar cell reduces the composite loss and the contact resistance of the front electrode, ensures the absorption of the surface of the solar cell to light rays, and improves the conversion efficiency.

Description

Solar cell
Technical Field
The application relates to the technical field of solar power generation, in particular to a solar cell.
Background
With the rapid development of photovoltaic technology, the market demand for efficient cells and components is also increasing. As for crystalline silicon solar cells, the perc (passivated Emitter and reader cell) cell, which has attracted attention in recent years, mainly reduces the recombination of surface carriers through a back passivation film to improve the cell conversion efficiency, and the research on such cells has been focused on the design and improvement of the back passivation film structure.
The front surface of the PERC cell is usually printed and sintered after a passivation antireflection layer is deposited, so as to obtain a front electrode which penetrates through the passivation antireflection layer and is in ohmic contact with a silicon wafer, and the recombination loss of the combination position of the front electrode and the silicon wafer becomes an important constraint factor for limiting the further improvement of the efficiency of the PERC cell. On the other hand, the passivation structure combining the tunneling passivation film and the polycrystalline silicon film, which is disclosed in the industry in recent years, can reduce metal contact recombination and contact resistance, but the light absorption coefficient of the polycrystalline silicon film is relatively large, and the part of the polycrystalline silicon film exceeding the metal electrode can influence the absorption of the battery on external radiation and reduce short-circuit current; and after the deposition of the polycrystalline silicon film is finished, high-temperature annealing is required to ensure the performance of the film layer.
In view of the above, there is a need for a new solar cell.
SUMMERY OF THE UTILITY MODEL
The application aims to provide a solar cell, which can reduce the recombination loss and the contact resistance of a front electrode position and improve the conversion efficiency.
In order to achieve the above object, an embodiment of the present application provides a solar cell, include the silicon chip, set up respectively the front electrode and the back electrode of the relative both sides of silicon chip, the front of silicon chip is formed with the diffusion layer, just the silicon chip has first region and second region, solar cell is still including range upon range of setting up the positive tunneling layer of first region is in with doping carborundum layer, setting doping carborundum layer reaches antireflection layer on the diffusion layer of second region, the front electrode pierces through antireflection layer on the doping carborundum layer and with doping carborundum layer contacts.
As a further improvement of the embodiments of the present application, the doping types of the doped silicon carbide layer and the diffusion layer are the same, and the doping concentration of the diffusion layer is less than that of the doped silicon carbide layer.
As a further improvement of the embodiment of the application, the sheet resistance of the diffusion layer is set to be 70-160 ohm/squ.
As a further improvement of the embodiment of the application, the doping concentration of the doped silicon carbide layer is set to be 1E 19-1E 21cm-3
As a further improvement of the embodiment of the application, the thickness of the doped silicon carbide layer is set to be 10-500 nm.
As a further improvement of the embodiment of the application, the thickness of the tunneling layer is set to be 0.5-5 nm.
As a further improvement of the embodiment of the present application, the solar cell further has a back passivation layer disposed on the back surface of the silicon wafer, and the back electrode penetrates through the back passivation layer and contacts the silicon wafer.
The beneficial effect of this application is: by adopting the solar cell, the tunneling layer and the doped silicon carbide layer are arranged between the front electrode and the silicon wafer, so that the front electrode is prevented from being directly contacted with the diffusion layer, the interface recombination and the contact resistance are reduced, and the conversion efficiency is improved; the doped silicon carbide layer has better thermal stability and optical performance, and is beneficial to improving the performance of a battery product.
Drawings
FIG. 1 is a schematic structural diagram of a first embodiment of a solar cell of the present application;
FIG. 2 is a schematic structural diagram of a second embodiment of a solar cell of the present application;
FIG. 3 is a schematic structural diagram of a third embodiment of a solar cell of the present application;
fig. 4 is a schematic main flow chart of a method for manufacturing a solar cell according to the present application.
100-solar cell; 10-a silicon wafer; 11-a diffusion layer; 20-a front electrode; 30-a back electrode; 40-a tunneling layer; 50-doped silicon carbide layer; 60-an anti-reflection layer; 61-first part; 62-a second portion; 70-back side passivation layer.
Detailed Description
The present application will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the above embodiments, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the present embodiments are included in the scope of the present invention.
Referring to fig. 1, a solar cell 100 provided in the present application includes a silicon wafer 10, and a front electrode 20 and a back electrode 30 respectively disposed on opposite sides of the silicon wafer 10, wherein a diffusion layer 11 is formed on a front surface of the silicon wafer 10. Here, the silicon wafer 10 is a P-type silicon wafer, and is subjected to counter doping to obtain the N-type diffusion layer 11; the front electrode 20 is a silver electrode; the back electrode 30 is provided as a silver-aluminum electrode.
The silicon wafer 10 has a first region and a second region, the solar cell 100 further includes a tunneling layer 40 and a doped silicon carbide layer 50 sequentially stacked on the front surface of the first region, and an anti-reflection layer 60 disposed on the doped silicon carbide layer 50 and the diffusion layer 11 of the second region, and the front electrode 20 penetrates through the anti-reflection layer 60 and forms ohmic contact with the doped silicon carbide layer 50. The doping types of the doped silicon carbide layer 50 and the diffusion layer 11 are the same, and the doping concentration of the diffusion layer 11 is less than that of the doped silicon carbide layer 50, that is, the doped silicon carbide layer 50 forms an N + + heavily doped emitter, the contact resistance between the N + + heavily doped emitter and the front electrode 20 is relatively low, and the filling factor of the solar cell 100 is improved.
The doped silicon carbide layer 50 has a doping concentration of 1E 19-1E 21cm-3And the thickness of the doped silicon carbide layer 50 is set to be 10 to 500 nm. In the embodiment, the sheet resistance of the diffusion layer 11 is set to be 70-160 ohm/squ; the sheet resistance of the doped silicon carbide layer 50 is set to 10-200 ohm/squ, preferably 20-60 ohm/squ. The tunneling layer 40 can be a silicon oxide film layer, the thickness of the tunneling layer is set to be 0.5-5 nm, the carrier transmission resistance can be increased when the tunneling layer 40 is too thick, and a good passivation effect cannot be achieved when the tunneling layer 40 is too thin.
Considering practical process limitations and requirements, the first region is generally configured to be larger than the electrode region corresponding to the front electrode 20, so that the front electrode 20 does not extend beyond the doped silicon carbide layer 50. The light transmittance of the doped silicon carbide layer 50 is good, and light irradiated onto the doped silicon carbide layer 50 beside the front electrode 20 can smoothly penetrate through the doped silicon carbide layer 50, so that the number of photon-generated carriers is increased, and the conversion efficiency is improved.
The anti-reflection layer 60 is used for reducing light reflection on the surface of the silicon wafer 10, and has a first portion 61 located on the doped silicon carbide layer 50 and a second portion 62 located on the diffusion layer 11 in a second region, wherein the first portion 61 and the second portion 62 are formed in a uniform manner, and the second portion 62 also has a passivation effect on the surface of the diffusion layer 11. According to the product requirements, the antireflection layer 60 can adopt the existing single-layer, multi-layer or gradual-change designed antireflection film layer structure, if a SiNx film layer is adopted as the antireflection layer 60, the minority carrier concentration on the surface of the N-type diffusion layer is reduced through self positive charges while the antireflection effect is realized, and the passivation effect is played.
The solar cell 100 further has a back passivation layer 70 disposed on the back surface of the silicon wafer 10, and the back electrode 30 penetrates the back passivation layer 70 and contacts the silicon wafer 10. The back passivation layer 70 may be an AlOx film layer, which like the SiNx film layer, can passivate the surface defects of the silicon wafer 10, has negative charges opposite to those of the SiNx film layer, is suitable for passivating the surface of the P-type silicon wafer, avoids forming a reverse layer, increases the multi-photon concentration on the surface of the P-type silicon wafer, reduces the minority-electron concentration, and reduces the surface recombination rate.
The solar cell 100 may also be configured as a double-sided cell, in which case, the back passivation layer 70 may adopt an AlOx and SiNx stacked structure, so as to reduce reflection of incident light from the back of the silicon wafer 10 and improve back conversion efficiency while realizing passivation of the back of the silicon wafer 10. In addition, another tunneling layer and another doped silicon carbide layer may be disposed between the back electrode 30 and the silicon wafer 10, so as to reduce back recombination loss and improve back light utilization. In addition, the silicon wafer 10 may also be an N-type silicon wafer, and the doping types of the diffusion layer 11 and the doped silicon carbide layer 50 are adjusted accordingly, which is not described herein again.
Referring to fig. 2 and 3, the silicon wafer 10 is locally diffused to obtain the diffusion layer 11, and the diffusion layer 11 is formed on the surface of the second region or on the surfaces of the second region and a part of the first region. In this case, the silicon wafer 10 shields at least a part of the first region through a mask in the diffusion process, so that the part of the silicon wafer 10 is not subjected to diffusion doping, the recombination loss can be effectively reduced, and the conversion efficiency of the solar cell 100 is improved.
Referring to fig. 4, the preparation of the solar cell 100 mainly includes:
providing a silicon wafer 10, and performing surface texturing;
preparing and forming a diffusion layer 11 on the front surface of the silicon wafer 10;
the silicon chip 10 is provided with a first region and a second region, and a tunneling layer 40 and a doped silicon carbide layer 50 are prepared on the front surface of the first region;
depositing an antireflection layer 60 on the surface of the doped silicon carbide layer 50 and the diffusion layer 11 in the second region, and depositing a back passivation layer 70 on the back of the silicon wafer 10;
printing corresponding slurry on the front surface and the back surface of the silicon wafer 10 respectively, and sintering to obtain a front electrode 20 and a back electrode 30, wherein the front electrode 20 penetrates through the anti-reflection layer 60 and contacts with the doped silicon carbide layer 50, and the back electrode 30 penetrates through the back passivation layer 70 and contacts with the silicon wafer 10.
Here, the silicon wafer 10 is a P-type monocrystalline silicon wafer, and the silicon wafer 10 is subjected to texturing using an alkali solution to obtain a textured structure having a pyramid-shaped surface. The diffusion layer 11 may be typically pumped with POCl at high temperature3Reacting with the silicon wafer 10, and permeating, wherein the diffusion depth and surface sheet resistance of the diffusion layer 11 can be controlled by controlling the process conditions such as reaction time, temperature and the like. After the surface is cleaned, sequentially depositing and preparing a tunneling film and a doped silicon carbide film which cover the front surface of the silicon wafer 10; and coating a corrosion-resistant layer on the front surface of the first region, and removing part of the tunneling film and the doped silicon carbide film on the surface of the second region by etching to obtain a tunneling layer 40 and a doped silicon carbide layer 50 which are stacked on the front surface of the first region. Of course, the corresponding mask layer may be prepared in the second region in advance, and then the tunneling layer 40 and the doped silicon carbide layer 50 may be prepared by deposition.
The slurry used on the front side of the silicon wafer 10 may directly burn through the anti-reflective layer 60 and form an ohmic contact with the doped silicon carbide layer 50 during the sintering process. In order to enable the slurry adopted by the back surface of the silicon wafer 10 to be in contact with the silicon wafer 10, the preparation method further comprises the steps of opening a back electrode window on the back passivation layer 70, printing the corresponding slurry at the position of the back electrode window, and performing the sintering step to obtain the back electrode 30, wherein the width of the back electrode window is much smaller than that of the back electrode 30, so that the loss caused by the back surface compounding of the silicon wafer 10 is effectively controlled. In other embodiments of the present application, the back electrode 30 may also be a "fire through" type paste, and the sintering temperature is adjusted such that the paste is sintered through the back passivation layer 70, thereby obtaining the back electrode 30 contacting the back surface of the silicon wafer 10.
To sum up, the solar cell 100 of the present application is heavily doped by the doped silicon carbide layer 50, and the tunneling layer 40 is disposed between the doped silicon carbide layer 50 and the silicon wafer 10, so that the contact resistance of the front electrode 20 can be reduced, the carrier recombination can be reduced, and the fill factor can be improved. The light transmittance of the doped silicon carbide layer 50 is better, so that light irradiated on the first region of the silicon wafer 10 can smoothly penetrate through the doped silicon carbide layer 50, and the carrier concentration and the short-circuit current are increased. In addition, the doped silicon carbide layer 50 has good thermal stability and optical performance, annealing is not required after film formation, a compact film structure can be formed through subsequent sintering, and the process is simplified.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above list of details is only for the concrete description of the feasible embodiments of the present application, they are not intended to limit the scope of the present application, and all equivalent embodiments or modifications that do not depart from the technical spirit of the present application are intended to be included within the scope of the present application.

Claims (7)

1. The utility model provides a solar cell, includes the silicon chip, sets up respectively front electrode and back electrode in the relative both sides of silicon chip, the front of silicon chip is formed with the diffusion barrier, its characterized in that: the solar cell comprises a silicon chip, a front electrode, a doped silicon carbide layer, a front tunneling layer, a doped silicon carbide layer, an antireflection layer and a back electrode, wherein the silicon chip is provided with a first region and a second region, the tunneling layer and the doped silicon carbide layer are stacked on the front surface of the first region, the antireflection layer is arranged on the doped silicon carbide layer and the diffusion layer of the second region, and the front electrode penetrates through the antireflection layer on the doped silicon carbide layer and is in contact with the doped silicon carbide layer.
2. The solar cell of claim 1, wherein: the doping types of the doped silicon carbide layer and the diffusion layer are consistent, and the doping concentration of the diffusion layer is smaller than that of the doped silicon carbide layer.
3. The solar cell according to claim 1 or 2, characterized in that: the sheet resistance of the diffusion layer is set to be 70-160 ohm/squ.
4. The solar cell according to claim 1 or 2, characterized in that: the doping concentration of the doped silicon carbide layer is set to be 1E 19-1E 21cm-3
5. The solar cell of claim 1, wherein: the thickness of the doped silicon carbide layer is set to be 10-500 nm.
6. The solar cell of claim 1, wherein: the thickness of the tunneling layer is set to be 0.5-5 nm.
7. The solar cell of claim 1, wherein: the solar cell is also provided with a back passivation layer arranged on the back surface of the silicon wafer, and the back electrode penetrates through the back passivation layer and is in contact with the silicon wafer.
CN201921581439.2U 2019-09-23 2019-09-23 Solar cell Active CN210443566U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114613865A (en) * 2020-11-25 2022-06-10 嘉兴阿特斯技术研究院有限公司 Solar cell and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114613865A (en) * 2020-11-25 2022-06-10 嘉兴阿特斯技术研究院有限公司 Solar cell and preparation method thereof

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Address after: No. 199, deer mountain road, Suzhou high tech Zone, Jiangsu Province

Patentee after: CSI Cells Co.,Ltd.

Patentee after: Atlas sunshine Power Group Co.,Ltd.

Address before: No. 199, deer mountain road, Suzhou high tech Zone, Jiangsu Province

Patentee before: CSI Cells Co.,Ltd.

Patentee before: CSI SOLAR POWER GROUP Co.,Ltd.