SUMMERY OF THE UTILITY MODEL
The application aims to provide a solar cell, which can reduce the thickness of a doped polycrystalline silicon layer, reduce light absorption loss and improve equipment productivity.
In order to achieve the above object, an embodiment of the present application provides a solar cell, including a silicon substrate, a tunneling layer and a doped polysilicon layer sequentially disposed on a surface of the silicon substrate, wherein a thickness of the doped polysilicon layer is set to be 10-50 nm; the solar cell further comprises an alumina film layer arranged on the surface of one side, away from the silicon substrate, of the doped polycrystalline silicon layer, and the thickness of the alumina film layer is set to be 3-15 nm.
As a further improvement of the embodiment of the application, the solar cell further comprises an aluminum oxide film layer deviating from the antireflection layer on the surface of one side of the silicon substrate and a metal electrode penetrating the antireflection layer, and the antireflection layer comprises a silicon nitride film layer.
As a further improvement of the embodiment of the present application, the doped polysilicon layer includes a first doped region and a second doped region that are adjacently disposed, the first doped region corresponds to the metal electrode, and a doping concentration of the first doped region is greater than a doping concentration of the second doped region.
As a further improvement of the embodiment of the present application, the metal electrode does not exceed the first doped region.
As the further improvement of this application embodiment, the tunneling layer sets up to silicon oxide film layer or silicon oxynitride film layer, just the thickness of tunneling layer sets up to 1 ~ 2 nm.
As a further improvement of the embodiment of the application, the tunneling layer, the doped polysilicon layer and the alumina film layer are all arranged on the front surface of the silicon substrate.
As a further improvement of the embodiment of the present application, the silicon substrate is an N-type silicon wafer; the doped polysilicon layer is a boron doped polysilicon layer.
As a further improvement of the embodiment of the present application, the solar cell is configured as a bifacial cell; the tunneling layer, the doped polycrystalline silicon layer and the alumina film layer are arranged on one side surface of the silicon substrate, and the other side surface of the silicon substrate is sequentially stacked with the other tunneling layer and the other doped polycrystalline silicon layer.
The beneficial effect of this application is: by adopting the solar cell, the aluminum oxide film layer with the set thickness is arranged on the surface of the doped polycrystalline silicon layer, so that the built-in electric field can be increased; the subsequent metal slurry is not directly contacted with the doped polycrystalline silicon layer after being sintered, so that the thickness of the doped polycrystalline silicon layer can be reduced, and the light absorption loss is reduced; and the preparation time of the doped polycrystalline silicon layer is also shortened, and the productivity of equipment is improved.
Detailed Description
The present application will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the above embodiments, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the present embodiments are included in the scope of the present invention.
Referring to fig. 1, a solar cell 100 provided by the present application includes a silicon substrate 1, a tunneling layer 2, a doped polysilicon layer 3, and an alumina film layer 4 sequentially stacked on a surface of the silicon substrate 1. Here, the silicon substrate 1 is an N-type silicon wafer; the tunneling layer 2, the doped polysilicon layer 3 and the alumina film layer 4 are all arranged on the front side of the silicon substrate 1.
The solar cell 100 further comprises an antireflection layer 81 arranged on the surface of the alumina film layer 4 facing away from one side of the silicon substrate 1, and a metal electrode penetrating through the antireflection layer 81. The antireflection layer 81 is arranged as a silicon nitride film layer; the metal electrode is a front electrode 91, and the front electrode 91 is usually a silver electrode, and is obtained by screen printing and sintering a predetermined conductive paste.
The thickness of the doped polycrystalline silicon layer 3 is set to be 10-50 nm; the thickness of the alumina film layer 4 is set to be 3-15 nm. The front electrode 91 is not burnt through the alumina film layer 4, the front electrode 91 and the doped polysilicon layer 3 are electrically conducted through a tunneling effect, and the doped polysilicon layer 3 cannot be damaged on the premise of keeping the contact resistance not to be increased. Through the design, the thickness of the doped polycrystalline silicon layer 3 can be reduced, the light absorption loss is reduced, and the short-circuit current of the battery is improved; and the deposition preparation time of the doped polycrystalline silicon layer 3 is also shortened, and the productivity of the equipment is improved. It should be noted that, from the passivation point of view, the thickness of the doped polysilicon layer 3 is set to be between 10 nm and 20nm to achieve a better passivation effect, but the thickness of the doped polysilicon layer 3 needs to be designed in consideration of the risk of film damage and the current transmission requirement.
The tunneling layer 2 is a silicon oxide film layer or a silicon oxynitride film layer, the thickness of the tunneling layer 2 is 1-2 nm, and the tunneling layer can be prepared by a thermal oxidation, ozone oxidation or wet chemical oxidation method; the doped polysilicon layer 3 is a boron doped polysilicon layer, and can be obtained by preparing an amorphous silicon layer by an LPCVD or PECVD method and then annealing at a high temperature.
The aluminum oxide film layer 4 can be prepared by an ALD (atomic layer deposition) or PECVD (plasma enhanced chemical vapor deposition) method; the anti-reflection layer 81 is generally deposited by a PECVD method, the thickness, the refractive index and the like of the anti-reflection layer can be adjusted and controlled by the flow rate of reaction gas, the deposition temperature and the like, and the anti-reflection layer 81 can be set to be a composite film layer or a gradual-change film layer structure according to the product requirements, which is not described herein again.
The light absorption loss of the doped polysilicon layer 3 increases with the increase of the doping concentration, and therefore, in order to further reduce the light absorption loss, the doping concentration of the doped polysilicon layer 3 can be designed differently. The doped polysilicon layer 3 includes a first doped region 31 and a second doped region 32 which are adjacently disposed, the first doped region 31 corresponds to the metal electrode, i.e., the front electrode 91, and the doping concentration of the first doped region 31 is greater than that of the second doped region 32. Preferably, the front electrode 91 does not extend beyond the first doped region 31.
In this embodiment, the solar cell 100 is configured as a bifacial cell; the other side surface of the silicon substrate 1 is sequentially stacked with another tunneling layer and another doped polysilicon layer, that is, the back surface of the silicon substrate 1 is sequentially stacked with a back tunneling layer 5, a back doped polysilicon layer 6 and a back alumina film layer 7. The back-doped polysilicon layer 6 is typically provided as a phosphorus-doped polysilicon layer; a back antireflection layer 82 is further arranged on the surface of one side of the back alumina film layer 7, which is far away from the silicon substrate 1, and the solar cell 100 further comprises a back electrode 92 penetrating through the back antireflection layer 82. Here, the structural designs of the back tunneling layer 5, the back doped polysilicon layer 6, and the back alumina film layer 7 are similar to the structural designs of the tunneling layer 2, the doped polysilicon layer 3, and the alumina film layer 4, respectively.
It is understood that the solar cell 100 may be designed with the foregoing film layer only on the front side or the back side of the silicon substrate 1, and the detailed structure is not repeated herein.
The specific preparation process of the solar cell 100 includes: firstly, texturing the surface of a silicon substrate 1 to form a pyramid-shaped textured structure; preparing and forming a tunneling layer 2 and a back tunneling layer 5 on the surfaces of two sides of the silicon substrate 1, respectively depositing and preparing a boron-doped polycrystalline layer and a phosphorus-doped polycrystalline layer on the front surface and the back surface of the silicon substrate 1, and forming a first doping area 31 with higher doping concentration and a back heavily-doped area 61 by adopting a laser doping method; cleaning the silicon substrate 1, respectively depositing by adopting a PECVD or ALD mode to obtain an alumina film layer 4 and a back alumina film layer 7, and then depositing by adopting a PECVD mode to obtain an antireflection layer 81 and a back antireflection layer 82; finally, a predetermined conductive paste is printed and sintered to form the front electrode 91 and the back electrode 92.
In summary, in the solar cell 100 of the present application, the aluminum oxide film layer 4 with a predetermined thickness is disposed on the surface of the doped polysilicon layer 3, so as to increase the built-in electric field; the front electrode 91 formed by sintering the subsequent metal slurry is not in direct contact with the doped polysilicon layer 3, so that the doped polysilicon layer 3 is prevented from being damaged, the thickness of the doped polysilicon layer 3 can be reduced, and the light absorption loss is reduced; the doping concentration of the doped polycrystalline silicon layer 3 is designed in a distinguishing way, so that the light absorption loss can be further reduced; in addition, the thickness of the doped polycrystalline silicon layer 3 is reduced, the deposition preparation time is also shortened, and the improvement of the equipment productivity is facilitated.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above list of details is only for the concrete description of the feasible embodiments of the present application, they are not intended to limit the scope of the present application, and all equivalent embodiments or modifications that do not depart from the technical spirit of the present application are intended to be included within the scope of the present application.