CN112420855A - Solar cell based on P-type silicon wafer and preparation method thereof - Google Patents

Solar cell based on P-type silicon wafer and preparation method thereof Download PDF

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Publication number
CN112420855A
CN112420855A CN202011279813.0A CN202011279813A CN112420855A CN 112420855 A CN112420855 A CN 112420855A CN 202011279813 A CN202011279813 A CN 202011279813A CN 112420855 A CN112420855 A CN 112420855A
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layer
aluminum
silicon wafer
type silicon
dielectric layer
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CN202011279813.0A
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Chinese (zh)
Inventor
张树德
魏青竹
刘玉申
况亚伟
赵保星
缪乾
符欣
连维飞
倪志春
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Changshu Institute of Technology
Suzhou Talesun Solar Technologies Co Ltd
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Changshu Institute of Technology
Suzhou Talesun Solar Technologies Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441Electrode arrangements specially adapted for back-contact solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022433Particular geometry of the grid contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a solar cell based on a P-type silicon wafer and a preparation method thereof, which simplify the preparation process and have higher conversion efficiency. The solar cell piece comprises: the silicon chip comprises a P-type silicon chip, a front dielectric layer formed on the front surface of the P-type silicon chip, a front electrode positioned on the front dielectric layer, a back dielectric layer formed on the back surface of the P-type silicon chip and a back electrode positioned on the back dielectric layer; the P-type silicon substrate is provided with an aluminum doped region, and the front electrode is in metal contact with the aluminum doped region of the P-type silicon substrate. Compared with the traditional method, the preparation method of the aluminum-doped region has the advantages that the preparation process is simple, the temperature in the preparation process is low, the reduction of the minority carrier lifetime is avoided, and the photoelectric conversion efficiency of the cell is ensured.

Description

Solar cell based on P-type silicon wafer and preparation method thereof
Technical Field
The invention belongs to the field of crystalline silicon solar cells, and relates to a solar cell based on a P-type silicon wafer and a preparation method thereof.
Background
The photovoltaic field has been developed rapidly in recent years, and various solar cells have been developed.
Patent ZL201920960985.0 discloses a P-type crystalline silicon solar cell, the structure of which comprises: p-type crystalline silicon substrate, P++The device comprises a region, a front anti-reflection layer, a front metal electrode, an N-type doped silicon film layer, a back passivation layer, a back metal electrode, a passivation tunneling layer, a back electrode and the like. Wherein, P++The preparation of the region requires high temperature of over 1000 ℃ to diffuse boron to the P-type crystal silicon substrate. Thus, the structure has the following problems:
1. method for preparing front surface local area P by adopting mask opening boron diffusion++The process steps are complicated;
2. the high temperature of boron diffusion higher than 1000 ℃ can cause the reduction of the minority carrier lifetime of the P-type silicon wafer body, and the conversion efficiency of the battery is influenced.
Disclosure of Invention
In view of at least one of the above technical problems, the present invention aims to provide a solar cell having a P-type silicon wafer, which has a high conversion efficiency; the invention also provides a preparation method of the P-type silicon wafer, which simplifies the preparation process and ensures that the prepared solar cell has higher conversion efficiency.
In order to achieve the purpose, the invention adopts a technical scheme as follows:
a solar cell based on a P-type silicon wafer comprises: the silicon chip comprises a P-type silicon chip, a front dielectric layer formed on the front surface of the P-type silicon chip, a front electrode positioned on the front dielectric layer, a back dielectric layer formed on the back surface of the P-type silicon chip and a back electrode positioned on the back dielectric layer. The P-type silicon wafer is partially doped with aluminum and provided with an aluminum doped region, the front electrode comprises an aluminum layer and a silver layer formed on the aluminum layer, and the aluminum layer is formed on the aluminum doped region. The aluminum layer of the front electrode is in metal contact with the aluminum doped region, so that the resistance of the part is reduced, and the efficiency of the battery is improved. The front electrode is the silver-aluminum laminated layer, the silver is laminated on the aluminum, the resistivity of the silver is lower than that of the aluminum, and the silver-aluminum laminated layer can reduce the resistivity of the grid line, so that the width of the grid line is narrowed, and the shading area of the grid line is reduced.
In one embodiment, the front electrode is in the shape of a gate line.
In one embodiment, the front dielectric layer comprises a passivation layer formed on the front surface of the P-type silicon wafer and an anti-reflection layer stacked on the passivation layer. The front passivation layer can inhibit front surface recombination, reduce the front surface recombination rate and improve the photoelectric conversion efficiency of the crystalline silicon solar cell. The antireflective layer can reduce the reflection loss of sunlight on the front side, thereby forming more carriers on the P-type silicon wafer.
In one embodiment, a tunneling oxide layer is formed on the back surface of the P-type silicon wafer, an N-type polysilicon layer is stacked under the tunneling oxide layer, and the back surface dielectric layer is stacked on the N-type polysilicon layer. The tunneling oxide layer can passivate the back surface of the P-type silicon wafer, reduce the contact interface composition of the P-type silicon wafer and the N-type polycrystalline silicon layer, and further improve the open-circuit voltage and the conversion efficiency of the battery.
In one embodiment, the back electrode is a gate-line-shaped silver electrode which penetrates through the back dielectric layer to form a metal contact with the N-type polycrystalline silicon layer. The resistance value of the metal contact is small, and the improvement of the battery efficiency is facilitated.
In one embodiment, the back dielectric layer is a silicon nitride protective layer. This portion increases the open-circuit voltage and the short-circuit current.
The other technical scheme adopted by the invention is as follows:
a preparation method of the solar cell piece comprises the following steps:
A. providing a P-type silicon wafer;
B. preparing a tunneling oxide layer and an intrinsic polycrystalline silicon layer on the back of the P-type silicon wafer;
C. forming an N-type polycrystalline silicon layer by phosphorus diffusion;
D. etching to remove phosphorosilicate glass, PN junction and polycrystalline silicon on the front side and the edge of the silicon wafer;
E. making velvet on the front side;
F. removing the phosphorosilicate glass on the back surface;
G. preparing a front dielectric layer on the front side of the silicon wafer;
H. preparing a back dielectric layer on the back of the silicon wafer;
I. preparing a back electrode; printing aluminum paste on the front surface, drying, printing silver paste, drying and sintering.
In one embodiment, in step B, the tunnel oxide layer is prepared by thermal oxidation or chemical oxidation, and the intrinsic polycrystalline silicon layer is prepared by LPCVD, PECVD or PCD.
In one embodiment, in the step I, grid-line-shaped silver paste is printed on the back surface, dried, and sintered, so that the back surface silver paste is fired through the back surface dielectric layer to form a metal contact with the N-type polysilicon layer. Partial front aluminum paste of the P-type silicon wafer is burnt through the front anti-reflection layer and the passivation layer, aluminum and silicon are melted and solidified during sintering to form a front local aluminum doped area, and the aluminum electrode part is in good metal contact with the aluminum doped area. And printing grid-line-shaped aluminum paste on the front surface, drying, printing grid-line-shaped silver paste on the front surface, aligning the grid-line-shaped silver paste with the aluminum paste, drying, and sintering to obtain the aluminum-doped region with the carrier concentration and the conductivity higher than those of the P-type silicon wafer. The front metal electrode is not in direct contact with the p-type silicon wafer, and the front metal electrode is in contact with the local aluminum doped region with high doping concentration to form good metal contact, so that the contact resistance can be reduced to a great extent. Aluminum is used as an element for forming the doped region and also as an aluminum layer of the electrode. The preparation of the aluminum doped part is completed at the same time of completing the preparation of the front electrode, and the preparation steps are simplified.
Compared with the prior art, the invention has the following advantages by adopting the scheme:
the solar cell sheet adopts the silver-aluminum laminated layer as the positive electrode, aluminum is fused and solidified with silicon in the sintering process to form an aluminum doped region, and the silver reduces the resistivity of the grid line, thereby being beneficial to narrowing the width of the grid line and reducing the shading area of the grid line. Moreover, no mask is needed, and the front surface local area P is simplified++A method for preparing the region. In addition, the preparation process avoids the high temperature of more than 1000 ℃, does not influence the minority carrier lifetime of the P-type silicon wafer body, and is beneficial to the efficiency of the battery.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of a P-type silicon wafer-based solar cell according to an embodiment of the present invention;
fig. 2 is a process diagram of a method for manufacturing a P-type silicon wafer solar cell according to an embodiment of the invention.
Wherein the content of the first and second substances,
1. a front electrode; 101. a front electrode silver layer; 102. a front electrode aluminum layer; 2. a front antireflection layer; 3. a front passivation layer; 4. an aluminum-doped region; 5. a P-type silicon wafer; 6. tunneling through the oxide layer; 7. an N-type polycrystalline silicon layer; 8. a back dielectric layer; 9. and a back electrode.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the invention may be more readily understood by those skilled in the art. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The present embodiment provides a silicon wafer-based solar cell, and fig. 1 shows a cross-section of the solar cell. Referring to fig. 1, the solar cell includes a front side anti-reflection layer 2, a front side passivation layer 3, a P-type silicon wafer 5, a tunneling oxide layer 6, an N-type polysilicon layer 7, and a back side dielectric layer 8, which are sequentially stacked. The solar cell further comprises a front electrode 1, wherein the front electrode 1 is composed of a silver layer 101 and an aluminum layer 102, and the silver layer 101 is formed on the upper surface of the aluminum layer 102. Aluminum silicon is melted and solidified on the P-type silicon wafer 5 during sintering, and the aluminum doped region 4 is formed by partially doping aluminum into the P-type silicon wafer 5. The front electrode 1 sequentially penetrates through the front antireflection layer 2 and the front passivation layer 3, the front antireflection layer 2 is formed on the upper surface of the front passivation layer 3, the two layers are arranged on the upper surface of the P-type silicon wafer 5, and the lower surface of the P-type silicon wafer 5 is provided with the tunneling oxide layer 6. The upper surface of the N-type polycrystalline silicon layer 7 is contacted with the lower surface of the tunneling oxide layer 6, and the lower surface of the N-type polycrystalline silicon layer 7 is a back dielectric layer 8. The solar cell further comprises a back electrode 9, and the back electrode 9 is in contact with the N-type polycrystalline silicon layer 7 through a back dielectric layer 8.
In this embodiment, the front electrode 1 forms a plurality of aluminum doped regions 4 on the P-type silicon wafer 5. The aluminum doped regions 4 may form a good metal contact with the front electrode 1 while the back electrode 9 forms a metal contact with the N-type polysilicon layer 7 through the back dielectric layer 8.
The P-type silicon wafer 5 is mainly used for absorbing photons and generating photon-generated carriers.
In the present embodiment, the front passivation layer 3 is an aluminum oxide layer deposited on the front surface of the P-type silicon wafer 5. The front anti-reflective layer 2 is a silicon nitride layer formed on the front passivation layer 3. The front antireflection layer 2 can reduce sunlight reflection and increase light absorption rate. The front passivation layer 3 can inhibit front surface recombination, reduce the front surface recombination rate and improve the photoelectric conversion efficiency of the crystalline silicon solar cell.
In the present embodiment, a tunnel oxide layer 6 is formed on the back surface of the P-type silicon wafer 5, so as to further improve the open-circuit voltage and the conversion efficiency of the battery.
The back dielectric layer 8 is specifically a silicon nitride layer, which serves as a protective layer.
The front electrode 1 is a grid line-shaped electrode, and the back electrode 9 is a grid line-shaped silver electrode.
The embodiment also provides a preparation method of the solar cell. Referring to fig. 2, the preparation method includes the steps of:
A. providing a P-type silicon wafer 5;
B. preparing a tunneling oxide layer 6 and an intrinsic polycrystalline silicon layer on the back of a P-type silicon wafer 5;
C. phosphorus is diffused to form an N-type polycrystalline silicon layer 7;
D. etching to remove phosphorosilicate glass, PN junction and polycrystalline silicon on the front side and the edge of the silicon wafer;
E. making velvet on the front side;
F. removing the phosphorosilicate glass on the back surface;
G. preparing a front dielectric layer on the front side of the silicon wafer;
H. preparing a back dielectric layer 8 on the back of the silicon wafer;
I. preparing a back electrode 9; printing aluminum paste on the front surface, drying, printing silver paste, drying and sintering.
The step A is specifically implemented as follows: removing cutting damage and polishing of the P-type silicon wafer;
the step B is specifically implemented as follows: and preparing a tunneling oxide layer 6 and intrinsic polysilicon on the back surface, wherein the tunneling oxide layer 6 adopts thermal oxidation or chemical oxidation, and the intrinsic polysilicon adopts LPCVD, PECVD or PVD.
The step C is specifically implemented as follows: phosphorus element is diffused into the N-type polycrystalline silicon layer 7.
The step D is implemented specifically as follows: and removing the phosphorosilicate glass, the PN junction and the polycrystalline silicon on the front surface and the edge. The reason for the etching is that the peripheral surface of the silicon wafer also forms a diffusion layer during the diffusion process. The peripheral diffusion layer forms a short circuit ring for the upper and lower electrodes of the cell and must be removed. The phenomenon that any tiny local short circuit exists on the periphery to reduce the parallel resistance of the battery to form a waste product is avoided.
The step E is specifically implemented as follows: the back phosphorosilicate glass protects the polycrystalline silicon from being damaged; the surface area of the cell is increased, and the reflectivity of the surface of the cell is greatly reduced by utilizing the light trapping principle.
The step F is specifically implemented as follows: and cleaning the surface to remove the phosphorosilicate glass on the surface of the polycrystalline silicon layer.
The step G is specifically implemented as follows: and depositing a passivation layer and an antireflection layer on the front surface.
The step H is specifically implemented as follows: and depositing a protective layer on the back surface.
The step I is implemented specifically as follows: and printing grid-line-shaped silver paste on the back and drying. And firstly printing grid-line-shaped aluminum paste (burn-through type aluminum paste) on the front surface, drying, then printing grid-line-shaped silver paste (aligned with the grid-line-shaped aluminum paste) on the front surface, and drying. Sintering, the back silver paste burns through the back protective layer to form metal contact with the N-type polycrystalline silicon layer 7. And the front aluminum paste is burnt through the front anti-reflection layer 2 and the front passivation layer 3, aluminum and silicon are melted and solidified during sintering to form a front aluminum doped region 4, and the aluminum is in metal contact with the local aluminum doped region 4.
The embodiment adopts the above scheme, and has the following advantages:
firstly, a silver-aluminum laminated layer is used as a positive electrode, aluminum is fused and solidified with silicon in a sintering process to form an aluminum doped region, and the silver reduces the resistivity of the grid line, thereby being beneficial to narrowing the width of the grid line and reducing the shading area of the grid line.
Moreover, no mask is needed, and the front surface local area P is simplified++A method for preparing the region.
In addition, the preparation process avoids the high temperature of more than 1000 ℃, does not influence the minority carrier lifetime of the P-type silicon wafer body, and is beneficial to the efficiency of the battery.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and are preferred embodiments, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the scope of the present invention. All equivalent changes or modifications made according to the principles of the present invention should be covered within the protection scope of the present invention.

Claims (10)

1. A solar cell based on a P-type silicon wafer comprises the P-type silicon wafer, a front dielectric layer formed on the front side of the P-type silicon wafer, a front electrode located on the front dielectric layer, a back dielectric layer formed on the back side of the P-type silicon wafer and a back electrode located on the back dielectric layer, and is characterized in that: the P-type silicon wafer is partially doped with aluminum and provided with an aluminum doped region, the front electrode comprises an aluminum layer and a silver layer formed on the aluminum layer, and the aluminum layer is formed on the aluminum doped region.
2. The solar cell sheet according to claim 1, wherein: the front electrode is in a grid shape.
3. The solar cell sheet according to claim 1, wherein: the front dielectric layer comprises a passivation layer formed on the front surface of the P-type silicon wafer and an anti-reflection layer stacked on the passivation layer.
4. The solar cell sheet according to claim 1, wherein: and a tunneling oxide layer is formed on the back surface of the P-type silicon wafer, an N-type polycrystalline silicon layer is stacked on the tunneling oxide layer, and a back surface dielectric layer is stacked on the N-type polycrystalline silicon layer.
5. The solar cell sheet according to claim 4, wherein: the back electrode is a grid-shaped silver electrode, and the grid-shaped silver electrode penetrates through the back dielectric layer to form metal contact with the N-type polycrystalline silicon layer.
6. The solar cell sheet according to claim 1, wherein: the back dielectric layer is a silicon nitride protective layer.
7. A preparation method of the P-type silicon wafer-based solar cell piece as claimed in any one of claims 1 to 6, characterized by comprising the following steps:
A. providing a P-type silicon wafer;
B. preparing a tunneling oxide layer and an intrinsic polycrystalline silicon layer on the back of the P-type silicon wafer;
C. forming an N-type polycrystalline silicon layer by phosphorus diffusion;
D. etching to remove phosphorosilicate glass, PN junction and polycrystalline silicon on the front side and the edge of the silicon wafer;
E. making velvet on the front side;
F. removing the phosphorosilicate glass on the back surface;
G. preparing a front dielectric layer on the front side of the silicon wafer;
H. preparing a back dielectric layer on the back of the silicon wafer;
I. preparing a back electrode; printing aluminum paste on the front surface, drying, printing silver paste, drying and sintering.
8. The method of claim 7, wherein: in the step B, the tunneling oxide layer is prepared by thermal oxidation or chemical oxidation, and the intrinsic polycrystalline silicon layer is prepared by LPCVD, PECVD or PCD.
9. The method of claim 7, wherein: and in the step I, grid-line-shaped silver paste is printed on the back surface, the grid-line-shaped silver paste is dried, and the sintered back surface silver paste is burnt through the back surface dielectric layer to form metal contact with the N-type polycrystalline silicon layer.
10. The method of claim 7, wherein: and step I, printing grid-line-shaped aluminum paste on the front surface, drying, printing grid-line-shaped silver paste on the front surface, aligning the grid-line-shaped silver paste with the aluminum paste, drying, sintering, burning the front surface aluminum paste through the front surface dielectric layer, forming an aluminum-doped region on the P-type silicon chip, and enabling the aluminum to be in metal contact with the aluminum-doped region.
CN202011279813.0A 2020-11-16 2020-11-16 Solar cell based on P-type silicon wafer and preparation method thereof Pending CN112420855A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114388633A (en) * 2021-12-29 2022-04-22 西安隆基乐叶光伏科技有限公司 Solar cell and preparation method thereof
CN115000214A (en) * 2022-06-23 2022-09-02 浙江爱旭太阳能科技有限公司 P-type solar cell, manufacturing method thereof, cell module and photovoltaic system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114388633A (en) * 2021-12-29 2022-04-22 西安隆基乐叶光伏科技有限公司 Solar cell and preparation method thereof
CN115000214A (en) * 2022-06-23 2022-09-02 浙江爱旭太阳能科技有限公司 P-type solar cell, manufacturing method thereof, cell module and photovoltaic system
CN115000214B (en) * 2022-06-23 2024-03-29 浙江爱旭太阳能科技有限公司 P-type solar cell, manufacturing method thereof, cell assembly and photovoltaic system

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