CN206878007U - trench schottky diode - Google Patents
trench schottky diode Download PDFInfo
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- CN206878007U CN206878007U CN201720505633.7U CN201720505633U CN206878007U CN 206878007 U CN206878007 U CN 206878007U CN 201720505633 U CN201720505633 U CN 201720505633U CN 206878007 U CN206878007 U CN 206878007U
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Abstract
The utility model provides a kind of trench schottky diode, including：Multiple first grooves with the first width and at least one second groove with the second width positioned at terminal are formed in silicon base, second width is more than first width；Dielectric layer is formed in the surface of first groove second groove and silicon base；Deposit polycrystalline silicon, is planarized to polysilicon；The dielectric layer of silicon base upper surface is removed, retains polysilicon and dielectric layer in the second groove；Schottky junction is formed in silicon base upper surface；Metal electrode in making.The utility model directly needs the independent process for growing terminal interlayer dielectric layer by the use of gate oxide as terminal interlayer dielectric layer by setting a wider terminal trenches in device terminal so as to save in traditional handicraft；Surface is obtained using wet method full etching needed for the utility model schottky barrier layer, can be saved mask layer and etching procedure required for traditional fabrication, can significantly be saved manufacturing cost.
Description
Technical field
The utility model belongs to semiconductor device design and manufacturing field, more particularly to a kind of trench schottky diode
And preparation method thereof.
Background technology
With the continuous development of semiconductor technology, power device is widely used in disk as a kind of new device
The fields such as driving, automotive electronics.Power device is required to bear larger voltage, electric current and power termination.And existing MOS
The devices such as transistor can not meet the demand, and therefore, in order to meet the needs of application, various power devices turn into Jiao of concern
Point.
Existing Schottky diode is usually that noble metal (gold, silver, aluminium, platinum etc.) is positive pole, is negative using N-type semiconductor
Pole, there is rectification characteristic using the potential barrier formed on the two contact surface and manufactured metal-semiconductor device.Because N-type is partly led
There is substantial amounts of electronics in body, only minimal amount of free electron in noble metal, so electronics is just partly led from the high N-type of concentration
Spread in body into the low noble metal of concentration.Obviously, there is no hole in noble metal, hole is also just not present half from metal to N-type
The diffusion motion of conductor.As electronics is constantly diffused into noble metal from N-type semiconductor, N-type semiconductor sheet electron concentration is gradual
Reduce, surface electroneutrality is destroyed, and then just forms potential barrier, and its direction of an electric field is N-type semiconductor towards noble metal.But in the electricity
Under field action, the electronics in noble metal can also produce the drift motion from noble metal to N-type semiconductor, so as to weaken due to
Diffusion motion and the electric field formed.After the space-charge region of one fixed width is set up, electronics drift motion caused by electric field and
Electrons spread motion reaches relative balance caused by concentration difference, just forms Schottky barrier.
It can be seen that Schottky diode is the majority carrier that the rectification characteristic based on metal and semiconductor contact is operated
Device, have the characteristics that forward voltage drop is low, reverse recovery current is small, switching speed is fast, noise coefficient is small, low in energy consumption, it is wide at present
It is general to be applied to the fields such as Switching Power Supply, frequency converter, driver.
A kind of existing groove type Schottky diode structure is as shown in figure 1, in order to be advantageous to illustrate, each thickness degree in figure
It is not drawn to scale, and the metal level for carrying on the back crystalline substance is not drawn into.The slot type Schottky diode structure include N-type substrate 01,
Interval is formed at multiple groove structures in the N-type substrate, and it includes groove 10, the dielectric layer 11 of flute surfaces and filling
Polysilicon 12 in groove, multiple more groove pressure drop rings positioned at terminal, it includes groove 20, the dielectric layer 21 of flute surfaces
And the polysilicon 22 in groove is filled in, positioned at the terminal interlayer dielectric layer 41 of multiple decompression ring surfaces, and upper metal electricity
Pole 31.Above-mentioned groove-type Schottky diode uses more groove pressure drop ring design in terminal, during making, it is necessary to single
Terminal interlayer dielectric layer 41 is solely made, and needs mask layer process to produce reservation region in terminal, its complex procedures, cost
It is high.
In view of the above, there is provided one kind can effectively reduce processing step, reduce the trench schottky two of manufacturing cost
Pole pipe and preparation method thereof is necessary.
Utility model content
In view of the above the shortcomings that prior art, the purpose of this utility model is to provide a kind of pole of trench schottky two
Pipe and preparation method thereof, for solving trench schottky diode and preparation method thereof complex procedures in the prior art, cost is high
The problem of.
In order to achieve the above objects and other related objects, the utility model provides a kind of making of trench schottky diode
Method, the preparation method include：1) silicon base is provided, being formed in the silicon base multiple has the first of the first width
Groove and at least one second groove with the second width positioned at terminal, it is wide that second width is more than described first
Degree；2) dielectric layer is formed in the surface of the first groove second groove and silicon base；3) in the first groove and the second ditch
Deposit polycrystalline silicon in groove, until filling up the first groove, then the polysilicon be planarized to and expose the silicon substrate
The dielectric layer of bottom upper surface；4) dielectric layer of the silicon base upper surface is removed, exposes the upper surface of silicon base, second ditch
Retain polysilicon and dielectric layer in groove；5) schottky metal layer is formed in the silicon base upper surface, and forms schottky junction；6)
Metal electrode in making.
Preferably, in step 1), the trench schottky two is controlled by controlling the second width of the second groove
The decompression ability of the terminal of pole pipe.
Preferably, in step 1), second width is not less than 3 times of the first width.
Further, in step 1), second width is 5~10 times of first width.
Preferably, in step 2), using thermal oxidation process in the upper surface of the first groove second groove and silicon base
Silicon dioxide layer is formed, as dielectric layer, the thickness of the dioxide layer is 50nm~1000nm.
Preferably, in step 4), the dielectric layer of the silicon base upper surface is removed using wet corrosion technique, by described
Dielectric layer in the second groove of polysilicon protection is retained.
Preferably, in step 5), using schottky metal layer described in the method for quick heat treatment method or furnace annealing and institute
The interface for stating silicon base forms metal silicide, to form schottky junction；The material of the schottky metal layer include Pt, Ni,
One kind in Ti, Cr, W, Mo and Co.
Preferably, in step 6), the upper metal electrode connects each schottky junction and extended in the second groove, and
Terminate on the polysilicon of the second groove bottom.
The utility model also provides a kind of trench schottky diode, including：Silicon base, formed with more in the silicon base
The individual first groove with the first width and at least one second groove with the second width positioned at terminal, described second
Width is more than first width；Dielectric layer, it is formed at the first groove second groove surface；Polysilicon layer, it is filled in institute
State in first groove and be formed at the dielectric layer surface of the second groove；Schottky junction, be formed at the first groove it
Between silicon base surface；And upper metal electrode.
Preferably, the terminal of the trench schottky diode is controlled by controlling the second width of the second groove
Decompression ability.
Preferably, second width is not less than 3 times of the first width.
Preferably, second width is 5~10 times of first width.
Preferably, the dielectric layer is silicon dioxide layer, and the thickness of the dioxide layer is 50nm~1000nm.
Preferably, the polysilicon is the polysilicon of N-type heavy doping, and the doping concentration of the polysilicon layer is 1019~
1021/cm3。
Preferably, the upper metal electrode connects each schottky junction and extended in the second groove, and terminates at institute
On the polysilicon for stating second groove bottom.
As described above, trench schottky diode of the present utility model and preparation method thereof, has the advantages that：
1) the utility model in device terminal by setting a wider terminal trenches, and is directly made using gate oxide
For terminal interlayer dielectric layer, the independent process for growing terminal interlayer dielectric layer is needed in traditional handicraft so as to save；
2) surface is obtained using wet method full etching needed for the utility model schottky barrier layer, can save traditional fabrication institute
The mask layer and etching procedure needed, can significantly save manufacturing cost.
3) the utility model technique is simple, can effectively improve production efficiency, reduces manufacturing cost, is set in semiconductor devices
Meter and manufacturing field are with a wide range of applications.
Brief description of the drawings
Fig. 1 is shown as the structural representation of trench schottky diode of the prior art.
Fig. 2 is shown as the preparation method steps flow chart schematic diagram of trench schottky diode of the present utility model.
Fig. 3~Figure 10 is shown as each step institute of preparation method of the trench schottky diode of the utility model embodiment 1
The structural representation of presentation.
Figure 11 is shown as the structural representation of the trench schottky diode of the utility model embodiment 2.
Component label instructions
101 silicon bases
102 first grooves
103 second grooves
104 dielectric layers
105 polysilicons
106 schottky junctions
Metal electrode on 107
S11~S16 steps
Embodiment
Illustrate embodiment of the present utility model below by way of specific instantiation, those skilled in the art can be by this theory
Content disclosed by bright book understands other advantages and effect of the present utility model easily.The utility model can also be by addition
Different embodiments are embodied or practiced, and the various details in this specification can also be based on different viewpoints with answering
With, without departing from it is of the present utility model spirit under carry out various modifications or alterations.
Refer to Fig. 2~Figure 10.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of utility model, when the component relevant with the utility model is only shown in illustrating then rather than being implemented according to reality
Component count, shape and size are drawn, and it is actual when implementing kenel, quantity and the ratio of each component can be a kind of changing arbitrarily
Become, and its assembly layout kenel may also be increasingly complex.
Embodiment 1
As shown in Fig. 2~Figure 10, the present embodiment provides a kind of preparation method of trench schottky diode, the making side
Method includes：
As shown in Figure 2 to 4, step 1) S11 is carried out first, there is provided a silicon base 101, the shape in the silicon base 101
Into multiple first grooves 102 with the first width and at least one second groove with the second width positioned at terminal
103, second width is more than first width, as an example, can be the second of the second groove 103 wide by controlling
Spend to control the decompression ability of the terminal of the trench schottky diode.
As an example, providing the silicon base 101 includes：The silicon chip of a N-type heavy doping is provided, in the silicon chip table
Face forms the silicon epitaxy layer that N-type is lightly doped.In the present embodiment, the material of the substrate of the N-type heavy doping is silicon, its resistivity
No more than 0.01 ohmcm, between the thickness of the silicon epitaxy layer that the N-type is lightly doped is 2.5~30 μm, concentration 1014~
1017/cm3Between.The follow-up first groove 102 and second groove 103 is prepared in the outer silicon.
As an example, use photo etching process in the silicon base 101 at the same formed multiple first grooves 102 with
And a second groove 103 positioned at terminal, the width of the first groove 102 is 0.2~1 μm, and depth is 2.5~5.0 μm,
Specifically, the width of the first groove 102 is 0.5 μm, and depth is 3 μm.The flat shape of the groove can be trap shape, connect
Continuous strip, discontinuous strip or be the shapes such as the straight-flanked ring of sealing, circular rings.The width of the second groove 103
First width of the degree not less than 3 times, 5~10 times of preferably described first width.In the present embodiment, the second groove
103 width is 8 times of the width of first groove 102, and its width range is 4 μm, and depth is 3 μm.
As shown in figures 2 and 5, step 2) S12 is then carried out, in the second groove 103 of first groove 102 and silicon base
101 surface forms dielectric layer 104.
As an example, in step 2), using thermal oxidation process in the second groove 103 of first groove 102 and silicon base
101 upper surface forms silicon dioxide layer, and as dielectric layer 104, the thickness of the dioxide layer is 50nm~1000nm.It is located at
Gate dielectric material of the silicon dioxide layer on the surface of first groove 102 as groove type MOS pipe, positioned at the second groove
Dielectric of the silicon dioxide layer on 103 surfaces as terminal decompression ring structure.Therefore, the thickness of the silicon dioxide layer needs
Consider the performance of metal-oxide-semiconductor and the decompression performance of terminal decompression ring structure is designed, with the configuration being optimal.At this
In embodiment, the thickness of the dioxide layer is 150nm~300nm, the silicon dioxide layer in this thickness range, that is, be can guarantee that
The performance of metal-oxide-semiconductor, and can realize the decompression performance of preferably terminal decompression ring structure.
As shown in Fig. 2 and Fig. 6~Fig. 7, step 3) S13 is then carried out, in the first groove 102 and second groove 103
Middle deposit polycrystalline silicon 105, until filling up the first groove 102, then the polysilicon 105 be planarized to and expose institute
State the dielectric layer 104 of the upper surface of silicon base 101.
As an example, described polysilicon 105 is the polysilicon 105 of N-type heavy doping, and the doping of the polysilicon 105
Concentration is 1019~1021/cm3.In the present embodiment, the first groove 102 is filled up by the polysilicon 105, second ditch
Groove 103 only in described one layer of polysilicon 105 of silicon dioxide layer surface type layer, has the inside of the second groove 103 and housed
Space.
Expose the silicon substrate as an example, to the polysilicon 105 be planarized to using chemical mechanical polishing technique
The dielectric layer 104 of the upper surface of bottom 101, after polishing, the quilt of polysilicon 105 in the first groove 102 and second groove 103
Retain.
As shown in Fig. 2 and Fig. 8, step 4) S14 is then carried out, removes the dielectric layer 104 of the upper surface of silicon base 101,
Expose the upper surface of silicon base 101, retain polysilicon 105 and dielectric layer 104 in the second groove 103.
As an example, in step 4), the dielectric layer 104 of the upper surface of silicon base 101 is removed using wet corrosion technique,
It is retained by the dielectric layer 104 in the second groove 103 of the polysilicon 105 protection.Specifically, to the silicon base 101
Wet method is carried out entirely to corrode, being exposed to the dielectric layer 104 of the upper surface of the silicon base 101 can be corroded removals, and described in
Dielectric layer 104 in first groove 102 and in second groove 103 can be retained because surface is by the covering protection of polysilicon 105
Get off.
As shown in Fig. 2 and Fig. 9, step 5) S15 is then carried out, schottky metal is formed in the upper surface of silicon base 101
Layer, and form schottky junction 106.
As an example, using schottky metal layer described in the method for quick heat treatment method or furnace annealing and the silicon base
101 interface forms metal silicide, to form schottky junction 106.The material of the schottky metal layer be Pt, Ni, Ti,
One kind in Cr, W, Mo and Co.In the present embodiment, certain thickness is deposited by sputtering technology in the surface of silicon base 101
Pt, then Pt and the exposed surface of silicon base 101 is formed metallic silicon using the method for quick heat treatment method or furnace annealing
Compound, so as to form schottky junction 106.
As shown in Fig. 2 and Figure 10, step 6) S16 is then carried out, metal electrode 107 in making.
As an example, using the methods of sputtering, evaporation or it is incorporated into the surface of silicon base 101 and forms electrode layer, institute
Stating electrode layer includes TiN/AlSiCu/TiN/Ti/Ni/Ag laminations, TiN/AlSiCu laminations, TiN/AlCu/TiN/Ti/Ni/Ag
One kind in lamination, TiN/AlCu laminations, TiN/AlSi laminations or TiN/Al laminations.
As an example, in step 6), the upper metal electrode 107 connects each schottky junction 106 and extends to described second
In groove 103, and terminate on the polysilicon 105 of the bottom of second groove 103.
Then step 7) is carried out, is thinned to from the back side by the silicon chip between 30 microns to 600 microns.
Step 8) is finally carried out, after the metal multilayer films such as silicon chip back side deposit Ti/Ni/Ag, heating alloying
Backplate is formed, so as to complete device basic technology making step.
As shown in Figure 10, the present embodiment also provides a kind of trench schottky diode, including：Silicon base 101, the silicon substrate
In bottom 101 formed with multiple first grooves 102 with the first width and it is at least one positioned at terminal with the second width
Second groove 103, second width is more than first width；Dielectric layer 104, it is formed at the first groove 102
The surface of two groove 103；105 layers of polysilicon, it is filled in the first groove 102 and is formed at the second groove 103
The surface of dielectric layer 104；Schottky junction 106, the surface for the silicon base 101 being formed between the first groove 102；And upper gold
Belong to electrode 107.
As an example, the silicon base 101 includes the silicon chip of a N-type heavy doping and positioned at the silicon substrate surface
The silicon epitaxy layer that N-type is lightly doped.In the present embodiment, the resistivity of the silicon chip of the N-type heavy doping is no more than 0.01 ohm
Centimetre, between the thickness of the silicon epitaxy layer that the N-type is lightly doped is 2.5~30 μm, concentration 1014~1017/cm3Between.Subsequently
The first groove 102 and second groove 103 be prepared in the outer silicon.
As an example, control the trench schottky diode by controlling the second width of the second groove 103
Terminal decompression ability.As an example, the width of the first groove 102 is 0.2~1 μm, depth is 2.5~5.0 μm, tool
Body, the width of the first groove 102 is 0.5 μm, and depth is 3 μm.The flat shape of the groove can be trap shape, continuous
Strip, discontinuous strip or be the straight-flanked ring of sealing, the shape such as circular rings.The width of the second groove 103
The first width not less than 3 times, 5~10 times of preferably described first width.In the present embodiment, the second groove 103
Width be 8 times of the width of first groove 102, its width range is 4 μm, and depth is 3 μm.
As an example, the dielectric layer 104 is silicon dioxide layer, the thickness of the dioxide layer is 50nm~1000nm.
Gate dielectric material of the silicon dioxide layer as groove type MOS pipe positioned at the surface of first groove 102, positioned at second ditch
Dielectric of the silicon dioxide layer on the surface of groove 103 as terminal decompression ring structure.Therefore, the thickness of the silicon dioxide layer needs
Consider the performance of metal-oxide-semiconductor and the decompression performance of terminal decompression ring structure is designed, with the configuration being optimal.
In the present embodiment, the thickness of the dioxide layer is 150nm~300nm, the silicon dioxide layer in this thickness range, Ji Nengbao
The performance of metal-oxide-semiconductor is demonstrate,proved, and can realizes the decompression performance of preferably terminal decompression ring structure.
As an example, the upper metal electrode 107 connects each schottky junction 106 and extended in the second groove 103,
And terminate on the polysilicon 105 of the bottom of second groove 103.The material of the upper metal electrode 107 includes TiN/
AlSiCu/TiN/Ti/Ni/Ag laminations, TiN/AlSiCu laminations, TiN/AlCu/TiN/Ti/Ni/Ag laminations, TiN/AlCu are folded
One kind in layer, TiN/AlSi laminations or TiN/Al laminations.
As an example, the silicon chip back side is further prepared with the metal silicide for including the metal multilayer films such as Ti/Ni/Ag.
Embodiment 2
As shown in figure 11, the present embodiment provides a kind of preparation method of trench schottky diode, and its basic step is strictly according to the facts
Example 1 is applied, wherein, it is with the difference of embodiment 1, the second width of the second groove 103 is the 3 of first width
~5 times, step 3) S13 deposit polycrystalline silicon 105 in the first groove 102 and second groove 103, until filling up described first
Groove 102 and the second groove 103, i.e., described polysilicon 105 are filled with the first groove 102 and second groove simultaneously
103, the upper metal electrode 107 is directly terminated on the surface of polysilicon 105 of the second groove 103.
As shown in figure 11, the present embodiment also provides a kind of trench schottky diode, its basic structure such as embodiment 1, its
In, it is with the difference of embodiment 1, the second width of the second groove 103 is 3~5 times of first width, institute
State polysilicon 105 while be filled with the first groove 102 and second groove 103, the upper metal electrode 107 directly terminates
In on the surface of polysilicon 105 of the second groove 103.
As described above, trench schottky diode of the present utility model and preparation method thereof, has the advantages that：
1) the utility model in device terminal by setting a wider terminal trenches, and is directly made using gate oxide
For terminal interlayer dielectric layer 104, the independent work for growing terminal interlayer dielectric layer 104 is needed in traditional handicraft so as to save
Sequence；
2) surface is obtained using wet method full etching needed for the utility model schottky barrier layer, can save traditional fabrication institute
The mask layer and etching procedure needed, can significantly save manufacturing cost.
3) the utility model technique is simple, can effectively improve production efficiency, reduces manufacturing cost, is set in semiconductor devices
Meter and manufacturing field are with a wide range of applications.
So the utility model effectively overcomes various shortcoming of the prior art and has high industrial utilization.
Above-described embodiment only illustrative principle of the present utility model and its effect are new not for this practicality is limited
Type.Any person skilled in the art can all be carried out without prejudice under spirit and scope of the present utility model to above-described embodiment
Modifications and changes.Therefore, such as those of ordinary skill in the art without departing from the essence disclosed in the utility model
God and all equivalent modifications completed under technological thought or change, should be covered by claim of the present utility model.
Claims (7)
- A kind of 1. trench schottky diode, it is characterised in that including：Silicon base, formed with multiple first grooves with the first width and at least one positioned at terminal in the silicon base Second groove with the second width, second width are more than first width；Dielectric layer, it is formed at the first groove second groove surface；Polysilicon layer, it is filled in the first groove and is formed at the dielectric layer surface of the second groove；Schottky junction, the surface for the silicon base being formed between the first groove；AndUpper metal electrode.
- 2. trench schottky diode according to claim 1, it is characterised in that：By control the second groove Two width are to control the decompression ability of the terminal of the trench schottky diode.
- 3. trench schottky diode according to claim 1, it is characterised in that：Second width is not less than 3 times First width.
- 4. trench schottky diode according to claim 3, it is characterised in that：Second width is described first wide 5~10 times of degree.
- 5. trench schottky diode according to claim 1, it is characterised in that：The dielectric layer is silicon dioxide layer, The thickness of the dioxide layer is 50nm~1000nm.
- 6. trench schottky diode according to claim 1, it is characterised in that：The polysilicon is N-type heavy doping Polysilicon, and the doping concentration of the polysilicon layer is 1019~1021/cm3。
- 7. trench schottky diode according to claim 1, it is characterised in that：The upper metal electrode connects each Xiao Te Base junction is simultaneously extended in the second groove, and is terminated on the polysilicon of the second groove bottom.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720505633.7U CN206878007U (en) | 2017-05-09 | 2017-05-09 | trench schottky diode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720505633.7U CN206878007U (en) | 2017-05-09 | 2017-05-09 | trench schottky diode |
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| Publication Number | Publication Date |
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| CN206878007U true CN206878007U (en) | 2018-01-12 |
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ID=61339268
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107195692A (en) * | 2017-05-09 | 2017-09-22 | 中航（重庆）微电子有限公司 | Trench schottky diode and preparation method thereof |
| CN110047944A (en) * | 2019-04-25 | 2019-07-23 | 江阴新顺微电子有限公司 | A kind of the TMBS device architecture and manufacturing method of low cost |
-
2017
- 2017-05-09 CN CN201720505633.7U patent/CN206878007U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107195692A (en) * | 2017-05-09 | 2017-09-22 | 中航（重庆）微电子有限公司 | Trench schottky diode and preparation method thereof |
| CN110047944A (en) * | 2019-04-25 | 2019-07-23 | 江阴新顺微电子有限公司 | A kind of the TMBS device architecture and manufacturing method of low cost |
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Address after: 401331 No. 25 Xiyong Avenue, Shapingba District, Chongqing Patentee after: Huarun Microelectronics (Chongqing) Co., Ltd. Address before: 401331 No. 25 Xiyong Avenue, Xiyong Town, Shapingba District, Chongqing Patentee before: China Aviation (Chongqing) Microelectronics Co., Ltd. |