CN103943688B - A kind of Schottky barrier diode device structure and preparation method thereof - Google Patents
A kind of Schottky barrier diode device structure and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 18
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 8
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- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
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- 229920005591 polysilicon Polymers 0.000 claims description 4
- 230000005684 electric field Effects 0.000 abstract description 8
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- 229910000510 noble metal Inorganic materials 0.000 description 8
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 8
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- QKJXFFMKZPQALO-UHFFFAOYSA-N chromium;iron;methane;silicon Chemical compound C.[Si].[Cr].[Fe] QKJXFFMKZPQALO-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The present invention provides a kind of Schottky barrier diode device structure and preparation method thereof, and the device architecture includes:First conductivity type substrate;First conductive type epitaxial layer, is incorporated into the first conductivity type substrate surface;Several groove structures, including the groove in first conductive type epitaxial layer is formed at, the dielectric layer of the flute surfaces is incorporated into, and be filled in the conductive material in the groove;Second conduction type doped region, is formed at the first conductive type epitaxial layer top layer of the both sides of each groove structure;Schottky metal layer, is formed at the first conductive type epitaxial layer surface;And Top electrode.The present invention increases doped region by groove structure both sides, introduces P/N knots, the electric field in the region is reduced, so as to reduce reverse leakage current;Meanwhile, JFET structures are introduced between doped region, further improve the breakdown reverse voltage of Schottky barrier diode device structure and reduce reverse leakage current.
Description
Technical field
The invention belongs to semiconductor and field of semiconductor manufacture, more particularly to a kind of Schottky barrier diode device knot
Structure and preparation method thereof.
Background technology
With continuing to develop for semiconductor technology, power device is widely used in disk as a kind of new device
The fields such as driving, automotive electronics.Power device is required to bear larger voltage, electric current and power termination.And existing MOS
The devices such as transistor cannot meet the demand, therefore, in order to meet application the need for, various power devices turn into concern Jiao
Point.
Schottky diode is general being noble metal(Gold, silver, aluminium, platinum etc.)It is positive pole, with N-type semiconductor as negative pole, profit
The metal-semiconductor device that there is rectification characteristic and be made with the potential barrier formed on the two contact surface.Because being deposited in N-type semiconductor
In substantial amounts of electronics, in noble metal only have minimal amount of free electron, so electronics just from concentration N-type semiconductor high to
Spread in the low noble metal of concentration.Obviously, there is no hole in noble metal, just do not exist hole from metal to N-type semiconductor yet
Diffusion motion.As electronics is constantly diffused into noble metal from N-type semiconductor, N-type semiconductor sheet electron concentration is gradually reduced, table
Face electroneutral is destroyed, and then just forms potential barrier, and its direction of an electric field is N-type semiconductor → noble metal.But the electric field action it
Under, the electronics in noble metal can also produce the drift motion from noble metal → N-type semiconductor, so as to weaken due to diffusion motion
And the electric field for being formed.After the space-charge region of one fixed width is set up, the electronics drift motion that electric field causes is different with concentration
The electrons spread motion for causing reaches relative balance, just forms Schottky barrier.Schottky diode be a kind of low-power consumption,
Ultra-speed semiconductor device.Most outstanding feature is that reverse recovery time is extremely short(May diminish to several nanoseconds), forward conduction voltage drop
It is low.It is more as high frequency, low pressure, high current commutation diode, fly-wheel diode, protection diode, also has used in microwave communication
Used Deng commutation diode, small-signal detector diode is made in circuit.It is relatively common in communication power supply, frequency converter etc..
Power schottky device is a kind of semiconductor two terminal device for high current rectification, at present conventional power Xiao Te
Base device is made by the schottky junction between metal silicide and low-doped n type silicon, and metal silicide can be that platinum silication is closed
Thing, titanium-silicon compound, nickel-silicon compound and chrome-silicon compound etc..In recent years, due to the development of trench technique, various groove-shaped knots
Structure is used for the earth leakage protective ring of production unit Schottky junction structure, such as frequently with groove type MOS structure.Groove type MOS knot
The use of structure reduces the area of traditional PN junction protection ring, when the chip used area of device is identical, can reduce device just
To conduction voltage drop.
A kind of existing groove type MOS Schottky barrier diode device structure is as shown in figure 1, it includes:First is conductive
Type substrates 101;It is incorporated into first conductive type epitaxial layer 102 on the first conductivity type substrate surface;Several grooves
Structure 103, the groove structure includes the groove being formed in first conductive type epitaxial layer, is incorporated into the groove table
The dielectric layer in face, and it is filled in the conductive material in the groove;Schottky metal layer 105, is formed at described first conductive
Type epi-layer surface;And Top electrode 106, it is formed at the schottky metal layer surface.In addition, being also possible that field aoxidizes
The layer other structures such as 104.However, the reverse characteristic of the Schottky barrier diode device structure of said structure, such as reverse leakage
Often it is not so good as people's will in the performance such as stream and breakdown reverse voltage.
Therefore, the present invention provides a kind of new Schottky barrier diode device structure, to reduce existing Schottky
The reverse leakage current of barrier diode device structure, improves breakdown reverse voltage.
The content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of Schottky-barrier diode device
Part structure and preparation method thereof is big and anti-for solving Schottky barrier diode device structure reverse leakage current in the prior art
To the low problem of breakdown voltage.
In order to achieve the above objects and other related objects, the present invention provides a kind of Schottky barrier diode device structure,
Including:
First conductivity type substrate;
First conductive type epitaxial layer, is incorporated into the first conductivity type substrate surface;
Several groove structures, including the groove in first conductive type epitaxial layer is formed at, it is incorporated into the ditch
The dielectric layer of rooved face, and it is filled in the conductive material in the groove;
Second conduction type doped region, is formed at the first conductive type epitaxial layer table of the both sides of each groove structure
Layer;
Schottky metal layer, is formed at the first conductive type epitaxial layer surface;
Top electrode, is formed at the schottky metal layer surface.
Used as a kind of preferred scheme of Schottky barrier diode device structure of the invention, first conduction type is
N-type, the second conduction type is p-type.
Further, first conductivity type substrate is N+ type substrates, and first conductive type epitaxial layer is N-type
Epitaxial layer, the second conduction type doped region is P+ type doped region.
As a kind of preferred scheme of Schottky barrier diode device structure of the invention, the schottky metal layer
Material is Ti, Pt, Ni, Cr, W, Mo or Co.
As a kind of preferred scheme of Schottky barrier diode device structure of the invention, the first conduction type lining
The material of bottom and the first conductive type epitaxial layer is silicon, and the material of the dielectric layer is silica, and the conductive material is many
Crystal silicon.
The present invention also provides a kind of preparation method of Schottky barrier diode device structure, including step:
1)First conductivity type substrate is provided, the first conductive type epitaxial layer is formed in the surface;
2)The mask layer with several windows is formed in the first conductive type epitaxial layer surface, and carries out second and led
Electric types of ion injects and anneals to form the second conduction type doped region;
3)Several grooves are formed in first conductive type epitaxial layer by the mask layer, in the groove table
Face forms dielectric layer, and in filling conductive material layer in the groove;
4)Schottky metal layer is formed in the first conductive type epitaxial layer surface;
5)Front electrode layer is formed in the schottky metal layer and each flute surfaces.
As a kind of preferred scheme of the preparation method of Schottky barrier diode device structure of the invention, described first
Conduction type is N-type, and the second conduction type is p-type.
As a kind of preferred scheme of the preparation method of Schottky barrier diode device structure of the invention, described first
Conductivity type substrate is N+ type substrates, and first conductive type epitaxial layer is N-type epitaxial layer, and second conduction type is mixed
Miscellaneous area is P+ type doped region.
As a kind of preferred scheme of the preparation method of Schottky barrier diode device structure of the invention, the Xiao Te
The material of base metal layer is Ti, Pt, Ni, Cr, W, Mo or Co.
As a kind of preferred scheme of the preparation method of Schottky barrier diode device structure of the invention, described first
The material of conductivity type substrate and the first conductive type epitaxial layer is silicon, and the material of the dielectric layer is silica, described to lead
Electric material is polysilicon.
As described above, the present invention provides a kind of Schottky barrier diode device structure and preparation method thereof, the device
Structure includes:First conductivity type substrate;First conductive type epitaxial layer, is incorporated into the first conductivity type substrate surface;
Several groove structures, including the groove in first conductive type epitaxial layer is formed at, it is incorporated into the flute surfaces
Dielectric layer, and it is filled in the conductive material in the groove;Second conduction type doped region, is formed at each groove structure
Both sides the first conductive type epitaxial layer top layer;Schottky metal layer, is formed at the first conductive type epitaxial layer surface;
And Top electrode, it is formed at the schottky metal layer surface.The present invention increases doped region by groove structure both sides, introduces
P/N is tied, and the electric field in region between groove structure and epitaxial layer is reduced, so as to reduce reverse leakage current;Meanwhile, doped region it
Between formed JFET structures, can further improve Schottky barrier diode device structure breakdown reverse voltage and reduce reversely
Leakage current.Structure of the present invention and step are simple, effect is significant, thus have broad application prospects.
Brief description of the drawings
Fig. 1 is shown as a kind of structural representation of Schottky barrier diode device structure of the prior art.
Fig. 2 is shown as the structural representation of Schottky barrier diode device structure of the invention.
Each step of preparation method that Fig. 3~Figure 12 is shown as Schottky barrier diode device structure of the invention is presented
Structural representation.
Component label instructions
101 first conductivity type substrates
102 first conductive type epitaxial layers
103 groove structures
1031 dielectric layers
1032 conductive materials
104 field oxides
105 schottky metal layers
106 Top electrodes
107 second conduction type doped regions
201 SiO2Layer
202 SiN layers
Specific embodiment
Embodiments of the present invention are illustrated below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages of the invention and effect easily.The present invention can also be by specific realities different in addition
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Refer to Fig. 2~Figure 12.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, package count when only display is with relevant component in the present invention rather than according to actual implementation in schema then
Mesh, shape and size are drawn, and the kenel of each component, quantity and ratio can be a kind of random change during its actual implementation, and its
Assembly layout kenel is likely to increasingly complex.
As shown in Fig. 2 the present embodiment provides a kind of Schottky barrier diode device structure, including:
First conductivity type substrate 101;
First conductive type epitaxial layer 102, is incorporated into the surface of the first conductivity type substrate 101;
Several groove structures 103, including the groove in first conductive type epitaxial layer 102 is formed at, it is incorporated into
The dielectric layer 1031 of the flute surfaces, and it is filled in the conductive material 1032 in the groove;
Second conduction type doped region 107, is formed at the first conduction type extension of the both sides of each groove structure 103
102 top layer of layer;
Schottky metal layer 105, is formed at the surface of the first conductive type epitaxial layer 102;
Top electrode 106, is formed at the surface of the schottky metal layer 105.
As an example, the material of the conductive type epitaxial layer 102 of first conductivity type substrate 101 and first is silicon.When
So, in other examples, the material of the conductive type epitaxial layer 102 of first conductivity type substrate 101 and first can be with
It is such as germanium silicon, carborundum material, and is not limited to recited herein several.
The flat shape of the groove structure 103 can for trap shape, continuous strip, discontinuous strip or
It is the shapes such as rectangle, the circle of sealing.The material of the dielectric layer 1031 is silica, and the conductive material 1032 is polycrystalline
Silicon.The conductive material 1032 is connected with the Top electrode 106.
The second conduction type doped region 107, is formed at the both sides of each groove structure 103, and adjacent two
Second conduction type doped region 107 is respectively provided with default spacing.
As an example, first conduction type is N-type, the second conduction type is p-type.Further, described first lead
Electric type substrates 101 are N+ type substrates, and first conductive type epitaxial layer 102 is N-type epitaxial layer, second conductive-type
Type doped region 107 is P+ type doped region.Schottky barrier diode device structure for more than, the P+ type doped region and institute
State and can be formed between N-type epitaxial layer P/N knots, the electric field in region between groove structure 103 and epitaxial layer is reduced, so as to reduce
Reverse leakage current;In addition, N-type epitaxial layer between two adjacent P+ type doped regions, two adjacent P+ type doped regions and
The JFET structures of its surface schottky metal layer 105 composition, can further improve Schottky barrier diode device structure
Breakdown reverse voltage simultaneously reduces reverse leakage current.
Certainly, in other examples, first conduction type can be p-type, and second conduction type can be with
It is N-type, can be changed according to actual demand, meets different use occasions.
As an example, the material of the schottky metal layer 105 is Ti, Pt, Ni, Cr, W, Mo or Co.
As an example, the Schottky barrier diode device structure also includes being incorporated into first conductivity type substrate
The material of the bottom electrode at 101 back sides, the Top electrode 106 and bottom electrode can be Cu, Al etc., and be not limited to recited herein
It is several.
As an example, the Schottky barrier diode device structure also includes being incorporated into the first conduction type extension
The field oxide 104 of 102 side of layer.
As shown in Fig. 3~Figure 12, the present embodiment also provides a kind of preparation method of Schottky barrier diode device structure,
Including step:
As shown in figure 3, carrying out step 1 first), there is provided the first conductivity type substrate 101, form first in the surface and lead
Electric type epitaxial layer 102.
As an example, the material of the conductive type epitaxial layer 102 of first conductivity type substrate 101 and first is silicon.When
So, in other examples, the material of the conductive type epitaxial layer 102 of first conductivity type substrate 101 and first can be with
It is such as germanium silicon, carborundum material, and is not limited to recited herein several.In the present embodiment, first conductive-type
Type is N-type, and the second conduction type is p-type.Specifically, first conductivity type substrate 101 is N+ type substrates, and described first leads
Electric type epitaxial layer 102 is N-type epitaxial layer.
As shown in Fig. 4~Fig. 6, step 2 is then carried out), being formed in the surface of the first conductive type epitaxial layer 102 has
The mask layer of several windows, and carry out the second conductive type ion and inject and anneal to form the second conduction type doped region 107.
Specifically, including step:
2-1)Hard mask layer is formed in the surface of the first conductive type epitaxial layer 102, the hard mask layer is SiO2Layer
201 laminations constituted with SiN layer 202;
2-2)Photoresist is formed in the hard mask layer surface, and between being formed in the hard mask layer by photoetching process
Every several windows of arrangement;
2-3)By described several windows, carry out the second conductive type ion and inject and form after carrying out annealing diffusion
Two conduction type doped regions 107, in the present embodiment, the second conduction type doped region 107 is P+ type doped region.
As shown in Fig. 7~Figure 10, step 3 is then carried out), by the mask layer in first conductive type epitaxial layer
Several grooves are formed in 102, dielectric layer 1031 is formed in the flute surfaces, and in filling conductive material in the groove
1032 layers.
Specifically, including step:
3-1)By the hard mask layer with several windows, using dry etch process in first conductive-type
Several grooves are formed in type epitaxial layer 102, as shown in Figure 7;
3-2)The hard mask layer is removed using dry etching or wet corrosion technique, then by thermal oxidation technology or change
Learn depositing operation and form silicon dioxide layer in the flute surfaces, as dielectric layer 1031, as shown in Figure 8;
3-3)Using depositing operation in filling polysilicon in the groove, as 1032 layers of conductive material, as shown in Figure 9;
3-4)Using the polycrystalline for going back to carving technology or the wet corrosion technique removal surface of the first conductive type epitaxial layer 102
Silicon and silica, expose the surface of the first conductive type epitaxial layer 102, as shown in Figure 10.
As shown in figure 11, step 4 is then carried out), Schottky gold is formed in the surface of the first conductive type epitaxial layer 102
Category layer 105.
Specifically, layer of metal, Ran Houtong are formed in the surface of the first conductive type epitaxial layer 102 using sputtering technology
Crossing annealing process makes the metal form Ohmic contact with first conductive type epitaxial layer 102, forms schottky metal layer
105.As an example, the material of the schottky metal layer 105 is Ti, Pt, Ni, Cr, W, Mo or Co etc..In the present embodiment,
The material of the schottky metal layer 105 is Ti.
As shown in figure 12, step 5 is finally carried out), formed just in the schottky metal layer 105 and each flute surfaces
Face electrode layer.
As an example, also including the step of forming field oxide 104 with the side of the first conductive type epitaxial layer 102.
As an example, the material of the front electrode layer is Cu or Al etc..
In addition, the step of the present embodiment is also included in the formation of the first conductivity type substrate 101 bottom electrode, the lower electricity
The material of pole is Cu or Al etc..
As described above, the present invention provides a kind of Schottky barrier diode device structure and preparation method thereof, the device
Structure includes:First conductivity type substrate 101;First conductive type epitaxial layer 102, is incorporated into first conductivity type substrate
101 surfaces;Several groove structures 103, including the groove in first conductive type epitaxial layer 102 is formed at, it is incorporated into
The dielectric layer 1031 of the flute surfaces, and it is filled in the conductive material 1032 in the groove;Second conduction type adulterates
Area 107, is formed at the top layer of the first conductive type epitaxial layer 102 of the both sides of each groove structure 103;Schottky metal layer
105, it is formed at the surface of the first conductive type epitaxial layer 102;And Top electrode 106, it is formed at the schottky metal layer
105 surfaces.The present invention increases doped region by the both sides of groove structure 103, introduces P/N knots, reduces groove structure 103 and outer
Prolong the electric field in region between layer, so as to reduce reverse leakage current;Meanwhile, JFET structures are formed between doped region, one can be entered
Step improves the breakdown reverse voltage of Schottky barrier diode device structure and reduces reverse leakage current.Structure of the present invention and step
Simply, effect is significant, thus have broad application prospects.So, the present invention effectively overcomes of the prior art a variety of scarce
Put and have high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
The personage for knowing this technology all can carry out modifications and changes under without prejudice to spirit and scope of the invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete with institute under technological thought without departing from disclosed spirit such as
Into all equivalent modifications or change, should be covered by claim of the invention.
Claims (8)
1. a kind of Schottky barrier diode device structure, it is characterised in that including:
First conductivity type substrate;
First conductive type epitaxial layer, is incorporated into the first conductivity type substrate surface;
Several groove structures, including the groove in first conductive type epitaxial layer is formed at, it is incorporated into the groove table
The dielectric layer in face, and it is filled in the conductive material in the groove;
Second conduction type doped region, is formed at the first conductive type epitaxial layer top layer of the both sides of each groove structure;
Schottky metal layer, is formed at the first conductive type epitaxial layer surface, wherein, the material of the schottky metal layer
It is Ti, Pt, Ni, Cr, W, Mo or Co, Ohmic contact is formed by annealing process and first conductive type epitaxial layer, it is adjacent
Two the second conduction type doped regions, two adjacent the second conduction type doped regions between the first conductive type epitaxial layer
And schottky metal layer composition JFET structures;
Top electrode, is formed at the schottky metal layer surface.
2. Schottky barrier diode device structure according to claim 1, it is characterised in that:First conduction type
It is N-type, the second conduction type is p-type.
3. Schottky barrier diode device structure according to claim 2, it is characterised in that:First conduction type
Substrate is N+ type substrates, and first conductive type epitaxial layer is N-type epitaxial layer, and the second conduction type doped region is P+
Type doped region.
4. Schottky barrier diode device structure according to claim 1, it is characterised in that:First conduction type
The material of substrate and the first conductive type epitaxial layer is silicon, and the material of the dielectric layer is silica, and the conductive material is
Polysilicon.
5. a kind of preparation method of Schottky barrier diode device structure, it is characterised in that including step:
1) the first conductivity type substrate is provided, the first conductive type epitaxial layer is formed in the substrate surface;
2) mask layer with several windows is formed in the first conductive type epitaxial layer surface, and carries out the second conductive-type
Type ion implanting simultaneously anneals to form the second conduction type doped region;
3) several grooves are formed in first conductive type epitaxial layer based on the mask layer, in the flute surfaces shape
Into dielectric layer, and in filling conductive material layer in the groove;
4) schottky metal layer is formed in the first conductive type epitaxial layer surface, wherein, the material of the schottky metal layer
Expect to be Ti, Pt, Ni, Cr, W, Mo or Co, Ohmic contact, phase are formed with first conductive type epitaxial layer by annealing process
The first conduction type extension between adjacent two the second conduction type doped regions, two adjacent the second conduction type doped regions
Layer and schottky metal layer composition JFET structures;
5) front electrode layer is formed in the schottky metal layer and each flute surfaces.
6. the preparation method of Schottky barrier diode device structure according to claim 5, it is characterised in that:Described
One conduction type is N-type, and the second conduction type is p-type.
7. the preparation method of Schottky barrier diode device structure according to claim 6, it is characterised in that:Described
One conductivity type substrate is N+ type substrates, and first conductive type epitaxial layer is N-type epitaxial layer, second conduction type
Doped region is P+ type doped region.
8. the preparation method of Schottky barrier diode device structure according to claim 5, it is characterised in that:Described
The material of one conductivity type substrate and the first conductive type epitaxial layer is silicon, and the material of the dielectric layer is silica, described
Conductive material is polysilicon.
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CN107256886A (en) * | 2017-07-12 | 2017-10-17 | 付妮娜 | Groove-type Schottky diode and preparation method thereof |
CN107403728A (en) * | 2017-08-28 | 2017-11-28 | 广微集成技术(深圳)有限公司 | Semiconductor element and manufacture method |
CN110890277B (en) * | 2018-09-07 | 2022-05-10 | 无锡华润上华科技有限公司 | Preparation method of groove type metal oxide semiconductor Schottky barrier transistor |
CN109585570A (en) * | 2018-12-19 | 2019-04-05 | 吉林麦吉柯半导体有限公司 | The manufacturing method of Schottky diode, NIPT95 alloy and Schottky diode |
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CN113471301B (en) * | 2020-03-31 | 2023-10-17 | 比亚迪半导体股份有限公司 | Trench Schottky diode and preparation method thereof |
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