CN107256886A - Groove-type Schottky diode and preparation method thereof - Google Patents
Groove-type Schottky diode and preparation method thereof Download PDFInfo
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- CN107256886A CN107256886A CN201710564660.6A CN201710564660A CN107256886A CN 107256886 A CN107256886 A CN 107256886A CN 201710564660 A CN201710564660 A CN 201710564660A CN 107256886 A CN107256886 A CN 107256886A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 238000000407 epitaxy Methods 0.000 claims abstract description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 32
- 229920005591 polysilicon Polymers 0.000 claims abstract description 32
- 238000002347 injection Methods 0.000 claims abstract description 30
- 239000007924 injection Substances 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 13
- 230000003647 oxidation Effects 0.000 claims abstract description 7
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 238000001312 dry etching Methods 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 73
- 230000005684 electric field Effects 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 238000011084 recovery Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000010891 electric arc Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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Abstract
The present invention relates to a kind of groove-type Schottky diode and preparation method thereof.The groove-type Schottky diode includes N-type substrate, is formed at the N-type epitaxy layer on the N-type substrate surface, the multiple grooves being formed in the N-type epitaxy layer, the polysilicon, the p-type injection zone on the N-type epitaxy layer surface being formed between two adjacent grooves and the metal level being formed on the oxide layer, the polysilicon and the p-type injection zone that are formed at the oxide layer of each grooved inner surface, are formed in the groove and are arranged at the oxidation layer surface.
Description
【Technical field】
The present invention relates to semiconductor device processing technology field, especially, be related to a kind of groove-type Schottky diode and
Its preparation method.
【Background technology】
Power diode is the critical component of circuit system, is widely used in high-frequency inverter, digital product, generating
It is mechanical, electrical to regard the various advanced weaponry control systems such as the product for civilian use and satellite receiver, guided missile and aircraft and the instrument and meters such as machine
The military scenario of equipment.Power diode is just expanded towards two important directions：(1) develop to several ten million or even up to ten thousand amperes,
It can be applied to the occasions such as high-temperature electric arc wind-tunnel, resistance welder；(2) reverse recovery time is shorter and shorter, present to ultrafast, ultra-soft,
Super durable direction is developed, and makes itself to be applied not only to rectification occasion, there is not same-action in various on-off circuits.It is low in order to meet
The application requirements such as power consumption, high frequency, high temperature, miniaturization are to the pressure-resistant of its, conducting resistance, unlatching pressure drop, reverse recovery characteristic, high temperature
The more and more highers such as characteristic.
Commonly used has common commutation diode, Schottky diode, PIN diode.They, which are compared to each other, respectively spy
Point:Schottky Rectifier has relatively low on-state voltage drop, and larger leakage current, reverse recovery time is almost nil.And PIN is extensive soon
Multiple rectifying tube has faster reverse recovery time, but its on-state voltage drop is very high.
Groove-type Schottky diode, in the device, electric-field intensity distribution is changed by electric field depletion action, by electricity
The maximum of field intensity, to the inside of silicon, restrained effectively Xiao occurred under reverse biased from schottky junction position transfer
Special base potential barrier reduces effect, so as to reduce the reverse leakage current of schottky junction；On the other hand, groove-type Schottky diode is also
The maximum of electric-field intensity in active area can be reduced, so as to realize the increase of diode reverse breakdown voltage, therefore, is being ensured
On the premise of maintaining same breakdown voltage, the epitaxial layer for comparing high-dopant concentration can be used, so as to realize relatively low positive guide
Be powered pressure.However, the device performance for how improving groove-type Schottky diode is an important problem.
【The content of the invention】
The present invention proposes groove-type Schottky diode and preparation method thereof, improves device performance.
A kind of groove-type Schottky diode, it includes N-type substrate, is formed at the N-type extension on the N-type substrate surface
Layer, be formed in the N-type epitaxy layer multiple grooves, be formed at the oxide layer of each grooved inner surface, be formed at the ditch
In groove and be arranged at it is described oxidation layer surface polysilicon, the P on the N-type epitaxy layer surface being formed between two adjacent grooves
Type injection zone, the metal level being formed on the oxide layer and the polysilicon and the p-type injection zone.
In one embodiment, the groove includes Part I and second above the Part I
Point, the groove width of the Part II is more than the groove width of the Part I, and the oxide layer is formed at described first
In the groove of the inner surface of part of trench and the Part II.
In one embodiment, the polysilicon is located in the groove of the Part I, and the metal level is extended to
In the groove of the Part II.
In one embodiment, the p-type injection region connects the oxide layer in the Part II of two adjacent grooves.
In one embodiment, the p-type injection region includes first area and second area, and the second area is located at
Above the first area, the second area connects the oxide layer in the Part II of two adjacent grooves, described
First area is located between the Part I of two adjacent grooves.
A kind of preparation method of groove-type Schottky diode, it comprises the following steps：
N-type substrate is provided, N-type epitaxy layer is formed on the N-type substrate surface, oxygen is prepared in the N types epi-layer surface
Change layer；
In described first oxidation layer surface the first photoresist of formation, and photoetching is carried out to first photoresist, formation is covered
Film；
Wet etching is carried out to first oxide layer using the mask of first photoresist formation；
Dry etching is carried out to the N-type epitaxy layer as mask using first photoresist and first oxide layer
The multiple grooves being located in the N-type epitaxy layer are formed, the first photoresist is removed；
Thermal oxide is carried out to the N-type epitaxy layer so as in the multiple flute surfaces the second oxide layer of formation；
In the multiple groove and it is described second oxidation layer surface formation polysilicon, remove the first oxide layer；
N-type epitaxy layer surface between the multiple groove carries out p-type ion implanting formation P type injection zones；And
Metal level is formed on the p-type injection zone, second oxide layer and the polysilicon.
In one embodiment, polysilicon is formed in the multiple groove, the step of removing the first oxide layer includes：
N-type epitaxy layer surface in the multiple groove and between groove forms polysilicon layer；And
The polysilicon layer on the N-type epitaxy layer surface between groove described in dry etching and first oxide layer are so as to remove
The polysilicon layer on the N-type epitaxy layer surface between the groove and first oxide layer simultaneously obtain described many in groove
Crystal silicon.
In one embodiment, the groove includes Part I and second above the Part I
Point, the groove width of the Part II is more than the groove width of the Part I, and second oxide layer is formed at described
In the groove of the inner surface of Part I groove and the Part II.
In one embodiment, the polysilicon is located in the groove of the Part I, and the metal level is extended to
In the groove of the Part II, the p-type injection region connects the second oxide layer in the Part II of two adjacent grooves.
In one embodiment, the p-type injection region includes first area and second area, and the second area is located at
Above the first area, the second area connects the second oxide layer in the Part II of two adjacent grooves,
The first area is located between the Part I of two adjacent grooves.
Groove-type Schottky diode of the present invention on the basis of traditional groove type Schottky diode structure, groove it
Between carry out ion implanting formation p-type injection zone formation Ohmic contact.Compared with conventional groove formula Schottky diode, identical
Maximum field strength under voltage in device of the present invention still device lower channel bottom margin, but the value of maximum field strength has drop
Low, the Ohmic contact between groove is improved voltage endurance capability by the protection of p-type injection zone, so the breakdown voltage increase of device.
Leakage current appears in groove and Ohmic contact position, but groove-type Schottky diode of the present invention and biography before device does not puncture
System groove-type Schottky diode is compared, and the electric field intensity value at diverse location has all declined, it is possible to effectively weaken
Schottky barrier reduces effect, so as to realize lower leakage current.
【Brief description of the drawings】
Technical scheme in order to illustrate the embodiments of the present invention more clearly, embodiment will be described below used in
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ability
For the those of ordinary skill of domain, on the premise of not paying creative work, it can also be obtained according to these accompanying drawings other attached
Figure, wherein：
Fig. 1 is the structural representation of groove-type Schottky diode of the present invention.
Fig. 2 is the flow chart of the preparation method of groove-type Schottky diode shown in Fig. 1.
Fig. 3-Figure 10 is the structural representation of each step of preparation method shown in Fig. 2.
【Main element symbol description】
Groove-type Schottky diode 100；N-type substrate 101；N-type epitaxy layer 102；Groove 103；Oxide layer 104,111；
Polysilicon 105；P-type injection zone 106；Metal level 107；Part I 1031；Part II 1032；First area 1061；The
The step S1 of two region 1062~S8
【Embodiment】
The technical scheme in the embodiment of the present invention will be clearly and completely described below, it is clear that described implementation
Example is only a part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, this area is common
All other embodiment that technical staff is obtained under the premise of creative work is not made, belongs to the model that the present invention is protected
Enclose.
Referring to Fig. 1, Fig. 1 is the structural representation of groove-type Schottky diode 100 of the present invention.The plough groove type Xiao Te
Based diode 100 includes N-type substrate 101, is formed at the N-type epitaxy layer 102 on the surface of N types substrate 101, is formed at the N
Multiple grooves 103 in type epitaxial layer 102, it is formed at the oxide layer 104 of each inner surface of groove 103, is formed at the groove
In 103 and it is arranged at the polysilicon 105 on the surface of oxide layer 104, outside the N-type being formed between two adjacent grooves 103
Prolong the p-type injection zone 106 on the surface of layer 102 and be formed at the oxide layer 104, the polysilicon 105 and p-type injection
Metal level 107 on region 106.
The groove 103 includes Part I 1031 and the Part II 1032 positioned at the top of Part I 1031,
The groove width of the Part II 1032 is more than the groove width of the Part I 1031, and the oxide layer 104 is formed at
In the inner surface of the groove of Part I 1031 and the groove of the Part II 1032.
The polysilicon 105 is located in the groove of the Part I 1031, and the metal level 107 extends to described the
In the groove of two parts 1032.
The p-type injection region 106 connects the oxide layer 104 in the Part II 1032 of two adjacent grooves 103.It is described
P-type injection region 106 includes first area 1061 and second area 1062, and the second area 1062 is located at the first area
1061 tops, the second area 1062 connects the oxide layer in the Part II 1032 of two adjacent grooves 103
104, the first area 1061 is located between the Part I 1031 of two adjacent grooves 103.
Fig. 2-Figure 10 is referred to, Fig. 2 is the flow chart of the preparation method of groove-type Schottky diode 100 shown in Fig. 1, schemed
3- Figure 10 is the structural representation of each step of preparation method shown in Fig. 2.The making side of the groove-type Schottky diode 100
Method comprises the following steps S1~S8.
Step S1, referring to Fig. 3, providing N-type substrate 101, N-type epitaxy layer is formed on the surface of N-type substrate 101
102, prepare the first oxide layer 111 on the surface of N-type epitaxy layer 102.First oxide layer 111 is silicon dioxide layer.
Step S2, referring to Fig. 4, the first photoresist is formed on the surface of the first oxide layer 111, and to first light
Photoresist carries out photoetching, forms mask.
Step S3, referring to Fig. 5, being carried out using the mask of first photoresist formation to first oxide layer 111
Wet etching, so as to form multiple etching groove windows through first oxide layer 111 in first oxide layer 111
112。
Step S4, referring to Fig. 6, by the use of first photoresist and first oxide layer 111 as mask to described
N-type epitaxy layer 102 carries out multiple grooves 103 that dry etching formation is located in the N-type epitaxy layer 102, removes the first photoetching
Glue.
Step S5, referring to Fig. 7, carrying out thermal oxide to the N-type epitaxy layer 102 so as in the multiple table of groove 103
Face forms the second oxide layer (i.e. described oxide layer 104).
Step S6, in the multiple groove 103 and the surface of the second oxide layer 104 formed polysilicon, remove first
Oxide layer 111.Specifically, Fig. 8 and Fig. 9 is referred to, the step S6 includes：
The surface of N-type epitaxy layer 102 in the multiple groove 103 and between groove 103 forms polysilicon layer；And
The polysilicon layer and first oxide layer on the surface of N-type epitaxy layer 102 between groove 103 described in dry etching
111 so as to remove the polysilicon layer and first oxide layer 111 on the surface of N-type epitaxy layer 102 between the groove 103 and obtain
Obtain the polysilicon 105 being located in groove 103.
Step S7, referring to Fig. 10, the surface of N-type epitaxy layer 102 between the multiple groove 103 carries out p-type ion
Injection forms p-type injection zone 106.
Step S8, referring to Fig. 1, in the p-type injection zone 106, second oxide layer 104 and the polysilicon
Metal level 107 is formed on 105.
Groove-type Schottky diode 100 of the present invention is on the basis of traditional groove type Schottky diode structure, in ditch
Ion implanting formation p-type injection zone 106 is carried out between groove 103 and forms Ohmic contact.With conventional groove formula Schottky diode
Compare, the maximum field strength under identical voltage in device of the present invention still device lower channel 103 bottom margin, it is but maximum
The value of field strength has the Ohmic contact between reduction, groove 103 to be improved voltage endurance capability by the protection of p-type injection zone 106, so device
The breakdown voltage increase of part.Leakage current appears in groove 103 and Ohmic contact position, but ditch of the present invention before device does not puncture
Slot type Schottky diode 100 is compared with conventional groove formula Schottky diode, and the electric field intensity value at diverse location is all
Decline, it is possible to effectively weaken Schottky barrier reduction effect, so as to realize lower leakage current.
Above-described is only embodiments of the present invention, it should be noted here that for one of ordinary skill in the art
For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to the protection model of the present invention
Enclose.
Claims (10)
1. a kind of groove-type Schottky diode, it is characterised in that：The groove-type Schottky diode includes N-type substrate, shape
The N-type epitaxy layer on N-type substrate surface, the multiple grooves being formed in the N-type epitaxy layer described in Cheng Yu, it is formed at each groove
The oxide layer of inner surface, be formed in the groove and be arranged at it is described oxidation layer surface polysilicon, be formed at adjacent two
The p-type injection zone on the N-type epitaxy layer surface between individual groove and it is formed at the oxide layer, the polysilicon and the p-type
Metal level on injection zone.
2. groove-type Schottky diode as claimed in claim 1, it is characterised in that：The groove includes Part I and position
Part II above the Part I, the groove width of the Part II is more than the ditch groove width of the Part I
Degree, the oxide layer is formed in the groove of the inner surface of the Part I groove and the Part II.
3. groove-type Schottky diode as claimed in claim 2, it is characterised in that：The polysilicon is located at described first
In the groove divided, the metal level is extended in the groove of the Part II.
4. groove-type Schottky diode as claimed in claim 2, it is characterised in that：The p-type injection region connection is adjacent
Oxide layer in the Part II of two grooves.
5. groove-type Schottky diode as claimed in claim 4, it is characterised in that：The p-type injection region includes the firstth area
Domain and second area, the second area are located above the first area, described adjacent two of second area connection
Oxide layer in the Part II of groove, the first area is located between the Part I of two adjacent grooves.
6. a kind of preparation method of groove-type Schottky diode, it comprises the following steps：
N-type substrate is provided, N-type epitaxy layer is formed on the N-type substrate surface, oxide layer is prepared on the N-type epitaxy layer surface；
In described first oxidation layer surface the first photoresist of formation, and photoetching is carried out to first photoresist, form mask；
Wet etching is carried out to first oxide layer using the mask of first photoresist formation；
Dry etching is carried out using first photoresist and first oxide layer to the N-type epitaxy layer as mask to be formed
Multiple grooves in the N-type epitaxy layer, remove the first photoresist；
Thermal oxide is carried out to the N-type epitaxy layer so as in the multiple flute surfaces the second oxide layer of formation；
In the multiple groove and it is described second oxidation layer surface formation polysilicon, remove the first oxide layer；
N-type epitaxy layer surface between the multiple groove carries out p-type ion implanting formation p-type injection zone；And
Metal level is formed on the p-type injection zone, second oxide layer and the polysilicon.
7. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that：In the multiple groove
Middle formation polysilicon, the step of removing the first oxide layer includes：
N-type epitaxy layer surface in the multiple groove and between groove forms polysilicon layer；And
The polysilicon layer on the N-type epitaxy layer surface between groove described in dry etching and first oxide layer are described so as to remove
The polysilicon layer on the N-type epitaxy layer surface between groove and first oxide layer simultaneously obtain the polycrystalline being located in groove
Silicon.
8. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that：The groove includes the
A part and the Part II above the Part I, the groove width of the Part II are more than the Part I
Groove width, second oxide layer is formed at the inner surface of the Part I groove and the groove of the Part II
In.
9. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that：The polysilicon is located at
In the groove of the Part I, the metal level is extended in the groove of the Part II, and the p-type injection region connects phase
The second oxide layer in the Part II of two adjacent grooves.
10. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that：The p-type injection region
Including first area and second area, the second area is located above the first area, and the second area connection is described
The second oxide layer in the Part II of two adjacent grooves, the first area is located at the of two adjacent grooves
Between a part.
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| CN201710564660.6A CN107256886A (en) | 2017-07-12 | 2017-07-12 | Groove-type Schottky diode and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109801958A (en) * | 2019-01-21 | 2019-05-24 | 厦门市三安集成电路有限公司 | A kind of silicon carbide trench schottky diode device and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030193074A1 (en) * | 2001-06-01 | 2003-10-16 | Hshieh Fwu-Luan | Trench schottky rectifier |
| CN103199119A (en) * | 2012-01-06 | 2013-07-10 | 朱江 | Groove schottky semiconductor device with super junction structure and manufacturing method thereof |
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| WO2020151475A1 (en) * | 2019-01-21 | 2020-07-30 | 厦门市三安集成电路有限公司 | Sic trench schottky diode device and preparation method thereof |
| CN109801958B (en) * | 2019-01-21 | 2020-09-15 | 厦门市三安集成电路有限公司 | Silicon carbide groove Schottky diode device and preparation method thereof |
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