CN206789541U - Ultrathin mounted type semiconductor devices - Google Patents
Ultrathin mounted type semiconductor devices Download PDFInfo
- Publication number
- CN206789541U CN206789541U CN201720479445.1U CN201720479445U CN206789541U CN 206789541 U CN206789541 U CN 206789541U CN 201720479445 U CN201720479445 U CN 201720479445U CN 206789541 U CN206789541 U CN 206789541U
- Authority
- CN
- China
- Prior art keywords
- side pin
- chip
- metal pad
- pin
- epoxy resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a kind of ultrathin mounted type semiconductor devices, including chip, metal pad, several left side pins, several right side pins and epoxy resin cladding, it is arranged at the left side of chip several left side pin spacing side by side, be arranged at the right side of chip several right side pin spacing side by side, the epoxy resin cladding be coated on chip, metal pad, several left side pins, on several right side pins；Each lower end has the extension for extending epoxy resin cladding lower surface for the left side pin and right side pin, one left insulation raised item and right insulation raised item are located at epoxy resin cladding lower surface respectively, the left insulation raised item is between left side pin and metal pad, and the right insulation raised item is between right side pin and metal pad.The utility model ultrathin type mounted type semiconductor devices is effectively increased pin creep age distance, adds product ontology area of dissipation, improves the reliability and security of device.
Description
Technical field
A kind of chip-packaging structure is the utility model is related to, is related to technical field of semiconductors.
Background technology
SOP encapsulation is a kind of component encapsulation form, and common encapsulating material has:Plastics, ceramics, glass, metal etc., now
Substantially Plastic Package is used, is of wide application, is used primarily in various integrated circuits.As shown in figure 1, existing SOP encapsulation
Pad in structure is generally the single independent small pad being independently arranged corresponding to the signal pins of electronic component.But
As product power consumption stream is increasing, some SOP encapsulation chips are also used in high-current circuit, the electrification effect changed of circulation to
Certain module is powered, but corresponding pad design is more and more undesirable in the pcb for these traditional SOP encapsulation, because
Pad size area is too small, and when carrying high current, immediate current is very big, and pulse caused by electric current can incite somebody to action in very short time
Chip punctures, it is more likely that burns whole circuit, loss is very big.Traditional SOP encapsulation welding trays can not carry more high current, lead
The impact of not all right, circuit function unstable, the extremely short time high current of radiating of chip is caused to be easily damaged chip, so as to influence
The quality of product.
The content of the invention
The utility model purpose is to provide a kind of ultrathin mounted type semiconductor devices, the ultrathin mounted type semiconductor device
Part is effectively increased pin creep age distance, adds product ontology area of dissipation, improves the reliability and security of device.
To reach above-mentioned purpose, the technical solution adopted in the utility model is：A kind of ultrathin mounted type semiconductor devices,
Pass through including chip, metal pad, several left side pins, several right side pins and epoxy resin cladding, the chip
Insulation glue-line is fixed on the middle section of metal pad upper surface, is arranged at chip several left side pin spacing side by side
Left side, be arranged at the right side of chip, some first gold threads draw positioned at left side several right side pin spacing side by side
Between pin and chip, for some second gold threads between right side pin and chip, the epoxy resin cladding is coated on core
Piece, metal pad, several left side pins, several right side pins on；
Each lower end has the extension for extending epoxy resin cladding lower surface for the left side pin and right side pin,
One left insulation raised item and right insulation raised item are located at epoxy resin cladding lower surface respectively, and the left insulation raised item is located at
Between left side pin and metal pad, the right insulation raised item is between right side pin and metal pad.
Further improved scheme is as follows in above-mentioned technical proposal：
1. in such scheme, the metal pad its lower edge is provided with gap slot.
2. in such scheme, the left side pin, the metal-coated coating in the lower surface of right side pin, the metal-plated
Layer is tin layers or NiPdAu layer.
3. in such scheme, the metal pad, left side pin and the respective lower surface of right side pin expose asphalt mixtures modified by epoxy resin
The bottom of fat cladding.
4. in such scheme, the height of the extension is 2 ~ 5mm.
Because above-mentioned technical proposal is used, the utility model has following advantages compared with prior art：
1. the utility model ultrathin type mounted type semiconductor devices, the respective lower end of its described left side pin and right side pin
With the extension for extending epoxy resin cladding lower surface, a left insulation raised item and right insulation raised item are located at ring respectively
Oxygen tree fat cladding lower surface, for the left insulation raised item between left side pin and metal pad, the right insulation is raised
Bar is effectively increased pin creep age distance between right side pin and metal pad, adds product ontology area of dissipation,
Improve the reliability and security of device.
2. the utility model ultrathin type mounted type semiconductor devices, its left side pin, the lower surface of right side pin are plated with
The coat of metal, device and PCB conductive contact resistance, the raising for the weld strength being also beneficial between PCB were both reduced；Its
Secondary, its metal pad its lower edge is provided with gap slot, is advantageous to pin and metal pad being more firmly fixed, improves
The reliability welded between PCB.
Brief description of the drawings
Accompanying drawing 1 is the utility model ultrathin type mounted type semiconductor device structure schematic diagram.
In the figures above：1st, chip；2nd, metal pad；3rd, left side pin；4th, right side pin；5th, epoxy resin cladding；
6th, insulate glue-line；7th, gap slot；8th, the first gold thread；9th, the second gold thread；10th, left insulation raised item；11st, right insulation raised item；12、
Extension；13rd, the coat of metal.
Embodiment
Below in conjunction with the accompanying drawings and embodiment is further described to the utility model：
Embodiment 1：A kind of ultrathin mounted type semiconductor devices, including chip 1, metal pad 2, several left side pins
3rd, several right side pins 4 and epoxy resin cladding 5, the chip 1 are fixed on the upper table of metal pad 2 by the glue-line 6 that insulate
The middle section in face, it is arranged at the left side of chip 1, several described right sides are drawn several spacing side by side of left side pin 3
It is arranged at the right side of chip 1, some first gold threads 8 are between left side pin 3 and chip 1, Ruo Gangen the spacing side by side of pin 4
Second gold thread 9 between right side pin 4 and chip 1, if the epoxy resin cladding 5 be coated on chip 1, metal pad 2,
On dry left side pin 3, several right side pins 4；
The 4 respective lower end of left side pin 3 and right side pin has the extension for extending the lower surface of epoxy resin cladding 5
Portion 12, a left insulation raised item 10 and right insulation raised item 11 are located at the lower surface of epoxy resin cladding 5, the left insulation respectively
Raised item between left side pin 3 and metal pad 2, the right insulation raised item be located at right side pin 4 and metal pad 2 it
Between.
The above-mentioned its lower edge of metal pad 2 is provided with gap slot 7.
Above-mentioned left side pin 3, the metal-coated coating 13 in the lower surface of right side pin 4, the coat of metal 13 are tin layers.
Above-mentioned metal pad 2, left side pin 3 and 4 respective lower surface of right side pin expose epoxy resin cladding 5
Bottom.The height of above-mentioned extension 12 is 4mm.
Embodiment 2：A kind of ultrathin mounted type semiconductor devices, including chip 1, metal pad 2, several left side pins
3rd, several right side pins 4 and epoxy resin cladding 5, the chip 1 are fixed on the upper table of metal pad 2 by the glue-line 6 that insulate
The middle section in face, it is arranged at the left side of chip 1, several described right sides are drawn several spacing side by side of left side pin 3
It is arranged at the right side of chip 1, some first gold threads 8 are between left side pin 3 and chip 1, Ruo Gangen the spacing side by side of pin 4
Second gold thread 9 between right side pin 4 and chip 1, if the epoxy resin cladding 5 be coated on chip 1, metal pad 2,
On dry left side pin 3, several right side pins 4；
The 4 respective lower end of left side pin 3 and right side pin has the extension for extending the lower surface of epoxy resin cladding 5
Portion 12, a left insulation raised item 10 and right insulation raised item 11 are located at the lower surface of epoxy resin cladding 5, the left insulation respectively
Raised item between left side pin 3 and metal pad 2, the right insulation raised item be located at right side pin 4 and metal pad 2 it
Between.
The above-mentioned its lower edge of metal pad 2 is provided with gap slot 7.
Above-mentioned left side pin 3, the metal-coated coating 13 in the lower surface of right side pin 4, the coat of metal 13 are nickel palladium
Layer gold.The height of above-mentioned extension 12 is 3mm.
During using above-mentioned ultrathin mounted type semiconductor devices, each lower end has for its described left side pin and right side pin
Extend the extension of epoxy resin cladding lower surface, a left insulation raised item and right insulation raised item are located at asphalt mixtures modified by epoxy resin respectively
Fat cladding lower surface, the left insulation raised item is between left side pin and metal pad, the right insulation raised item position
Between right side pin and metal pad, pin creep age distance is effectively increased, adds product ontology area of dissipation, is improved
The reliability and security of device；Again, its left side pin, the metal-coated coating in the lower surface of right side pin, were both reduced
The conductive contact resistance of device and PCB, the raising for the weld strength being also beneficial between PCB；Again, under its metal pad
Portion edge is provided with gap slot, is advantageous to pin and metal pad being more firmly fixed, improves what is welded between PCB
Reliability.
For above-described embodiment only to illustrate technical concepts and features of the present utility model, its object is to allow be familiar with technique
Personage can understand content of the present utility model and implement according to this, the scope of protection of the utility model can not be limited with this.
All equivalent change or modifications made according to the utility model Spirit Essence, should all cover the scope of protection of the utility model it
It is interior.
Claims (5)
1. a kind of ultrathin mounted type semiconductor devices, including chip（1）, metal pad（2）, several left side pins（3）If,
Dry right side pin（4）With epoxy resin cladding（5）, the chip（1）Pass through the glue-line that insulate（6）It is fixed on metal pad
（2）The middle section of upper surface, several described left side pins（3）It is arranged at chip spacing side by side（1）Left side, several
The right side pin（4）It is arranged at chip spacing side by side（1）Right side, some first gold threads（8）Positioned at left side pin（3）
And chip（1）Between, some second gold threads（9）Positioned at right side pin（4）And chip（1）Between, the epoxy resin cladding
Body（5）It is coated on chip（1）, metal pad（2）, several left side pins（3）, several right side pins（4）On；
It is characterized in that：The left side pin（3）With right side pin（4）Respective lower end, which has, extends epoxy resin cladding
（5）The extension of lower surface（12）, a left insulation raised item（10）With right insulation raised item（11）It is located at epoxy resin bag respectively
Cover body（5）Lower surface, the left insulation raised item are located at left side pin（3）And metal pad（2）Between, the right insulation is raised
Bar is located at right side pin（4）And metal pad（2）Between.
2. ultrathin mounted type semiconductor devices according to claim 1, it is characterised in that：The metal pad（2）Under
Portion edge is provided with gap slot（7）.
3. ultrathin mounted type semiconductor devices according to claim 1, it is characterised in that：The left side pin（3）, it is right
Side pin（4）The metal-coated coating in lower surface（13）, the coat of metal（13）For tin layers or NiPdAu layer.
4. ultrathin mounted type semiconductor devices according to claim 1, it is characterised in that：The metal pad（2）, it is left
Side pin（3）With right side pin（4）Respective lower surface exposes epoxy resin cladding（5）Bottom.
5. ultrathin mounted type semiconductor devices according to claim 1, it is characterised in that：The extension（12）Height
Spend for 2 ~ 5mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720479445.1U CN206789541U (en) | 2017-05-02 | 2017-05-02 | Ultrathin mounted type semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720479445.1U CN206789541U (en) | 2017-05-02 | 2017-05-02 | Ultrathin mounted type semiconductor devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206789541U true CN206789541U (en) | 2017-12-22 |
Family
ID=60709452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720479445.1U Active CN206789541U (en) | 2017-05-02 | 2017-05-02 | Ultrathin mounted type semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206789541U (en) |
-
2017
- 2017-05-02 CN CN201720479445.1U patent/CN206789541U/en active Active
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| GR01 | Patent grant | ||
| GR01 | Patent grant |