CN206789534U - High reliability chip-packaging structure - Google Patents
High reliability chip-packaging structure Download PDFInfo
- Publication number
- CN206789534U CN206789534U CN201720164471.5U CN201720164471U CN206789534U CN 206789534 U CN206789534 U CN 206789534U CN 201720164471 U CN201720164471 U CN 201720164471U CN 206789534 U CN206789534 U CN 206789534U
- Authority
- CN
- China
- Prior art keywords
- pin
- chip
- metal pad
- several
- side pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 claims abstract description 57
- 238000005253 cladding Methods 0.000 claims abstract description 16
- 239000003822 epoxy resin Substances 0.000 claims abstract description 16
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 16
- 241000218202 Coptis Species 0.000 claims description 22
- 235000002991 Coptis groenlandica Nutrition 0.000 claims description 22
- 238000005476 soldering Methods 0.000 claims description 19
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000004593 Epoxy Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 5
- 230000017525 heat dissipation Effects 0.000 abstract description 4
- 238000005538 encapsulation Methods 0.000 description 6
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 2
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004021 metal welding Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a kind of high reliability chip-packaging structure, including chip, metal pad, several left side pins, several right side pins and epoxy resin cladding, it is arranged at the left side of chip several left side pin spacing side by side, it is arranged at the right side of chip several right side pin spacing side by side, the metal pad its lower edge is provided with the first gap slot, the left side pin is provided with the second gap slot with the opposite medial extremity bottom of metal pad, right side pin is provided with the 3rd gap slot with the opposite medial extremity bottom of metal pad, the epoxy resin cladding is coated on chip, metal pad, several left side pins, on several right side pins, metal pad, left side pin and the respective lower surface of right side pin expose the bottom of epoxy resin cladding.The utility model is advantageous to pin and metal pad being more firmly fixed, and improves the reliability welded between PCB, also so that chip quickly conducts heat, good heat dissipation effect at work.
Description
Technical field
A kind of chip-packaging structure is the utility model is related to, is related to technical field of semiconductors.
Background technology
SOP encapsulation is a kind of component encapsulation form, and common encapsulating material has:Plastics, ceramics, glass, metal etc., now
Substantially Plastic Package is used, is of wide application, is used primarily in various integrated circuits.As shown in figure 1, existing SOP encapsulation
Pad in structure is generally the single independent small pad being independently arranged corresponding to the signal pins of electronic component.But
As product power consumption stream is increasing, some SOP encapsulation chips are also used in high-current circuit, the electrification effect changed of circulation to
Certain module is powered, but corresponding pad design is more and more undesirable in the pcb for these traditional SOP encapsulation, because
Pad size area is too small, and when carrying high current, immediate current is very big, and pulse caused by electric current can incite somebody to action in very short time
Chip punctures, it is more likely that burns whole circuit, loss is very big.Traditional SOP encapsulation welding trays can not carry more high current, lead
The impact of not all right, circuit function unstable, the extremely short time high current of radiating of chip is caused to be easily damaged chip, so as to influence
The quality of product.
The content of the invention
The utility model purpose is to provide a kind of high reliability chip-packaging structure, and the high reliability chip-packaging structure has
More it is firmly fixed beneficial to by pin and metal pad, improves the reliability welded between PCB, also so that chip is in work
Heat, good heat dissipation effect are quickly conducted when making.
To reach above-mentioned purpose, the technical solution adopted in the utility model is：A kind of high reliability chip-packaging structure, bag
Include chip, metal pad, several left side pins, several right side pins and epoxy resin cladding, the chip and pass through exhausted
Edge glue-line is fixed on the middle section of metal pad upper surface, is arranged at chip several left side pin spacing side by side
Left side, is arranged at the right side of chip several right side pin spacing side by side, and the metal pad its lower edge is provided with
First gap slot, the left side pin are provided with the second gap slot, the right side pin with the opposite medial extremity bottom of metal pad
The medial extremity bottom opposite with metal pad is provided with the 3rd gap slot, and the epoxy resin cladding is coated on chip, metal welding
Disk, several left side pins, several right side pins on, the metal pad, left side pin and the respective following table of right side pin
Face exposes the bottom of epoxy resin cladding；
The left side area of the chip upper surface and right side region have several left round recesseds, several right round recesseds,
Each bottom is respectively provided with pin area, the respective medial extremity of the left side pin and right side pin for the left round recessed and right round recessed
Upper surface has the first round recessed and the second round recessed, and some first gold thread one end are located in left round recessed and pass through weldering
Cream electrically connects with pin area, and this first gold thread other end is located in the first round recessed of left side pin and electrically connected by soldering paste,
Some second gold thread one end are located in right round recessed and electrically connected by soldering paste with pin area, and this second gold thread other end is located at
Electrically connected in second round recessed of right side pin and by soldering paste.
Further improved scheme is as follows in above-mentioned technical proposal：
1. in such scheme, the left side pin, the metal-coated coating in the lower surface of right side pin.
2. in such scheme, the coat of metal is tin layers or NiPdAu layer.
3. in such scheme, the left round recessed and right round recessed are semi-circular recesses.
4. in such scheme, the coat of metal is 1 with the thickness ratio of left side pin or right side pin：6~12.
5. in such scheme, the number of the left side pin and right side pin is 3 ~ 10.
Because above-mentioned technical proposal is used, the utility model has following advantages compared with prior art：
1. the utility model high reliability chip-packaging structure, its metal pad its lower edge is provided with the first gap slot,
The left side pin is provided with the second gap slot, the right side pin and metal pad phase with the opposite medial extremity bottom of metal pad
To medial extremity bottom be provided with the 3rd gap slot, be advantageous to pin and metal pad being more firmly fixed, improve and PCB
Between the reliability welded；Secondly, its chip is fixed on the middle section of metal pad upper surface, metal welding by the glue-line that insulate
Disk, left side pin and the respective lower surface of right side pin expose the bottom of epoxy resin cladding, exposed metal pad, with
Just chip quickly conducts heat, good heat dissipation effect at work.
2. the utility model high reliability chip-packaging structure, the left side area of its chip upper surface and right side region are opened respectively
There are several left round recesseds, several right round recesseds, each bottom is respectively provided with pin area, institute for the left round recessed and right round recessed
State left side pin and pin respective medial extremity upper surface in right side has the first round recessed and the second round recessed, some the
One gold thread one end is located in left round recessed and electrically connected by soldering paste with pin area, and this first gold thread other end is located at left side pin
The first round recessed in and electrically connected by soldering paste, some second gold thread one end be located in right round recessed and by soldering paste with managing
Pin area electrically connects, and this second gold thread other end is located in the second round recessed of right side pin and electrically connected by soldering paste, effectively keeps away
Exempt from, missing solder and the problem of rosin joint, both improved the carrying electric current of device, and also improved the stability and reliability of integrated chip.
3. the utility model high reliability chip-packaging structure, its left side pin, the lower surface of right side pin are plated with gold
Belong to coating, both reduce device and PCB conductive contact resistance, the raising for the weld strength being also beneficial between PCB.
Brief description of the drawings
Accompanying drawing 1 is the utility model high reliability chip-packaging structure structural representation；
Accompanying drawing 2 is the partial structural diagram of accompanying drawing 1.
In the figures above：1st, chip；2nd, metal pad；3rd, left side pin；4th, right side pin；5th, epoxy resin cladding；
6th, insulate glue-line；7th, the first gap slot；8th, the second gap slot；9th, the 3rd gap slot；10th, left round recessed；11st, right round recessed；12、
Pin area；13rd, the first round recessed；14th, the second round recessed；15th, the first gold thread；16th, the second gold thread；17th, the coat of metal.
Embodiment
Below in conjunction with the accompanying drawings and embodiment is further described to the utility model：
Embodiment 1：A kind of high reliability chip-packaging structure, including chip 1, metal pad 2, several left side pins 3,
Several right side pins 4 and epoxy resin cladding 5, the chip 1 are fixed on the upper surface of metal pad 2 by the glue-line 6 that insulate
Middle section, be arranged at the left side of chip 1, several described right side pins 4 several spacing side by side of left side pin 3
It is arranged at the right side of chip 1, its lower edge of metal pad 2 is provided with the first gap slot 7, and the left side is drawn spacing side by side
Pin 3 and the opposite medial extremity bottom of metal pad 2 are provided with the second gap slot 8, and the right side pin 4 and metal pad 2 are opposite
Medial extremity bottom is provided with the 3rd gap slot 9, and the epoxy resin cladding 5 is coated on chip 1, metal pad 2, several left sides
On pin 3, several right side pins 4, the metal pad 2, left side pin 3 and 4 respective lower surface of right side pin expose
The bottom of epoxy resin cladding 5；
It is recessed that the left side area and right side region of the upper surface of chip 1 have several left round recesseds 10, several right circles
Groove 11, the left round recessed 10 and 11 respective bottom of right round recessed are respectively provided with pin area 12, the left side pin 3 and right side pin
4 respective medial extremity upper surfaces have the first round recessed 13 and the second round recessed 14, some one end positions of first gold thread 15
Electrically connected in the left round recessed 10 and by soldering paste with pin area 12, this other end of the first gold thread 15 is located at the of left side pin 3
Electrically connected in one round recessed 13 and by soldering paste, some one end of second gold thread 16 be located in right round recessed 11 and by soldering paste and
Pin area electrically connects, and this second gold thread other end is located in the second round recessed of right side pin and electrically connected by soldering paste.
Above-mentioned left side pin 3, the metal-coated coating 17 in the lower surface of right side pin 4；The above-mentioned coat of metal 17 is tin layers
Or NiPdAu layer.
The above-mentioned coat of metal 17 is 1 with the thickness ratio of left side pin 3 or right side pin 4：8；Above-mentioned left side pin 3 and the right side
The number of side pin 4 is 8.
Embodiment 2：A kind of high reliability chip-packaging structure, including chip 1, metal pad 2, several left side pins 3,
Several right side pins 4 and epoxy resin cladding 5, the chip 1 are fixed on the upper surface of metal pad 2 by the glue-line 6 that insulate
Middle section, be arranged at the left side of chip 1, several described right side pins 4 several spacing side by side of left side pin 3
It is arranged at the right side of chip 1, its lower edge of metal pad 2 is provided with the first gap slot 7, and the left side is drawn spacing side by side
Pin 3 and the opposite medial extremity bottom of metal pad 2 are provided with the second gap slot 8, and the right side pin 4 and metal pad 2 are opposite
Medial extremity bottom is provided with the 3rd gap slot 9, and the epoxy resin cladding 5 is coated on chip 1, metal pad 2, several left sides
On pin 3, several right side pins 4, the metal pad 2, left side pin 3 and 4 respective lower surface of right side pin expose
The bottom of epoxy resin cladding 5；
It is recessed that the left side area and right side region of the upper surface of chip 1 have several left round recesseds 10, several right circles
Groove 11, the left round recessed 10 and 11 respective bottom of right round recessed are respectively provided with pin area 12, the left side pin 3 and right side pin
4 respective medial extremity upper surfaces have the first round recessed 13 and the second round recessed 14, some one end positions of first gold thread 15
Electrically connected in the left round recessed 10 and by soldering paste with pin area 12, this other end of the first gold thread 15 is located at the of left side pin 3
Electrically connected in one round recessed 13 and by soldering paste, some one end of second gold thread 16 be located in right round recessed 11 and by soldering paste and
Pin area electrically connects, and this second gold thread other end is located in the second round recessed of right side pin and electrically connected by soldering paste.
Above-mentioned left side pin 3, the metal-coated coating 17 in the lower surface of right side pin 4；Above-mentioned left round recessed 10 and right circle
Groove 11 is semi-circular recesses.
The above-mentioned coat of metal 17 is 1 with the thickness ratio of left side pin 3 or right side pin 4：10；The above-mentioned He of left side pin 3
The number of right side pin 4 is 4.
During using above-mentioned high reliability chip-packaging structure, it is advantageous to pin and metal pad is more solid
It is fixed, improve the reliability welded between PCB；Secondly, its exposed metal pad, so that chip quickly conducts at work
Heat, good heat dissipation effect；It effectively prevent again, missing solder and the problem of rosin joint, both improved the carrying electric current of device, and also improved
The stability and reliability of integrated chip.
For above-described embodiment only to illustrate technical concepts and features of the present utility model, its object is to allow be familiar with technique
Personage can understand content of the present utility model and implement according to this, the scope of protection of the utility model can not be limited with this.
All equivalent change or modifications made according to the utility model Spirit Essence, should all cover the scope of protection of the utility model it
It is interior.
Claims (2)
- A kind of 1. high reliability chip-packaging structure, it is characterised in that：Including chip（1）, metal pad（2）, several left side Pin（3）, several right side pins（4）With epoxy resin cladding（5）, the chip（1）Pass through the glue-line that insulate（6）It is fixed on Metal pad（2）The middle section of upper surface, several described left side pins（3）It is arranged at chip spacing side by side（1）A left side Side, several described right side pins（4）It is arranged at chip spacing side by side（1）Right side, the metal pad（2）Lower edge Place is provided with the first gap slot（7）, the left side pin（3）With metal pad（2）Opposite medial extremity bottom is provided with the second breach Groove（8）, the right side pin（4）With metal pad（2）Opposite medial extremity bottom is provided with the 3rd gap slot（9）, the epoxy Resin-coating body（5）It is coated on chip（1）, metal pad（2）, several left side pins（3）, several right side pins（4）On, The metal pad（2）, left side pin（3）With right side pin（4）Respective lower surface exposes epoxy resin cladding（5）'s Bottom；The chip（1）The left side area of upper surface and right side region have several left round recesseds（10）, several right circles it is recessed Groove（11）, the left round recessed（10）With right round recessed（11）Respective bottom is respectively provided with pin area（12）, the left side pin（3） With right side pin（4）Respective medial extremity upper surface has the first round recessed（13）With the second round recessed（14）, Ruo Gangen First gold thread（15）One end is located at left round recessed（10）It is interior and pass through soldering paste and pin area（12）Electrical connection, this first gold thread（15） The other end is located at left side pin（3）The first round recessed（13）It is interior and electrically connected by soldering paste, some second gold threads（16）One End is located at right round recessed（11）It is interior and pass through soldering paste and pin area（12）Electrical connection, this second gold thread（16）The other end is located at right side Pin（4）The second round recessed（14）It is interior and electrically connected by soldering paste；The left side pin（3）, right side pin（4）Lower surface Metal-coated coating（17）；The coat of metal（17）For tin layers or NiPdAu layer.
- 2. high reliability chip-packaging structure according to claim 1, it is characterised in that：The coat of metal（17）With a left side Side pin（3）Or right side pin（4）Thickness ratio be 1：8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720164471.5U CN206789534U (en) | 2017-02-23 | 2017-02-23 | High reliability chip-packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720164471.5U CN206789534U (en) | 2017-02-23 | 2017-02-23 | High reliability chip-packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206789534U true CN206789534U (en) | 2017-12-22 |
Family
ID=60704941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720164471.5U Expired - Fee Related CN206789534U (en) | 2017-02-23 | 2017-02-23 | High reliability chip-packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206789534U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110856338A (en) * | 2019-10-22 | 2020-02-28 | 深圳市华星光电技术有限公司 | Circuit board assembly and electronic equipment |
-
2017
- 2017-02-23 CN CN201720164471.5U patent/CN206789534U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110856338A (en) * | 2019-10-22 | 2020-02-28 | 深圳市华星光电技术有限公司 | Circuit board assembly and electronic equipment |
| CN110856338B (en) * | 2019-10-22 | 2021-03-23 | Tcl华星光电技术有限公司 | Circuit board assembly and electronic equipment |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171222 |
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| CF01 | Termination of patent right due to non-payment of annual fee |