CN205984937U - Hold diode that increases chip - Google Patents

Hold diode that increases chip Download PDF

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Publication number
CN205984937U
CN205984937U CN201620876023.3U CN201620876023U CN205984937U CN 205984937 U CN205984937 U CN 205984937U CN 201620876023 U CN201620876023 U CN 201620876023U CN 205984937 U CN205984937 U CN 205984937U
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CN
China
Prior art keywords
pin
chip
diode
hole
packaging body
Prior art date
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Active
Application number
CN201620876023.3U
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Chinese (zh)
Inventor
刘忠玉
骆宗友
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Jia Jun Electronic Technology Co Ltd
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Dongguan Jia Jun Electronic Technology Co Ltd
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Priority to CN201620876023.3U priority Critical patent/CN205984937U/en
Application granted granted Critical
Publication of CN205984937U publication Critical patent/CN205984937U/en
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Abstract

The utility model discloses a hold diode that increases chip, including packaging body and diode body, diode body arranges in inside the packaging body, diode body includes the chip, the conducting layer, an insulating layer, the pin, lead wire and metal contact, the upper surface at the insulating layer is fixed to the conducting layer, the pin rectangular array is at the lower surface of insulating layer, the lower surface that the lower surface of pin runs through the packaging body exposes in the air, the metal contact rectangular array is at the upper surface of chip, conducting layer and insulating layer correspondence are equipped with a plurality of through -holes, the through -hole runs through the conducting layer in proper order and the insulating layer reachs the upper surface that corresponds the pin, the lower extreme and the pin electric connection of through -hole, the metal contact is through the upper end electric connection of lead wire and through -hole. The beneficial effects of the utility model are that: the packaging body that the adoption was equipped with double -deck electrically conductive panel replaces the packaging body of the electrically conductive panel of traditional individual layer, avoids the limited problem of encapsulation die size in the old technique, increases install the chip's usable space, improves the practicality of product.

Description

A kind of diode accommodating increase chip
Technical field
This utility model is related to diode technologies field, more particularly to a kind of diode accommodating increase chip.
Background technology
In the operation that conventional diode is manufactured, the sheet material for encapsulating chip is single layer of conductive sheet material.With collection Become the increase of the closeness of circuit, the encapsulating structure of chip becomes increasingly complex and diversified.Limited by diode package size System, the surface of single layer of conductive sheet material removes outside the position necessary reservation space that multiple pins take, and remainder is available for encapsulating chip Size is limited.Inside dimensions as commonly used packaging body base at present are 1.0mmX3.8mm, be in the base both sides of width 1.0mm The pin of multiple arrangements that width is 0.3mm is installed, pin and chip typically leave space for 0.1mm, then chip size is only There is 0.2mm width, if not retaining the space of pin and chip, then chip Breadth Maximum is 0.4mm.With to diode technique The lifting requiring, requires to the chip size needing encapsulation bigger, needs the encapsulation chip bigger than 0.4mm width, and traditional Technique cannot meet this class wrapper.
In sum, how to provide a kind of structure simple, existing diode package size can be kept, and can increased core The technique of chip size is current those skilled in the art's urgent problem.
Content of the invention
In order to solve the problems, such as above-mentioned prior art, the purpose of this utility model is to provide a kind of receiving increased core The diode of piece, replaces the packaging body of conventional monolayers conductive sheet metal, it is to avoid old using the packaging body being provided with bilayer conductive sheet material There is the limited problem of the size of encapsulated wafer in technology, thus improving the practicality of product.
The technical solution adopted in the utility model is:A kind of diode accommodating increase chip, including packaging body and two poles Tube body, described diode body is placed in package interior, and described diode body includes chip, conductive layer, insulating barrier, draws Foot, lead and hard contact, described conductive layer is fixed on the upper surface of insulating barrier, and described pin rectangular array is under insulating barrier Surface, the lower surface that the lower surface of described pin runs through packaging body exposes in atmosphere, and described chip is fixed on the upper of conductive layer Surface, described hard contact rectangular array matches in the upper surface of chip, the quantity of described pin and hard contact, described leads Electric layer and insulating barrier are correspondingly provided with some through holes, and described through hole sequentially passes through conductive layer and insulating barrier reaches the upper table of corresponding pin Face, the lower end of described through hole and corresponding pin are electrically connected with, and described hard contact passes through lead and the upper end of corresponding through hole is electrical Connect.
It is preferred that, the material of described through hole is set to metallic copper.
It is preferred that, described through hole is set to extend vertically through.
It is preferred that, the aperture of described through hole is set to 0.1mm-0.2mm.
It is preferred that, the material of described insulating barrier is set to epoxy resin.
It is preferred that, described package interior filling epoxy resin.
The beneficial effects of the utility model are:
In the lower surface of insulating barrier, conductive layer is fixed on the upper surface of insulating barrier, conductive layer and insulation to pin rectangular array Layer is correspondingly provided with multiple through holes, and the upper end of through hole and corresponding hard contact are electrically connected with by lead thus realizing turning on, core Piece is fixed on the upper surface of conductive layer, adopts in this way, it is to avoid old technology is led because of diode package size limitation Remainder outside the necessary space retaining in position of surface removing multiple pins occupancy of single layer of conductive sheet material is caused to be available for encapsulating chip The limited problem of size, increased the available space of chip installation, improves the practicality of product.
Brief description
Fig. 1 is structural representation of the present utility model.
Fig. 2 is top view of the present utility model.
Fig. 3 is the sectional view before the corrosion of this utility model conductive layer.
Fig. 4 is the top view after the corrosion of this utility model conductive layer.
Wherein:
Packaging body -1 diode body -2 chip -3
Conductive layer -4,4 ' insulating barrier -5 pin -6
Lead -7 hard contact -8 through hole -9
Pad -10
Specific embodiment
With embodiment, the technical solution of the utility model is illustrated below in conjunction with the accompanying drawings.
Shown in seeing figures.1.and.2, a kind of diode accommodating increase chip, including packaging body 1 and diode body 2, institute State diode body 2 and be placed in inside packaging body 1, described diode body 2 include chip 3, conductive layer 4, insulating barrier 5, pin 6, Lead 7 and hard contact 8, described conductive layer 4 is fixed on the upper surface of insulating barrier 5, and described pin 6 rectangular array is in insulating barrier 5 Lower surface, the lower surface that the lower surface of described pin 6 runs through packaging body 1 exposes in atmosphere, and described chip 3 is fixed on conduction The upper surface of layer 4, described hard contact 8 rectangular array is in the upper surface of chip 3, the quantity phase of described pin 6 and hard contact 8 Coupling, described conductive layer 4 and insulating barrier 5 are correspondingly provided with some through holes 9, and described through hole 9 sequentially passes through conductive layer 4 and insulating barrier 5 Reach the upper surface of corresponding pin 6, the lower end of described through hole 9 and corresponding pin 6 are electrically connected with, described hard contact 8 passes through to draw The upper end of line 7 and corresponding through hole 9 is electrically connected with.
The material of described through hole 9 is set to metallic copper, and aperture is set to 0.1mm-0.2mm.Through hole 9 extends vertically through conductive layer 4 Reach the upper surface of pin 6 with insulating barrier 5.Through hole 9 utilizes the via technology that pcb board production field is commonly used to generate, inside through hole 9 Plated metal copper is thus meet the requirement of electric connection.
The material of described insulating barrier 5 is set to epoxy resin, and epoxy resin has the characteristics that thermostability, stability and insulation.
Described packaging body 1 inside filling epoxy resin is so that diode internal structure is more stable.
As shown in Figure 3 and Figure 4, in production application, the upper surface of insulating barrier 5 is fixed with conductive layer 4, insulating barrier 5 Lower surface be fixed with conductive layer 4 ', conductive layer 4 passes through corrosion and is met some pads 10 of chip 3 dimensional requirement, and respectively Individual pad 10 mutually insulated, on the pad 10 that chip 3 is disposed therein, conductive layer 4 ' is obtained some mutually exhausted by corrosion The pin 6 of edge, the size of pin 6 and spacing according to production application need formulate.Diode is adopted paster skill by the later stage Art is welded on circuit boards.
This utility model passes through pin 6 rectangular array in the lower surface of insulating barrier 5, and conductive layer 4 is fixed on insulating barrier 5 Upper surface, conductive layer 4 and insulating barrier 5 are correspondingly provided with multiple through holes 9, and the upper end of through hole 9 and corresponding hard contact 8 pass through lead 7 are electrically connected with thus realizing turning on, chip 3 is fixed on the upper surface of conductive layer 4, it is to avoid encapsulate the chi of chip 3 in old technology Very little limited problem, thus improve the practicality of product.
Above-described embodiment is only that of the present utility model ultimate principle, principal character and advantage have been shown and described.The industry Technical staff it should be appreciated that this utility model is not restricted to the described embodiments, described in above-described embodiment and description Principle of the present utility model is simply described, on the premise of without departing from this utility model spirit and scope, this utility model also can There are various changes and modifications, these changes and improvements both fall within the range of claimed this utility model.

Claims (6)

1. a kind of accommodate increase chip diode it is characterised in that:Including packaging body (1) and diode body (2), described two Pole pipe body (2) is placed in packaging body (1) inside, and described diode body (2) includes chip (3), conductive layer (4), insulating barrier (5), pin (6), lead (7) and hard contact (8), described conductive layer (4) is fixed on the upper surface of insulating barrier (5), described draws The lower surface in insulating barrier (5) for foot (6) rectangular array, the lower surface that the lower surface of described pin (6) runs through packaging body (1) exposes In atmosphere, described chip (3) is fixed on the upper surface of conductive layer (4), and described hard contact (8) rectangular array is in chip (3) Upper surface, the quantity of described pin (6) and hard contact (8) matches, and described conductive layer (4) and insulating barrier (5) correspondence set There are some through holes (9), described through hole (9) sequentially passes through conductive layer (4) and insulating barrier (5) reaches the upper surface of corresponding pin (6), The lower end of described through hole (9) and corresponding pin (6) are electrically connected with, and described hard contact (8) passes through lead (7) and corresponding through hole (9) upper end is electrically connected with.
2. according to claim 1 a kind of accommodate increase chip diode it is characterised in that:The material of described through hole (9) Matter is set to metallic copper.
3. according to claim 1 a kind of accommodate increase chip diode it is characterised in that:Described through hole (9) is set to Extend vertically through.
4. according to claim 1 a kind of accommodate increase chip diode it is characterised in that:The hole of described through hole (9) Footpath is set to 0.1mm-0.2mm.
5. according to claim 1 a kind of accommodate increase chip diode it is characterised in that:Described insulating barrier (5) Material is set to epoxy resin.
6. according to claim 1 a kind of accommodate increase chip diode it is characterised in that:In described packaging body (1) Portion's filling epoxy resin.
CN201620876023.3U 2016-08-12 2016-08-12 Hold diode that increases chip Active CN205984937U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620876023.3U CN205984937U (en) 2016-08-12 2016-08-12 Hold diode that increases chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620876023.3U CN205984937U (en) 2016-08-12 2016-08-12 Hold diode that increases chip

Publications (1)

Publication Number Publication Date
CN205984937U true CN205984937U (en) 2017-02-22

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Family Applications (1)

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CN201620876023.3U Active CN205984937U (en) 2016-08-12 2016-08-12 Hold diode that increases chip

Country Status (1)

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CN (1) CN205984937U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113394323A (en) * 2021-05-25 2021-09-14 江西展耀微电子有限公司 Display module and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113394323A (en) * 2021-05-25 2021-09-14 江西展耀微电子有限公司 Display module and manufacturing method thereof

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