CN205754039U - The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology - Google Patents

The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology Download PDF

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CN205754039U
CN205754039U CN201620068889.1U CN201620068889U CN205754039U CN 205754039 U CN205754039 U CN 205754039U CN 201620068889 U CN201620068889 U CN 201620068889U CN 205754039 U CN205754039 U CN 205754039U
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phase
brachium pontis
submodule
igbt module
module
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赵成勇
许建中
刘航
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North China Electric Power University
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North China Electric Power University
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Abstract

This utility model provides the centralized full-bridge MMC of auxiliary capacitor based on inequality constraints from all pressing topology.Full-bridge MMC is from all pressing topology, by full-bridge MMC model with from all pressure subsidiary loop joint mappings.Full-bridge MMC model and 6 in all pressure subsidiary loop is by subsidiary loopNIndividual IGBT module generation electrical link, IGBT module triggers, and both constitute the centralized full-bridge MMC of auxiliary capacitor based on inequality constraints from all pressing topology;IGBT module locking, topoligical equivalence is full-bridge MMC topology.This full-bridge MMC is from all pressing topology, DC side fault can be clamped, do not rely on special Pressure and Control simultaneously, can be on the basis of completing the conversion of alternating current-direct current energy, spontaneously realize the equilibrium of submodule capacitor voltage, submodule can be reduced simultaneously accordingly and trigger frequency and capacitor's capacity, it is achieved the fundamental frequency modulation of full-bridge MMC.

Description

The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology
Technical field
This utility model relates to flexible transmission field, is specifically related to a kind of centralized full-bridge MMC of auxiliary capacitor based on inequality constraints from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, MMC uses submodule (Sub-module, SM) mode cascaded constructs converter valve, avoid the direct series connection of big metering device, reduce requirement conforming to device, simultaneously facilitate dilatation and redundant configuration.Along with the rising of level number, output waveform, close to sinusoidal, can effectively avoid the defect of low level VSC-HVDC.
Full-bridge MMC is combined by full-bridge submodule, and full-bridge submodule is made up of four IGBT module, a sub-module capacitance and 1 mechanical switch, and flexible operation has DC Line Fault clamping ability.
Different from two level, three level VSC, the DC voltage of full-bridge MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure that the waveform quality that AC voltage exports bears identical stress with each power semiconductor in guarantee module, also for preferably supporting DC voltage, reduce alternate circulation, it is necessary to assure submodule capacitor voltage is in the state of dynamic stability at the periodic current disorder of internal organs of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving full-bridge MMC Neutron module capacitance voltage equalization problem at present.But, the realization of ranking function has to rely on the Millisecond sampling of capacitance voltage, needs substantial amounts of sensor and optical-fibre channel to be coordinated;Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, and the hardware designs for controller brings huge challenge;Additionally, submodule is cut-off frequency and has the highest requirement by sequence all realizations of pressure algorithm, cut-off frequency and be closely related with all pressure effects, in practice process, probably due to all press the restriction of effect, it has to improve the triggering frequency of submodule, and then bring the increase that inverter is lost.
Document " A DC-Link Voltage Self-Balance Method for a Diode-Clamped Modular Multilevel Converter With Minimum Number of Voltage Sensors ", it is proposed that a kind of rely on clamp diode and transformator to realize MMC submodule capacitor voltage equilibrium thinking.But the program the most to a certain degree destroys the modular nature of submodule, submodule capacitive energy interchange channel is also confined in mutually, could not make full use of the existing structure of MMC, introducing of three transformators also brings along bigger improvement cost while making control strategy complicate.
Utility model content
For the problems referred to above, the purpose of this utility model is to propose a kind of economy, modular, is independent of all pressing algorithm, can reduce submodule simultaneously accordingly and triggers frequency and capacitor's capacity and have the full-bridge MMC of DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of this utility model is as follows.
The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology, including the full-bridge MMC model being made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively byNIndividual full-bridge submodule and 1 brachium pontis reactor are in series;Including by 6NIndividual IGBT module, 6N+ 7 clamp diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from the most all pressing subsidiary loop.
The above-mentioned centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology, in full-bridge MMC model, 1st submodule of brachium pontis in A phase, one IGBT module midpoint is upwards connected with dc bus positive pole, and another IGBT module midpoint is connected with one IGBT module midpoint of the 2nd submodule of brachium pontis in A phase downwards;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, one IGBT module midpoint is upwards with in A phase the of brachium pontisiOne IGBT module midpoint of-1 submodule is connected, and another IGBT module midpoint is downwards with in A phase the of brachium pontisiOne IGBT module midpoint of+1 submodule is connected;In A phase the of brachium pontisNIndividual submodule, one IGBT module midpoint is connected down through one IGBT module midpoint of the 1st submodule of the lower brachium pontis of two brachium pontis reactors and A phase, and another IGBT module midpoint is upwards with in A phase the of brachium pontisNOne IGBT module midpoint of-1 submodule is connected;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2~N-1, the of one IGBT module midpoint upwards brachium pontis lower with A phaseiOne IGBT module midpoint of-1 submodule is connected, another IGBT module midpoint downwards with the of A phase time brachium pontisiOne IGBT module midpoint of+1 submodule is connected;The of the lower brachium pontis of A phaseNIndividual submodule, one IGBT module midpoint is connected with dc bus negative pole downwards, the of another IGBT module midpoint upwards brachium pontis lower with A phaseNTwo IGBT module midpoints of-1 submodule are connected.The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A.
The above-mentioned centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology, from all pressing in subsidiary loop, first auxiliary capacitor and second auxiliary capacitor are in parallel by clamp diode, second auxiliary capacitor positive pole connects auxiliary IGBT module, and first auxiliary capacitor negative pole connects clamp diode and be incorporated to dc bus positive pole;3rd auxiliary capacitor and the 4th auxiliary capacitor are in parallel by clamp diode, and the 3rd auxiliary capacitor negative pole connects auxiliary IGBT module, and the 4th auxiliary capacitor positive pole connects clamp diode and be incorporated to dc bus negative pole.Clamp diode, by the 1st sub-module capacitance and first auxiliary capacitor positive pole in brachium pontis in IGBT module connection A phase;The is connected in A phase in brachium pontis by IGBT moduleiIndividual sub-module capacitance and thei+ 1 sub-module capacitance positive pole, whereiniValue be 1~N-1;The is connected in A phase in brachium pontis by IGBT moduleNIndividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower with A phase;The is connected in the lower brachium pontis of A phase by IGBT moduleiThe lower brachium pontis of individual sub-module capacitance and A phase thei+ 1 sub-module capacitance positive pole, whereiniValue be 1~N-1;The is connected in the lower brachium pontis of A phase by IGBT moduleNIndividual sub-module capacitance and the 3rd auxiliary capacitor positive pole.Clamp diode, by the 1st sub-module capacitance and second auxiliary capacitor negative pole in brachium pontis in IGBT module connection B phase;The is connected in B phase in brachium pontis by IGBT moduleiIndividual sub-module capacitance and thei+ 1 sub-module capacitance negative pole, whereiniValue be 1~N-1;The is connected in B phase in brachium pontis by IGBT moduleNIndividual sub-module capacitance brachium pontis 1st sub-module capacitance negative pole lower with B phase;The is connected in the lower brachium pontis of B phase by IGBT moduleiThe lower brachium pontis of individual sub-module capacitance and B phase thei+ 1 sub-module capacitance negative pole, whereiniValue be 2~N-1;The is connected in the lower brachium pontis of B phase by IGBT moduleNIndividual sub-module capacitance and the 4th auxiliary capacitor negative pole.The annexation of C phase clamp diode is consistent with A phase or B.
Accompanying drawing explanation
Fig. 1 is the structural representation of full-bridge submodule;
Fig. 2 is that the centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology.
Detailed description of the invention
For of the present utility model performance and operation principle are expanded on further, it is specifically described with operation principle to the constituted mode of utility model below in conjunction with accompanying drawing.But full-bridge MMC based on this principle is not limited to Fig. 2 from all pressure topologys.
With reference to Fig. 2, the centralized full-bridge MMC of auxiliary capacitor based on inequality constraints from all pressing topology, including the full-bridge MMC model being made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively byNIndividual full-bridge submodule and 1 brachium pontis reactor are in series, including by 6NIndividual IGBT module, 6N+ 7 clamp diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from the most all pressing subsidiary loop.
In full-bridge MMC model, the 1st submodule of brachium pontis in A phase, one IGBT module midpoint is upwards connected with dc bus positive pole, and another IGBT module midpoint is connected with one IGBT module midpoint of the 2nd submodule of brachium pontis in A phase downwards;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2 ~N-1, one IGBT module midpoint is upwards with in A phase the of brachium pontisiOne IGBT module midpoint of-1 submodule is connected, and another IGBT module midpoint is downwards with in A phase the of brachium pontisiOne IGBT module midpoint of+1 submodule is connected;In A phase the of brachium pontisNIndividual submodule, one IGBT module midpoint is upwards with in A phase the of brachium pontisNOne IGBT module midpoint of-1 submodule is connected, and another IGBT module midpoint is down through two brachium pontis reactorsL 0One IGBT module midpoint of the 1st full-bridge submodule of brachium pontis lower with A phase is connected;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2 ~N-1, the of one IGBT module midpoint upwards brachium pontis lower with A phaseiOne IGBT module midpoint of-1 submodule is connected, another IGBT module midpoint downwards with the of A phase time brachium pontisiOne IGBT module midpoint of+1 submodule is connected;The of the lower brachium pontis of A phaseNIndividual submodule, one IGBT module midpoint is connected with dc bus negative pole downwards, the of another IGBT module midpoint upwards brachium pontis lower with A phaseNOne IGBT module midpoint of-1 submodule is connected.The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, auxiliary capacitorC 1With auxiliary capacitorC 2In parallel by clamp diode, auxiliary capacitorC 2Positive pole connects auxiliary IGBT moduleT 1, auxiliary capacitorC 1Negative pole connects clamp diode and is incorporated to dc bus positive pole;Auxiliary capacitorC 3With auxiliary capacitorC 4In parallel by clamp diode, auxiliary capacitorC 3Negative pole connects auxiliary IGBT moduleT 2, auxiliary capacitorC 4Positive pole connects clamp diode and is incorporated to dc bus negative pole.Clamp diode, passes through IGBT moduleT au_11st sub-module capacitance in brachium pontis in connection A phaseC ­ au­_1With auxiliary capacitorC 1Positive pole;Pass through IGBT moduleT au_i T au_i+1Connect in A phase in brachium pontis theiIndividual sub-module capacitanceC ­au­_i Withi+ 1 sub-module capacitanceC­au­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT au_N T al_1Connect in A phase in brachium pontis theNIndividual sub-module capacitanceC­au­_N Brachium pontis 1st sub-module capacitance lower with A phaseC­al­_1Positive pole;By IGBT module Tal_i T al_i+1Connect in the lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al­_i Brachium pontis lower with A phase thei+ 1 sub-module capacitanceC­al­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT al_N Connect in the lower brachium pontis of A phase theNIndividual sub-module capacitanceC ­al_N With auxiliary capacitorC 3Positive pole.Clamp diode, passes through IGBT moduleT bu_11st sub-module capacitance in brachium pontis in connection B phaseC­bu­_1With auxiliary capacitorC 2Negative pole;Pass through IGBT moduleT bu_i T bu_i+1Connect in B phase in brachium pontis theiIndividual sub-module capacitanceC­bu­_i Withi+ 1 sub-module capacitanceC ­bu­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bu_N T bl_1Connect in B phase in brachium pontis theNIndividual sub-module capacitanceC­bu_N Brachium pontis 1st sub-module capacitance lower with B phaseC­bl­_1Negative pole;Pass through IGBT moduleT bl_i T bl_i+1Connect in the lower brachium pontis of B phase theiIndividual sub-module capacitanceC­bl­_i Brachium pontis lower with B phase thei+ 1 sub-module capacitanceC ­bl­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bl_N Connect in the lower brachium pontis of B phase theNIndividual sub-module capacitance bl­_N With auxiliary capacitorC 4Negative pole.In C phase, the annexation of clamp diode is consistent with A.
Under normal circumstances, from the most all pressure subsidiary loop in 6NIndividual IGBT moduleT au_i T al_i T bu_iT bl_i T cu_i T cl_i Normally closed, whereiniValue be 1~N, first sub-module capacitance of brachium pontis in A phaseC au_1During bypass, now assist IGBT moduleT 1Disconnect, submodule electric capacityC au_1With auxiliary capacitorC 1In parallel by clamp diode;Brachium pontis in A phaseiIndividual sub-module capacitanceC au_i During bypass, whereiniValue be 2~N, submodule electric capacityC au_i With submodule electric capacityC au_i-1In parallel by clamp diode;Lower first the sub-module capacitance of brachium pontis of A phaseC al_1During bypass, submodule electric capacityC al_1By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC au_N In parallel;The lower brachium pontis of A phase theiIndividual sub-module capacitanceC al_i During bypass, whereiniValue be 2~N, submodule electric capacityC al_i With submodule electric capacityC al_i-1In parallel by clamp diode;Auxiliary IGBT moduleT 2During Guan Bi, auxiliary capacitorC 2By clamp diode and submodule electric capacityC al_N In parallel.
Under normal circumstances, from the most all pressure subsidiary loop in 6NIndividual IGBT moduleT au_i T al_i T bu_iT bl_i T cu_i T cl_i Normally closed, whereiniValue be 1~N, assist IGBT moduleT 1During Guan Bi, auxiliary capacitorC 2With submodule electric capacityC bu_1In parallel by clamp diode;Brachium pontis in B phaseiIndividual sub-module capacitanceC bu_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC bu_i With submodule electric capacityC bu_i+1In parallel by clamp diode;Brachium pontis in B phaseNIndividual sub-module capacitanceC bu_N During bypass, submodule electric capacityC bu_N By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC bl_1In parallel;The lower brachium pontis of B phase theiIndividual sub-module capacitanceC bl_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC bl_i With submodule electric capacityC bl_i+1In parallel by clamp diode;The lower brachium pontis of B phase theNIndividual sub-module capacitanceC bl_N During bypass, submodule electric capacityC bl_N With auxiliary capacitorC 4In parallel by clamp diode.Wherein assist IGBT moduleT 1" logic and " that trigger first submodule triggering signal of signal and brachium pontis in A, C phase consistent;Auxiliary IGBT moduleT 2The lower brachium pontis of triggering signal and B phase theNThe triggering signal of individual submodule is consistent.
During orthogonal stream energy is changed, each submodule alternately puts into, bypass, assists IGBT moduleT 1T 2Being alternately closed, turn off, between A, B phase upper and lower bridge arm, capacitance voltage is under the effect of clamp diode, column constraint under meeting:
Due to auxiliary capacitorC 1C 2C 3C 4The relation of voltage meets:
It follows that
Constraints that C, B the are alternate constraints alternate with A, B is consistent.
Being illustrated from above-mentioned, this full-bridge MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application rather than whole embodiments.Based on the embodiment in the application, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of the application protection.

Claims (4)

1. the centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from the most all pressing topology, it is characterised in that: include the full-bridge MMC model being made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively byNIndividual full-bridge submodule and 1 brachium pontis reactor are in series;Including by 6NIndividual IGBT module, 6N+ 7 clamp diodes, 4 auxiliary capacitorsC 1C 2C 3C 4, 2 auxiliary IGBT moduleT 1T 2Constitute the most all presses subsidiary loop.
The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints the most according to claim 1 is from all pressing topology, it is characterized in that: in full-bridge MMC model, 1st submodule of brachium pontis in A phase, one IGBT module midpoint is upwards connected with dc bus positive pole, and another IGBT module midpoint is connected with one IGBT module midpoint of the 2nd submodule of brachium pontis in A phase downwards;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2 ~N-1, one IGBT module midpoint is upwards with in A phase the of brachium pontisiOne IGBT module midpoint of-1 submodule is connected, and another IGBT module midpoint is downwards with in A phase the of brachium pontisiOne IGBT module midpoint of+1 submodule is connected;In A phase the of brachium pontisNIndividual submodule, one IGBT module midpoint is upwards with in A phase the of brachium pontisNOne IGBT module midpoint of-1 submodule is connected, and another IGBT module midpoint is down through two brachium pontis reactorsL 0One IGBT module midpoint of the 1st full-bridge submodule of brachium pontis lower with A phase is connected;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2 ~N-1, the of one IGBT module midpoint upwards brachium pontis lower with A phaseiOne IGBT module midpoint of-1 submodule is connected, another IGBT module midpoint downwards with the of A phase time brachium pontisiOne IGBT module midpoint of+1 submodule is connected;The of the lower brachium pontis of A phaseNIndividual submodule, one IGBT module midpoint is connected with dc bus negative pole downwards, the of another IGBT module midpoint upwards brachium pontis lower with A phaseNOne IGBT module midpoint of-1 submodule is connected;The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A;At A, B, C phase upper and lower bridge armiMechanical switch it is parallel with respectively between the output lead up and down of individual submoduleK au_i ,K al_i ,K bu_i ,K bl_i ,K cu_i ,K cl_i , whereiniValue be 1 ~N;A, B, C three-phase status that above-mentioned annexation is constituted is consistent.
The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints the most according to claim 1 is from all pressing topology, it is characterised in that: in all pressure subsidiary loops, auxiliary capacitorC 1With auxiliary capacitorC 2In parallel by clamp diode, auxiliary capacitorC 2Positive pole connects auxiliary IGBT moduleT 1, auxiliary capacitorC 1Negative pole connects clamp diode and is incorporated to dc bus positive pole;Auxiliary capacitorC 3With auxiliary capacitorC 4In parallel by clamp diode, auxiliary capacitorC 3Negative pole connects auxiliary IGBT moduleT 2, auxiliary capacitorC 4Positive pole connects clamp diode and is incorporated to dc bus negative pole;Clamp diode, passes through IGBT moduleT au_11st sub-module capacitance in brachium pontis in connection A phaseC­au­_1With auxiliary capacitorC 1Positive pole;Pass through IGBT moduleT au_i T au_i+1Connect in A phase in brachium pontis theiIndividual sub-module capacitanceC ­au­_i Withi+ 1 sub-module capacitanceC­au­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT au_N T al_1Connect in A phase in brachium pontis theNIndividual sub-module capacitanceC­au­_N Brachium pontis 1st sub-module capacitance lower with A phaseC­al­_1Positive pole;By IGBT module Tal_i T al_i+1Connect in the lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al­_i Brachium pontis lower with A phase thei+ 1 sub-module capacitanceC­al­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT al_N Connect in the lower brachium pontis of A phase theNIndividual sub-module capacitanceC ­al_N With auxiliary capacitorC 3Positive pole;Clamp diode, passes through IGBT moduleT bu_11st sub-module capacitance in brachium pontis in connection B phaseC­bu­_1With auxiliary capacitorC 2Negative pole;Pass through IGBT moduleT bu_i T bu_i+1Connect in B phase in brachium pontis theiIndividual sub-module capacitanceC­bu­_i Withi+ 1 sub-module capacitanceC ­bu­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bu_N T bl_1Connect in B phase in brachium pontis theNIndividual sub-module capacitanceC­bu_N Brachium pontis 1st sub-module capacitance lower with B phaseC­bl­_1Negative pole;Pass through IGBT moduleT bl_i T bl_i+1Connect in the lower brachium pontis of B phase theiIndividual sub-module capacitanceC­bl­_i Brachium pontis lower with B phase thei+ 1 sub-module capacitanceC ­bl­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bl_N Connect in the lower brachium pontis of B phase theNIndividual sub-module capacitance bl­_N With auxiliary capacitorC 4Negative pole;The annexation of C phase clamp diode is consistent with A phase or B;In above-mentioned A, B, C three-phase 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i , whereiniValue be 1~N, 6N+ 7 clamp diodes, 4 auxiliary capacitorsC 1C 2C 3C 4And 2 auxiliary IGBT moduleT 1T 2, collectively form from all pressing subsidiary loop.
The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints the most according to claim 1 is from the most all pressing topology, it is characterised in that: during normal condition, in the most all pressure subsidiary loops 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i Normally closed, during failure condition, 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i Disconnect, whereiniValue be 1~N;Under normal circumstances, first sub-module capacitance of brachium pontis in A phaseC­au­_1During bypass, now assist IGBT moduleT 1Disconnect, submodule electric capacityC ­ au­_1With auxiliary capacitorC 1In parallel by clamp diode;Brachium pontis in A phaseiIndividual sub-module capacitanceC­au­_i During bypass, whereiniValue be 2~N, submodule electric capacityC­au­_i With submodule electric capacityC­au­_i-1In parallel by clamp diode;Lower first the sub-module capacitance of brachium pontis of A phaseC­al_1During bypass, submodule electric capacityC­al­_1By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC­au­_N In parallel;The lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al_i During bypass, whereiniValue be 2~N, submodule electric capacityC ­ al­_i With submodule electric capacityC­al_i-1In parallel by clamp diode;Auxiliary IGBT moduleT 2During Guan Bi, auxiliary capacitorC 3By clamp diode and submodule electric capacityC­al_N In parallel;Auxiliary IGBT moduleT 1During Guan Bi, auxiliary capacitorC 2With submodule electric capacityC­bu­_1In parallel by clamp diode;Brachium pontis in B phaseiIndividual sub-module capacitanceC ­bu­_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bu­_i With submodule electric capacityC ­bu­_i+1In parallel by clamp diode;Brachium pontis in B phaseNIndividual sub-module capacitanceC ­bu_N During bypass, submodule electric capacityC ­bu­_N By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC ­bl­_1In parallel;The lower brachium pontis of B phase theiIndividual sub-module capacitanceC ­bl_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bl­_i With submodule electric capacity bl_i+1In parallel by clamp diode;The lower brachium pontis of B phaseNIndividual sub-module capacitanceC­bl_N During bypass, submodule electric capacityC­bl­_N With auxiliary capacitorC­4In parallel by clamp diode;Wherein assist IGBT moduleT 1" logic and " that trigger first submodule triggering signal of signal and brachium pontis in A, C phase consistent;Auxiliary IGBT moduleT 2The lower brachium pontis of triggering signal and B phase theNThe triggering signal of individual submodule is consistent;During orthogonal stream energy is changed, each submodule alternately puts into, bypass, assists IGBT moduleT 1T 2Being alternately closed, turn off, A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,U 1U au_1U C ­au_2…≥U C ­au_N U C ­al_1U C ­al_2…≥U al_N U 3;B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,U 2U bu_1U C ­bu_2…≤U C ­bu_N U C ­bl_1U bl_2…≤U C ­bl_N U 4;Against auxiliary capacitorC 1C 2Between voltage, auxiliary capacitorC 3C 4Two inequality constraints between voltage,U 1U 2,U 3U 4, the 4 of A, B phase upper and lower bridge armNIndividual sub-module capacitance,C au_i C al_i C bu_i C bl_i , whereiniValue be 1~N, and auxiliary capacitorC 1C 2C 3C 4, voltage is in self-balancing state, and A, B of topology are alternate possesses submodule capacitor voltage from the ability of equalization;If the form of the composition of C phase is consistent with A in topology, then the constraints of C, B capacitive coupling voltage is consistent with capacitance voltage constraints between A, B;If the form of the composition of C phase is consistent with B in topology, then the constraints of A, C capacitive coupling voltage is consistent with capacitance voltage constraints between A, B, and topology possesses submodule capacitor voltage from the ability of equalization.
CN201620068889.1U 2016-01-25 2016-01-25 The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology Expired - Fee Related CN205754039U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105515424A (en) * 2016-01-25 2016-04-20 华北电力大学 Auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on inequality constraints

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105515424A (en) * 2016-01-25 2016-04-20 华北电力大学 Auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on inequality constraints
CN105515424B (en) * 2016-01-25 2018-10-30 华北电力大学 Auxiliary capacitor centralization full-bridge MMC based on inequality constraints is topological from pressure

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