CN105515424A - Auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on inequality constraints - Google Patents
Auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on inequality constraints Download PDFInfo
- Publication number
- CN105515424A CN105515424A CN201610047417.2A CN201610047417A CN105515424A CN 105515424 A CN105515424 A CN 105515424A CN 201610047417 A CN201610047417 A CN 201610047417A CN 105515424 A CN105515424 A CN 105515424A
- Authority
- CN
- China
- Prior art keywords
- phase
- brachium pontis
- submodule
- igbt module
- auxiliary capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 87
- 238000006243 chemical reaction Methods 0.000 claims abstract description 3
- 230000000694 effects Effects 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 3
- 239000012141 concentrate Substances 0.000 claims 4
- 230000008878 coupling Effects 0.000 claims 4
- 238000010168 coupling process Methods 0.000 claims 4
- 238000005859 coupling reaction Methods 0.000 claims 4
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000009434 installation Methods 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 claims 1
- 230000001960 triggered effect Effects 0.000 abstract 1
- 238000011217 control strategy Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
- Power Conversion In General (AREA)
Abstract
The invention provides an auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on inequality constraints. The full-bridge MMC self-voltage-sharing topology is built by combining a full-bridge MMC model and a self-voltage-sharing auxiliary loop which are electrically connected through 6N IGBT modules in the auxiliary loop. When the IGBT modules are triggered, the full-bridge MMC model and the self-voltage-sharing auxiliary loop form the auxiliary capacitor centralized full-bridge MMC self-voltage-sharing topology based on the inequality constraints; when the IGBT modules are locked, the topology is equivalent to a full-bridge MMC topology. The full-bridge MMC self-voltage-sharing topology can clamp direct current side faults, does not depend on special voltage-sharing control, can spontaneously achieve capacitor voltage balance of submodules on the basis of completing alternating current and direct current energy conversion, and meanwhile can correspondingly reduce the trigger frequency and capacitance value of the submodules to achieve full-bridge MMC base frequency modulation.
Description
Technical field
The present invention relates to flexible transmission field, being specifically related to the centralized full-bridge MMC of a kind of auxiliary capacitor based on inequality constraints from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, MMC adopts submodule (Sub-module, SM) mode of cascade constructs converter valve, avoid the direct series connection of large metering device, reduce the conforming requirement of device, be convenient to dilatation and redundant configuration simultaneously.Along with the rising of level number, output waveform, close to sinusoidal, effectively can avoid the defect of low level VSC-HVDC.
Full-bridge MMC is combined by full-bridge submodule, and full-bridge submodule is by four IGBT module, and a sub-module capacitance and 1 mechanical switch are formed, and flexible operation, has DC Line Fault clamping ability.
Different from two level, three level VSC, the DC voltage of full-bridge MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure the waveform quality that AC voltage exports and ensure that in module, each power semiconductor bears identical stress, also in order to better support direct voltage, reduce alternate circulation, must ensure that submodule capacitor voltage is in the state of dynamic stability in the periodicity flowing of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving full-bridge MMC Neutron module capacitance voltage equalization problem at present.But the realization of ranking function must rely on the Millisecond sampling of capacitance voltage, needs a large amount of transducers and optical-fibre channel to be coordinated; Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, for the hardware designs of controller brings huge challenge; In addition, sequence all presses the cut-off frequency of the realization of algorithm to submodule to have very high requirement, cut-offs frequency and all presses effect to be closely related, in practice process, may because all press the restriction of effect, the trigger rate of raising submodule of having to, and then bring the increase of converter loss.
Document " ADC-LinkVoltageSelf-BalanceMethodforaDiode-ClampedModula rMultilevelConverterWithMinimumNumberofVoltageSensors ", proposes a kind of clamp diode and transformer of relying on to realize the thinking of MMC submodule capacitor voltage equilibrium.But the program to a certain degree destroys the modular nature of submodule in design, submodule capacitive energy interchange channel is also confined to mutually, the existing structure of MMC could not be made full use of, while being introduced in of three transformers makes control strategy complicated, also can bring larger improvement cost.
Summary of the invention
For the problems referred to above, the object of the invention is to propose a kind of economy, modular, do not rely on and all press algorithm, simultaneously can corresponding reduction submodule trigger rate and capacitor's capacity and the full-bridge MMC with DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of the present invention is as follows.
The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints from all pressing topology, comprises the full-bridge MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
nindividual full-bridge submodule and 1 brachium pontis reactor are in series; Comprise by 6
nindividual IGBT module, 6
n+ 7 clamping diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from all pressing subsidiary loop.
The centralized full-bridge MMC of the above-mentioned auxiliary capacitor based on inequality constraints is from all pressing topology, in full-bridge MMC model, 1st submodule of brachium pontis in A phase, an one IGBT module mid point is upwards connected with DC bus positive pole, and another IGBT module mid point is connected with the 2nd submodule IGBT module mid point of brachium pontis in A phase downwards; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with of brachium pontis in A phase
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of brachium pontis in A phase
i+ 1 submodule IGBT module mid point is connected; In A phase brachium pontis
nindividual submodule, an one IGBT module mid point is connected through the 1st submodule IGBT module mid point of the lower brachium pontis of two brachium pontis reactors and A phase downwards, another IGBT module mid point upwards with the of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with A phase lower brachium pontis the
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of A phase time brachium pontis
i+ 1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
nindividual submodule, an one IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule two IGBT module mid points are connected.The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A.
The centralized full-bridge MMC of the above-mentioned auxiliary capacitor based on inequality constraints is from all pressing topology, from all pressing in subsidiary loop, first auxiliary capacitor is in parallel by clamping diode with second auxiliary capacitor, second auxiliary capacitor positive pole connects auxiliary IGBT module, and first auxiliary capacitor negative pole connects clamping diode and be incorporated to DC bus positive pole; 3rd auxiliary capacitor is in parallel by clamping diode with the 4th auxiliary capacitor, and the 3rd auxiliary capacitor negative pole connects auxiliary IGBT module, and the 4th auxiliary capacitor positive pole connects clamping diode and be incorporated to DC bus negative pole.Clamping diode, by the 1st sub-module capacitance and first auxiliary capacitor positive pole in brachium pontis in IGBT module connection A phase; The is connected in A phase in brachium pontis by IGBT module
iindividual sub-module capacitance and
i+ 1 sub-module capacitance positive pole, wherein
ivalue be 1 ~
n-1; The is connected in A phase in brachium pontis by IGBT module
nindividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower to A phase; The is connected in the lower brachium pontis of A phase by IGBT module
ithe lower brachium pontis of individual sub-module capacitance and A phase the
i+ 1 sub-module capacitance positive pole, wherein
ivalue be 1 ~
n-1; The is connected in the lower brachium pontis of A phase by IGBT module
nindividual sub-module capacitance and the 3rd auxiliary capacitor positive pole.Clamping diode, by the 1st sub-module capacitance and second auxiliary capacitor negative pole in brachium pontis in IGBT module connection B phase; The is connected in B phase in brachium pontis by IGBT module
iindividual sub-module capacitance and
i+ 1 sub-module capacitance negative pole, wherein
ivalue be 1 ~
n-1; The is connected in B phase in brachium pontis by IGBT module
nindividual sub-module capacitance brachium pontis 1st sub-module capacitance negative pole lower to B phase; The is connected in the lower brachium pontis of B phase by IGBT module
ithe lower brachium pontis of individual sub-module capacitance and B phase the
i+ 1 sub-module capacitance negative pole, wherein
ivalue be 2 ~
n-1; The is connected in the lower brachium pontis of B phase by IGBT module
nindividual sub-module capacitance and the 4th auxiliary capacitor negative pole.The annexation of C phase clamping diode is consistent with A phase or B.
Accompanying drawing explanation
Fig. 1 is the structural representation of full-bridge submodule;
Fig. 2 is from all pressing topology based on the centralized full-bridge MMC of auxiliary capacitor of inequality constraints.
Embodiment
For setting forth performance of the present invention and operation principle further, be specifically described to the constituted mode invented and operation principle below in conjunction with accompanying drawing.But be not limited to Fig. 2 based on the full-bridge MMC of this principle from all pressing topology.
With reference to figure 2, the centralized full-bridge MMC of the auxiliary capacitor based on inequality constraints from all pressing topology, comprises the full-bridge MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
nindividual full-bridge submodule and 1 brachium pontis reactor are in series, and comprise by 6
nindividual IGBT module, 6
n+ 7 clamping diodes, 4 auxiliary capacitors, 2 auxiliary IGBT module compositions from all pressing subsidiary loop.
In full-bridge MMC model, the 1st submodule of brachium pontis in A phase, an one IGBT module mid point is upwards connected with DC bus positive pole, and another IGBT module mid point is connected with the 2nd submodule IGBT module mid point of brachium pontis in A phase downwards; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with of brachium pontis in A phase
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of brachium pontis in A phase
i+ 1 submodule IGBT module mid point is connected; In A phase brachium pontis
nindividual submodule, an one IGBT module mid point upwards with of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st full-bridge submodule IGBT module mid point of the lower brachium pontis of A phase; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with A phase lower brachium pontis the
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of A phase time brachium pontis
i+ 1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
nindividual submodule, an one IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule IGBT module mid point is connected.The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, auxiliary capacitor
c 1with auxiliary capacitor
c 2in parallel by clamping diode, auxiliary capacitor
c 2positive pole connects auxiliary IGBT module
t 1, auxiliary capacitor
c 1negative pole connects clamping diode and is incorporated to DC bus positive pole; Auxiliary capacitor
c 3with auxiliary capacitor
c 4in parallel by clamping diode, auxiliary capacitor
c 3negative pole connects auxiliary IGBT module
t 2, auxiliary capacitor
c 4positive pole connects clamping diode and is incorporated to DC bus negative pole.Clamping diode, passes through IGBT module
t au_11st sub-module capacitance in brachium pontis in connection A phase
c -au-_1
with auxiliary capacitor
c 1positive pole; Pass through IGBT module
t au_
i ,
t au_
i+ 1
to connect in A phase in brachium pontis the
iindividual sub-module capacitance
c -au-_
i with
i+ 1 sub-module capacitance
c-
au-_
i+ 1
positive pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t au_
n ,
t al_1to connect in A phase in brachium pontis the
nindividual sub-module capacitance
c-
au-_
n brachium pontis 1st sub-module capacitance lower to A phase
c-
al-_1positive pole; By IGBT module T
al_
i ,
t al_
i+ 1
to connect in the lower brachium pontis of A phase the
iindividual sub-module capacitance
c -al-_
i with the lower brachium pontis of A phase the
i+ 1 sub-module capacitance
c-
al-_
i+ 1
positive pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t al_
n to connect in the lower brachium pontis of A phase the
nindividual sub-module capacitance
c -al_
n with auxiliary capacitor
c 3positive pole.Clamping diode, passes through IGBT module
t bu_11st sub-module capacitance in brachium pontis in connection B phase
c-
bu-_1with auxiliary capacitor
c 2negative pole; Pass through IGBT module
t bu_
i ,
t bu_
i+ 1
to connect in B phase in brachium pontis the
iindividual sub-module capacitance
c-
bu-_
i with
i+ 1 sub-module capacitance
c -bu-_
i+ 1
negative pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t bu
_ N ,
t bl_1to connect in B phase in brachium pontis the
nindividual sub-module capacitance
c-
bu_
n brachium pontis 1st sub-module capacitance lower to B phase
c-
bl-_1negative pole; Pass through IGBT module
t bl_
i ,
t bl_
i+ 1
to connect in the lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl-_
i with the lower brachium pontis of B phase the
i+ 1 sub-module capacitance
c -bl-_
i+ 1
negative pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t bl_
n to connect in the lower brachium pontis of B phase the
nindividual sub-module capacitance
c- bl-_
n with auxiliary capacitor
c 4negative pole.In C phase, the annexation of clamping diode is consistent with A.
Under normal circumstances, from all pressing in subsidiary loop 6
nindividual IGBT module
t au_
i ,
t al_
i ,
t bu_i,
t bl_
i ,
t cu_
i ,
t cl_
i normally closed, wherein
ivalue be 1 ~
n, brachium pontis first sub-module capacitance in A phase
c au_1during bypass, now auxiliary IGBT module
t 1disconnect, submodule electric capacity
c au_1with auxiliary capacitor
c 1in parallel by clamping diode; Brachium pontis in A phase
iindividual sub-module capacitance
c au_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c au_
i with submodule electric capacity
c au_
i-1
in parallel by clamping diode; Lower brachium pontis first the sub-module capacitance of A phase
c al_1during bypass, submodule electric capacity
c al_1by clamping diode, two brachium pontis reactors
l 0with submodule electric capacity
c au_
n in parallel; The lower brachium pontis of A phase the
iindividual sub-module capacitance
c al_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c al_
i with submodule electric capacity
c al_
i-1
in parallel by clamping diode; Auxiliary IGBT module
t 2time closed, auxiliary capacitor
c 2by clamping diode and submodule electric capacity
c al_
n in parallel.
Under normal circumstances, from all pressing in subsidiary loop 6
nindividual IGBT module
t au_
i ,
t al_
i ,
t bu_i,
t bl_
i ,
t cu_
i ,
t cl_
i normally closed, wherein
ivalue be 1 ~
n, auxiliary IGBT module
t 1time closed, auxiliary capacitor
c 2with submodule electric capacity
c bu_1in parallel by clamping diode; Brachium pontis in B phase
iindividual sub-module capacitance
c bu_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c bu_
i with submodule electric capacity
c bu_
i+ 1
in parallel by clamping diode; Brachium pontis in B phase
nindividual sub-module capacitance
c bu_
n during bypass, submodule electric capacity
c bu_
n by clamping diode, two brachium pontis reactors
l 0with submodule electric capacity
c bl_1in parallel; The lower brachium pontis of B phase the
iindividual sub-module capacitance
c bl_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c bl_
i with submodule electric capacity
c bl_
i+ 1
in parallel by clamping diode; The lower brachium pontis of B phase the
nindividual sub-module capacitance
c bl_
n during bypass, submodule electric capacity
c bl_
n with auxiliary capacitor
c 4in parallel by clamping diode.Wherein auxiliary IGBT module
t 1triggering signal consistent with " the logic sum " of brachium pontis first submodule triggering signal in A, C phase; Auxiliary IGBT module
t 2the lower brachium pontis of triggering signal and B phase the
nthe triggering signal of individual submodule is consistent.
In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module
t 1,
t 2be alternately closed, turn off, between A, B phase upper and lower bridge arm, capacitance voltage is under the effect of clamping diode, meets lower column constraint:
Due to auxiliary capacitor
c 1,
c 2,
c 3,
c 4the relation of voltage meets:
It can thus be appreciated that,
The constraints that C, B the are alternate constraints alternate with A, B is consistent.
Illustrated from above-mentioned, this full-bridge MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.
Claims (6)
1. based on the centralized full-bridge MMC of auxiliary capacitor of inequality constraints from all pressing topology, it is characterized in that: comprise the full-bridge MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
nindividual full-bridge submodule and 1 brachium pontis reactor are in series; Comprise by 6
nindividual IGBT module, 6
n+ 7 clamping diodes, 4 auxiliary capacitors
c 1,
c 2,
c 3,
c 4, 2 auxiliary IGBT module
t 1,
t 2what form all presses subsidiary loop certainly.
2. the centralized full-bridge of the auxiliary capacitor based on the inequality constraints MMC according to right 1 is from all pressing topology, it is characterized in that: in full-bridge MMC model, 1st submodule of brachium pontis in A phase, an one IGBT module mid point is upwards connected with DC bus positive pole, and another IGBT module mid point is connected with the 2nd submodule IGBT module mid point of brachium pontis in A phase downwards; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with of brachium pontis in A phase
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of brachium pontis in A phase
i+ 1 submodule IGBT module mid point is connected; In A phase brachium pontis
nindividual submodule, an one IGBT module mid point upwards with of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st full-bridge submodule IGBT module mid point of the lower brachium pontis of A phase; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
n-1, an one IGBT module mid point upwards with A phase lower brachium pontis the
i-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with the of A phase time brachium pontis
i+ 1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
nindividual submodule, an one IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule IGBT module mid point is connected; The connected mode of B phase and C phase upper and lower bridge arm submodule is consistent with A; At of A, B, C phase upper and lower bridge arm
iindividual submodule be parallel with mechanical switch respectively between output line up and down
k au_
i ,
k al_
i ,
k bu_
i ,
k bl_
i ,
k cu_
i ,
k cl_
i , wherein
ivalue be 1 ~
n; A, B, C three-phase status that above-mentioned annexation is formed is consistent, and other topologys after three-phase symmetrized in turn are in interest field.
3. the centralized full-bridge of the auxiliary capacitor based on the inequality constraints MMC according to right 1, from all pressing topology, is characterized in that: from all pressing in subsidiary loop, auxiliary capacitor
c 1with auxiliary capacitor
c 2in parallel by clamping diode, auxiliary capacitor
c 2positive pole connects auxiliary IGBT module
t 1, auxiliary capacitor
c 1negative pole connects clamping diode and is incorporated to DC bus positive pole; Auxiliary capacitor
c 3with auxiliary capacitor
c 4in parallel by clamping diode, auxiliary capacitor
c 3negative pole connects auxiliary IGBT module
t 2, auxiliary capacitor
c 4positive pole connects clamping diode and is incorporated to DC bus negative pole; Clamping diode, passes through IGBT module
t au_11st sub-module capacitance in brachium pontis in connection A phase
c-
au-_1with auxiliary capacitor
c 1positive pole; Pass through IGBT module
t au_
i ,
t au_
i+ 1
to connect in A phase in brachium pontis the
iindividual sub-module capacitance
c -au-_
i with
i+ 1 sub-module capacitance
c-
au-_
i+ 1
positive pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t au_
n ,
t al_1to connect in A phase in brachium pontis the
nindividual sub-module capacitance
c-
au-_
n brachium pontis 1st sub-module capacitance lower to A phase
c-
al-_1positive pole; By IGBT module T
al_
i ,
t al_
i+ 1
to connect in the lower brachium pontis of A phase the
iindividual sub-module capacitance
c -al-_
i with the lower brachium pontis of A phase the
i+ 1 sub-module capacitance
c-
al-_
i+ 1
positive pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t al_
n to connect in the lower brachium pontis of A phase the
nindividual sub-module capacitance
c -al_
n with auxiliary capacitor
c 3positive pole; Clamping diode, passes through IGBT module
t bu_11st sub-module capacitance in brachium pontis in connection B phase
c-
bu-_1with auxiliary capacitor
c 2negative pole; Pass through IGBT module
t bu_
i ,
t bu_
i+ 1
to connect in B phase in brachium pontis the
iindividual sub-module capacitance
c-
bu-_
i with
i+ 1 sub-module capacitance
c -bu-_
i+ 1
negative pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t bu
_ N ,
t bl_1to connect in B phase in brachium pontis the
nindividual sub-module capacitance
c-
bu_
n brachium pontis 1st sub-module capacitance lower to B phase
c-
bl-_1negative pole; Pass through IGBT module
t bl_
i ,
t bl_
i+ 1
to connect in the lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl-_
i with the lower brachium pontis of B phase the
i+ 1 sub-module capacitance
c -bl-_
i+ 1
negative pole, wherein
ivalue be 1 ~
n-1; Pass through IGBT module
t bl_
n to connect in the lower brachium pontis of B phase the
nindividual sub-module capacitance
c- bl-_
n with auxiliary capacitor
c 4negative pole; The annexation of C phase clamping diode is consistent with A phase or B; In above-mentioned A, B, C three-phase 6
nindividual IGBT module
t au_
i ,
t al_
i ,
t bu_
i ,
t bl_
i ,
t cu_
i ,
t cl_
i , wherein
ivalue be 1 ~
n, 6
n+ 7 clamping diodes, 4 auxiliary capacitors
c 1,
c 2,
c 3,
c 4and 2 auxiliary IGBT module
t 1,
t 2, common formation is from all pressing subsidiary loop.
4. the centralized full-bridge of the auxiliary capacitor based on the inequality constraints MMC according to right 1 from all pressing topology, is characterized in that: during normal condition, from all pressing in subsidiary loop 6
nindividual IGBT module
t au_
i ,
t al_
i ,
t bu_
i ,
t bl_
i ,
t cu_
i ,
t cl_
i normally closed, during failure condition, 6
nindividual IGBT module
t au_
i ,
t al_
i ,
t bu_
i ,
t bl_
i ,
t cu_
i ,
t cl_
i disconnect, wherein
ivalue be 1 ~
n; Under normal circumstances, brachium pontis first sub-module capacitance in A phase
c-
au-_1during bypass, now auxiliary IGBT module
t 1disconnect, submodule electric capacity
c -au-_1
with auxiliary capacitor
c 1in parallel by clamping diode; Brachium pontis in A phase
iindividual sub-module capacitance
c-
au-_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c-
au-_
i with submodule electric capacity
c-
au-_
i-1
in parallel by clamping diode; Lower brachium pontis first the sub-module capacitance of A phase
c-
al_1during bypass, submodule electric capacity
c-
al-_1by clamping diode, two brachium pontis reactors
l 0with submodule electric capacity
c-
au-_
n in parallel; The lower brachium pontis of A phase the
iindividual sub-module capacitance
c -al_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c -al-_
i with submodule electric capacity
c-
al_
i-1
in parallel by clamping diode; Auxiliary IGBT module
t 2time closed, auxiliary capacitor
c 3by clamping diode and submodule electric capacity
c-
al_
n in parallel; Auxiliary IGBT module
t 1time closed, auxiliary capacitor
c 2with submodule electric capacity
c-
bu-_1in parallel by clamping diode; Brachium pontis in B phase
iindividual sub-module capacitance
c -bu-_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c-
bu-_
i with submodule electric capacity
c -bu-_
i+ 1
in parallel by clamping diode; Brachium pontis in B phase
nindividual sub-module capacitance
c -bu_
n during bypass, submodule electric capacity
c -bu-_
n by clamping diode, two brachium pontis reactors
l 0with submodule electric capacity
c -bl-_1in parallel; The lower brachium pontis of B phase the
iindividual sub-module capacitance
c -bl_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c-
bl-_
i with submodule electric capacity
c- bl_
i+ 1
in parallel by clamping diode; The lower brachium pontis of B phase
nindividual sub-module capacitance
c-
bl_
n during bypass, submodule electric capacity
c-
bl-_
n with auxiliary capacitor
c-
4in parallel by clamping diode; Wherein auxiliary IGBT module
t 1triggering signal consistent with " the logic sum " of brachium pontis first submodule triggering signal in A, C phase; Auxiliary IGBT module
t 2the lower brachium pontis of triggering signal and B phase the
nthe triggering signal of individual submodule is consistent; In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module
t 1,
t 2be alternately closed, turn off, A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamping diode, meets lower column constraint,
u c-1
>=
u c-au_1
>=
u c-au_2
>=
u c-au_
n >=
u c-al_1
>=
u c-al_2
>=
u c-al_
n >=
u c-3
; B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamping diode, meets lower column constraint,
u c-2
≤
u c-bu_1
≤
u c-bu_2
≤
u c-bu_
n ≤
u c-bl_1
≤
u c-bl_2
≤
u c-bl_
n ≤
u c-4
; Against auxiliary capacitor
c 1,
c 2between voltage, auxiliary capacitor
c 3,
c 4two inequality constraintss between voltage,
u c-1
≤
u c-2
,
u c-3
>=
u c-4
, 4 of A, B phase upper and lower bridge arm
nindividual sub-module capacitance,
c au_
i ,
c al_
i ,
c bu_
i ,
c bl_
i , wherein
ivalue is 1 ~
n, and auxiliary capacitor
c 1,
c 2,
c 3,
c 4, voltage is in self-balancing state, and A, B of topology are alternate possesses submodule capacitor voltage from the ability of equalization; If the form of the composition of C phase is consistent with A in topology, then the constraints of C, B capacitive coupling voltage is consistent with capacitance voltage constraints between A, B; If the form of the composition of C phase is consistent with B in topology, then the constraints of A, C capacitive coupling voltage is consistent with capacitance voltage constraints between A, B, and topology possesses submodule capacitor voltage from the ability of equalization; Realize on the basis of the single-phase flowing of capacitive energy between adjacent submodule mutually utilizing clamping diode; the alternate flowing relying on the inequality constraints between auxiliary capacitor to realize capacitive energy forms the peripheral passage of capacitive energy; and then keep alternate submodule capacitor voltage to stablize, be the protection content of this right.
5. the centralized full-bridge of the auxiliary capacitor based on the inequality constraints MMC according to right 1, from all pressing topology, is characterized in that: auxiliary capacitor
c 1,
c 2,
c 3,
c 4both as the passage of A, B capacitive coupling energy exchange, again as the passage of B, C capacitive coupling energy exchange; Function focus utilization in topology of auxiliary capacitor all presses the device consumption in subsidiary loop certainly with minimizing; Auxiliary capacitor
c 1,
c 2function concentrate, auxiliary capacitor
c 3,
c 4function do not concentrate; Auxiliary capacitor
c 1,
c 2function do not concentrate, auxiliary capacitor
c 3,
c 4function concentrate topology in interest field.
6. the centralized full-bridge of the auxiliary capacitor based on the inequality constraints MMC according to right 1 is from all pressing topology, it is characterized in that: the centralized full-bridge MMC of the auxiliary capacitor based on inequality constraints is from all pressing topology, flexible direct-current transmission field can not only be directly applied to as multi-level voltage source current converter, also by forming STATCOM (STATCOM), Research on Unified Power Quality Conditioner (UPQC), the application of installations such as THE UPFC (UPFC) are in flexible AC transmission field; Other application scenarios of this invention topology of indirect utilization and thought are in interest field.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610047417.2A CN105515424B (en) | 2016-01-25 | 2016-01-25 | Auxiliary capacitor centralization full-bridge MMC based on inequality constraints is topological from pressure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610047417.2A CN105515424B (en) | 2016-01-25 | 2016-01-25 | Auxiliary capacitor centralization full-bridge MMC based on inequality constraints is topological from pressure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105515424A true CN105515424A (en) | 2016-04-20 |
| CN105515424B CN105515424B (en) | 2018-10-30 |
Family
ID=55723154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610047417.2A Expired - Fee Related CN105515424B (en) | 2016-01-25 | 2016-01-25 | Auxiliary capacitor centralization full-bridge MMC based on inequality constraints is topological from pressure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105515424B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101253675A (en) * | 2005-08-30 | 2008-08-27 | 西门子公司 | Converter circuit comprising distributed energy stores |
| CN102223080A (en) * | 2011-06-10 | 2011-10-19 | 浙江大学 | Mixed clamping back-to-back multi-level AC-DC-AC switching circuit |
| CN102832841A (en) * | 2012-08-27 | 2012-12-19 | 清华大学 | Modularized multi-level converter with auxiliary diode |
| CN203608108U (en) * | 2013-12-17 | 2014-05-21 | 山东大学 | Capacitance voltage self-balancing circuit of modular multilevel converter |
| CN205754039U (en) * | 2016-01-25 | 2016-11-30 | 华北电力大学 | The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology |
-
2016
- 2016-01-25 CN CN201610047417.2A patent/CN105515424B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101253675A (en) * | 2005-08-30 | 2008-08-27 | 西门子公司 | Converter circuit comprising distributed energy stores |
| CN102223080A (en) * | 2011-06-10 | 2011-10-19 | 浙江大学 | Mixed clamping back-to-back multi-level AC-DC-AC switching circuit |
| CN102832841A (en) * | 2012-08-27 | 2012-12-19 | 清华大学 | Modularized multi-level converter with auxiliary diode |
| CN203608108U (en) * | 2013-12-17 | 2014-05-21 | 山东大学 | Capacitance voltage self-balancing circuit of modular multilevel converter |
| CN205754039U (en) * | 2016-01-25 | 2016-11-30 | 华北电力大学 | The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology |
Non-Patent Citations (2)
| Title |
|---|
| CONGZHE GAO 等: "A DC-Link Voltage Self-Balance Method for a Diode-Clamped Modular Multilevel Converter With Minimum Number of Voltage Sensors", 《IEEE TRANSACTIONS ON POWER ELECTRONICS》 * |
| XIN ZHAO 等: "Research on submodule capacitance voltage balancing of MMC based on carrier phase shifted SPWM technique", 《CHINA INTERNATIONAL CONFERENCE ON ELECTRICITY DISTRIBUTION》 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105515424B (en) | 2018-10-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN205960964U (en) | Supplementary centralized half -bridge of electric capacity / full -bridge series -parallel connection MMC is from voltage -sharing topology based on inequality constraint | |
| CN205754047U (en) | The half-bridge MMC of formula without auxiliary capacitor based on inequality constraints is from all pressing topology | |
| CN205754041U (en) | The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology | |
| CN205657607U (en) | Supplementary electric capacity distributing type half -bridge / single clamp series -parallel connection MMC is from voltage -sharing topology based on inequality constraint | |
| CN105515427A (en) | Auxiliary-capacitor-free full-bridge MMC self-voltage-sharing topology based on inequality constraints | |
| CN105429491A (en) | Inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology | |
| CN206099809U (en) | There is not supplementary capacitanc full -bridge MMC from voltage -sharing topology based on inequality constraint | |
| CN105450070A (en) | Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints | |
| CN105471259A (en) | Auxiliary capacitor centralized half-bridge/single-clamping series-parallel MMC automatic voltage-equalizing topology based on equality constraint | |
| CN105471302A (en) | Auxiliary capacitor centralized half-bridge MMC automatic voltage-equalizing topology based on equality constraint | |
| CN105515428A (en) | Auxiliary-capacitor-free half-bridge MMC self-voltage-sharing topology based on inequality constraints | |
| CN205754044U (en) | The centralized half-bridge of auxiliary capacitor based on equality constraint/full-bridge series-parallel connection MMC is from all pressing topology | |
| CN205754039U (en) | The centralized full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology | |
| CN205754042U (en) | The centralized half-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology | |
| CN205657605U (en) | Single clamp MMC is from voltage -sharing topology for supplementary electric capacity distributing type based on equality constraint | |
| CN205754029U (en) | The centralized single clamp MMC of auxiliary capacitor based on inequality constraints is from all pressing topology | |
| CN205754046U (en) | The distributed half-bridge of auxiliary capacitor based on equality constraint/full-bridge series-parallel connection MMC is from all pressing topology | |
| CN205754045U (en) | The centralized half-bridge MMC of auxiliary capacitor based on equality constraint is from all pressing topology | |
| CN105450069A (en) | Auxiliary capacitance concentrated type full-bridge MMC self-voltage-sharing topology based on equality constraints | |
| CN205657606U (en) | Single clamp MMC is from voltage -sharing topology for supplementary electric capacity distributing type based on inequality constraint | |
| CN205725504U (en) | The centralized full-bridge MMC of auxiliary capacitor based on equality constraint is from all pressing topology | |
| CN105515426A (en) | Auxiliary capacitor concentrated type single-clamping MMC self-voltage-balancing topology based on equality constraints | |
| CN205754043U (en) | The distributed half-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology | |
| CN105515425A (en) | Auxiliary capacitor distributed half-bridge and full-bridge series-parallel MMC self-voltage-sharing topology based on inequality constraints | |
| CN205754048U (en) | The distributed full-bridge MMC of auxiliary capacitor based on inequality constraints is from all pressing topology |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20181030 |