CN105429491A - Inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology - Google Patents

Inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology Download PDF

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CN105429491A
CN105429491A CN201610047418.7A CN201610047418A CN105429491A CN 105429491 A CN105429491 A CN 105429491A CN 201610047418 A CN201610047418 A CN 201610047418A CN 105429491 A CN105429491 A CN 105429491A
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submodule
phase
module
brachium pontis
igbt module
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赵成勇
许建中
刘航
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North China Electric Power University
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North China Electric Power University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

The invention provides an inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology. The single clamping MMC self voltage-sharing topology is established by a single clamping MMC model and a self voltage-sharing auxiliary loop, which generate an electrical relation by 6N IGBT modules in the auxiliary loop, and by triggering of the IGBT modules, the single clamping MMC model and the self voltage-sharing auxiliary loop form the inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology, when IGBT modules interlock, topology equivalence is single clamping MMC topology. The single clamping MMC self voltage-sharing topology can clamp a direct current side fault, does not depend on special voltage-sharing control, can spontaneously realize balance of voltage and capacitance of submodules on a basis of finishing direct current and alternating current conversion, and can correspondingly reduce a triggering frequency and a capacitance value of each submodule to realize base frequency modulation of single clamping MMC.

Description

The centralized single clamp MMC of auxiliary capacitor based on inequality constraints is from all pressing topology
Technical field
The present invention relates to flexible transmission field, being specifically related to the centralized single clamp MMC of a kind of auxiliary capacitor based on inequality constraints from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, and MMC adopts the mode of sub module cascade to construct converter valve, avoids the direct series connection of large metering device, reduces the conforming requirement of device, be convenient to dilatation and redundant configuration simultaneously.Along with the rising of level number, output waveform, close to sinusoidal, effectively can avoid the defect of low level VSC-HVDC.
Single clamp MMC is combined by single clamp submodule, and each single clamp submodule is by 3 IGBT module, and 1 sub-module capacitance, 1 diode and 1 mechanical switch are formed, and cost is low, and running wastage is little.
Different from two level, three level VSC, the DC voltage of MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure the waveform quality that AC voltage exports and ensure that in module, each power semiconductor bears identical stress, also in order to better support direct voltage, reduce alternate circulation, must ensure that submodule capacitor voltage is in the state of dynamic stability in the periodicity flowing of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving MMC Neutron module capacitance voltage equalization problem at present.First, the realization of ranking function must rely on the Millisecond sampling of capacitance voltage, needs a large amount of transducers and optical-fibre channel to be coordinated; Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, for the hardware designs of controller brings huge challenge; In addition, sequence all presses the cut-off frequency of the realization of algorithm to submodule to have very high requirement, cut-offs frequency and all presses effect to be closely related, in practice process, may because all press the restriction of effect, the trigger rate of raising submodule of having to, and then bring the increase of converter loss.
Document " ADC-LinkVoltageSelf-BalanceMethodforaDiode-ClampedModula rMultilevelConverterWithMinimumNumberofVoltageSensors ", proposes a kind of clamp diode and transformer of relying on to realize the thinking of MMC submodule capacitor voltage equilibrium.But the program to a certain degree destroys the modular nature of submodule in design, submodule capacitive energy interchange channel is also confined to mutually, the existing structure of MMC could not be made full use of, while being introduced in of three transformers makes control strategy complicated, also can bring larger improvement cost.
Summary of the invention
For the problems referred to above, the object of the invention is to propose a kind of economy, modular, do not rely on and all press algorithm, simultaneously can corresponding reduction submodule trigger rate and capacitor's capacity and single clamp MMC with DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of the present invention is as follows.
The centralized single clamp MMC of auxiliary capacitor based on inequality constraints is from all pressing topology, and comprise the single clamp MMC model be made up of A, B, C three-phase, A, B, C three-phase is respectively by 2 nindividual single clamp submodule, 2 brachium pontis reactors are in series; Comprise by 6 nindividual IGBT module, 6 n+ 7 clamp diodes, 4 auxiliary capacitors and 2 auxiliary IGBT module form from all pressing subsidiary loop.
The centralized single clamp MMC of the above-mentioned auxiliary capacitor based on inequality constraints all presses topology, A phase upper and lower bridge arm certainly, in single clamp submodule, and diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule diode and IGBT module tie-point are connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards and in A phase brachium pontis the i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 submodule diode is connected with IGBT module tie-point; In A phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontis i+ 1 sub-module I GBT module mid point is connected, its IGBT module mid point upwards with A phase lower brachium pontis the i-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase nindividual submodule, its submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole.1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with DC bus positive pole with IGBT module tie-point, and its submodule IGBT module mid point is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 submodule diode is connected with IGBT module tie-point; In B phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0be connected with IGBT module tie-point with the 1st submodule diode of the lower brachium pontis of B phase; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of B phase nindividual submodule, its submodule diode and IGBT module tie-point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, also can be consistent with B.
The centralized single clamp MMC of the above-mentioned auxiliary capacitor based on inequality constraints is from all pressing topology, it is from all pressing in subsidiary loop, first auxiliary capacitor is in parallel by clamp diode with second auxiliary capacitor, second auxiliary capacitor positive pole connects auxiliary IGBT module, and first auxiliary capacitor negative pole connects clamp diode and be incorporated to DC bus positive pole; 3rd auxiliary capacitor is in parallel by clamp diode with the 4th auxiliary capacitor, and the 3rd auxiliary capacitor negative pole connects auxiliary IGBT module, and the 4th auxiliary capacitor positive pole connects clamp diode and be incorporated to DC bus negative pole.Clamp diode, by the 1st sub-module capacitance and first auxiliary capacitor positive pole in brachium pontis in IGBT module connection A phase; The is connected in A phase in brachium pontis by IGBT module iindividual sub-module capacitance and i+ 1 sub-module capacitance positive pole, wherein ivalue be 1 ~ n-1; The is connected in A phase in brachium pontis by IGBT module nindividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower to A phase; The is connected in the lower brachium pontis of A phase by IGBT module ithe lower brachium pontis of individual sub-module capacitance and A phase the i+ 1 sub-module capacitance positive pole, wherein ivalue be 1 ~ n-1; The is connected in the lower brachium pontis of A phase by IGBT module nindividual sub-module capacitance and the 3rd auxiliary capacitor positive pole.Clamp diode, by the 1st sub-module capacitance and second auxiliary capacitor negative pole in brachium pontis in IGBT module connection B phase; The is connected in B phase in brachium pontis by IGBT module iindividual sub-module capacitance and i+ 1 sub-module capacitance negative pole, wherein ivalue be 1 ~ n-1; The is connected in B phase in brachium pontis by IGBT module nindividual sub-module capacitance brachium pontis 1st sub-module capacitance negative pole lower to B phase; I-th sub-module capacitance and brachium pontis under B phase the is connected in the lower brachium pontis of B phase by IGBT module i+ 1 sub-module capacitance negative pole, wherein ivalue be 1 ~ n-1; The is connected in the lower brachium pontis of B phase by IGBT module nindividual sub-module capacitance and the 4th auxiliary capacitor negative pole.The annexation of C phase clamp diode is corresponding with the annexation of its submodule.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention is further described.
Fig. 1 is the structural representation of single clamp submodule;
Fig. 2 is from all pressing topology based on the centralized single clamp MMC of auxiliary capacitor of inequality constraints.
Embodiment
For setting forth performance of the present invention and operation principle further, be specifically described to the constituted mode invented and operation principle below in conjunction with accompanying drawing.But be not limited to Fig. 2 based on single clamp MMC of this principle from all pressing topology.
With reference to figure 2, the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints is from all pressing topology, and comprise the single clamp MMC model be made up of A, B, C three-phase, A, B, C three-phase is respectively by 2 nindividual single clamp submodule, 2 brachium pontis reactors are in series; Comprise by 6 nindividual IGBT module, 6 n+ 7 clamp diodes, 4 auxiliary capacitors c 1, c 2, c 3, c 4, 2 auxiliary IGBT module t 1, t 2what form all presses subsidiary loop certainly.
In single clamp MMC model, A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule diode and IGBT module tie-point are connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards and in A phase brachium pontis the i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 submodule diode is connected with IGBT module tie-point; In A phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontis i+ 1 sub-module I GBT module mid point is connected, its IGBT module mid point upwards with A phase lower brachium pontis the i-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase nindividual submodule, its submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole.1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with DC bus positive pole with IGBT module tie-point, and its submodule IGBT module mid point is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 submodule diode is connected with IGBT module tie-point; In B phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0be connected with IGBT module tie-point with the 1st submodule diode of the lower brachium pontis of B phase; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of B phase nindividual submodule, its submodule diode and IGBT module tie-point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, auxiliary capacitor c 1with auxiliary capacitor c 2in parallel by clamp diode, auxiliary capacitor c 2positive pole connects auxiliary IGBT module t 1, auxiliary capacitor c 1negative pole connects clamp diode and is incorporated to DC bus positive pole; Auxiliary capacitor c 3with auxiliary capacitor c 4in parallel by clamp diode, auxiliary capacitor c 3negative pole connects auxiliary IGBT module t 2, auxiliary capacitor c 4positive pole connects clamp diode and is incorporated to DC bus negative pole.Clamp diode, passes through IGBT module t au_11st sub-module capacitance in brachium pontis in connection A phase c -au-_1 with auxiliary capacitor c 1positive pole; Pass through IGBT module t au_ i , t au_ i+ 1 to connect in A phase in brachium pontis the iindividual sub-module capacitance c -au-_ i with i+ 1 sub-module capacitance c- au-_ i+ 1 positive pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t au_ n , t al_1to connect in A phase in brachium pontis the nindividual sub-module capacitance c- au-_ n brachium pontis 1st sub-module capacitance lower to A phase c- al-_1positive pole; By IGBT module T al_ i , t al_ i+ 1 to connect in the lower brachium pontis of A phase the iindividual sub-module capacitance c -al-_ i with the lower brachium pontis of A phase the i+ 1 sub-module capacitance c- al-_ i+ 1 positive pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t al_ n to connect in the lower brachium pontis of A phase the nindividual sub-module capacitance c -al_ n with auxiliary capacitor c 3positive pole.Clamp diode, passes through IGBT module t bu_11st sub-module capacitance in brachium pontis in connection B phase c- bu-_1with auxiliary capacitor c 2negative pole; Pass through IGBT module t bu_ i , t bu_ i+ 1 to connect in B phase in brachium pontis the iindividual sub-module capacitance c- bu-_ i with i+ 1 sub-module capacitance c -bu-_ i+ 1 negative pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t bu _ N , t bl_1to connect in B phase in brachium pontis the nindividual sub-module capacitance c- bu_ n brachium pontis 1st sub-module capacitance lower to B phase c- bl-_1negative pole; Pass through IGBT module t bl_ i , t bl_ i+ 1 to connect in the lower brachium pontis of B phase the iindividual sub-module capacitance c- bl-_ i with the lower brachium pontis of B phase the i+ 1 sub-module capacitance c -bl-_ i+ 1 negative pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t bl_ n to connect in the lower brachium pontis of B phase the nindividual sub-module capacitance c- bl-_ n with auxiliary capacitor c 4negative pole.In C phase, the annexation of clamp diode is consistent with A.
Under normal circumstances, from all pressing in subsidiary loop 6 nindividual IGBT module t au_ i , t al_ i , t bu_i, t bl_ i , t cu_ i , t cl_ i normally closed, wherein ivalue be 1 ~ n, brachium pontis first sub-module capacitance in A phase c -au-_1during bypass, now auxiliary IGBT module t 1disconnect, submodule electric capacity c -au-_1 with auxiliary capacitor c 1in parallel by clamp diode; Brachium pontis in A phase iindividual sub-module capacitance c- au-_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c- au-_ i with submodule electric capacity c- au-_ i-1 in parallel by clamp diode; Lower brachium pontis first the sub-module capacitance of A phase c- al_1during bypass, submodule electric capacity c- al-_1by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c- au-_ n in parallel; The lower brachium pontis of A phase the iindividual sub-module capacitance c -al_ i during bypass, wherein ivalue be 2 ~ n, submodule electric capacity c -al-_ i with submodule electric capacity c- al_ i-1 in parallel by clamp diode; Auxiliary IGBT module t 2time closed, auxiliary capacitor c 3by clamp diode and submodule electric capacity c- al_ n in parallel.
Under normal circumstances, from all pressing in subsidiary loop 6 nindividual IGBT module t au_ i , t al_ i , t bu_i, t bl_ i , t cu_ i , t cl_ i normally closed, wherein ivalue be 1 ~ n, auxiliary IGBT module t 1time closed, auxiliary capacitor c 2with submodule electric capacity c- bu-_1in parallel by clamp diode; Brachium pontis in B phase iindividual sub-module capacitance c -bu-_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c- bu-_ i with submodule electric capacity c -bu-_ i+ 1 in parallel by clamp diode; Brachium pontis in B phase nindividual sub-module capacitance c -bu_ n during bypass, submodule electric capacity c -bu-_ n by clamp diode, two brachium pontis reactors l 0with submodule electric capacity c -bl-_1in parallel; The lower brachium pontis of B phase the iindividual sub-module capacitance c -bl_ i during bypass, wherein ivalue be 1 ~ n-1, submodule electric capacity c- bl-_ i with submodule electric capacity c- bl_ i+ 1 in parallel by clamp diode; The lower brachium pontis of B phase nindividual sub-module capacitance c- bl_ n during bypass, submodule electric capacity c- bl-_ n with auxiliary capacitor c- 4in parallel by clamp diode.Wherein auxiliary IGBT module t 1triggering signal consistent with " the logic sum " of brachium pontis first submodule triggering signal in A, C phase; Auxiliary IGBT module t 2the lower brachium pontis of triggering signal and B phase the nthe triggering signal of individual submodule is consistent.
In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module t 1, t 2be alternately closed, turn off, A, B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint:
Due to auxiliary capacitor c 1, c 2, c 3, c 4the relation of voltage meets:
It can thus be appreciated that,
The constraints that C, B the are alternate constraints alternate with A, B is consistent.
Illustrated from above-mentioned, this single clamp MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.

Claims (6)

1. the centralized single clamp MMC of auxiliary capacitor based on inequality constraints all presses topology certainly, it is characterized in that: comprise the single clamp MMC model be made up of A, B, C three-phase, A, B, C three-phase is respectively by 2 nindividual single clamp submodule, 2 brachium pontis reactors are in series; Comprise by 6 nindividual IGBT module, 6 n+ 7 clamp diodes, 4 auxiliary capacitors c 1, c 2, c 3, c 4, 2 auxiliary IGBT module t 1, t 2what form all presses subsidiary loop certainly.
2. the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints according to right 1, from all pressing topology, is characterized in that: A phase upper and lower bridge arm, in single clamp submodule, and diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole; 1st submodule of brachium pontis in A phase, its submodule diode and IGBT module tie-point are connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards and in A phase brachium pontis the i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase i-1 submodule diode is connected with IGBT module tie-point; In A phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point are downwards through two brachium pontis reactors l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, its submodule IGBT module mid point upwards with the of brachium pontis in A phase n-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontis i+ 1 sub-module I GBT module mid point is connected, its IGBT module mid point upwards with A phase lower brachium pontis the i-1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of A phase nindividual submodule, its submodule diode is connected with DC bus negative pole downwards with IGBT module tie-point, its submodule IGBT module mid point upwards with A phase lower brachium pontis the n-1 submodule diode is connected with IGBT module tie-point; B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole; 1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with DC bus positive pole with IGBT module tie-point, and its submodule IGBT module mid point is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards; In B phase brachium pontis iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase i+ 1 submodule diode is connected with IGBT module tie-point; In B phase brachium pontis nindividual submodule, its submodule diode and IGBT module tie-point upwards with of brachium pontis in B phase n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is downwards through two brachium pontis reactors l 0be connected with IGBT module tie-point with the 1st submodule diode of the lower brachium pontis of B phase; The of the lower brachium pontis of B phase iindividual submodule, wherein ivalue be 2 ~ n-1, its submodule diode and IGBT module tie-point upwards with B phase lower brachium pontis the i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis i+ 1 submodule diode is connected with IGBT module tie-point; The of the lower brachium pontis of B phase nindividual submodule, its submodule diode and IGBT module tie-point be the lower brachium pontis the with B phase upwards n-1 sub-module I GBT module mid point is connected, and its submodule IGBT module mid point is connected with DC bus negative pole downwards; The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, also can be consistent with B; At A, B, C phase upper and lower bridge arm imechanical switch is parallel with respectively between the upper and lower output line of individual submodule k au_ i , k al_ i , k bu_ i , k bl_ i , k cu_ i , k cl_ i , wherein ivalue be 1 ~ n; A, B, C three-phase status that above-mentioned annexation is formed is consistent, and other topologys after three-phase symmetrized in turn are in interest field.
3. the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints according to right 1, from all pressing topology, is characterized in that: from all pressing in subsidiary loop, auxiliary capacitor c 1with auxiliary capacitor c 2in parallel by clamp diode, auxiliary capacitor c 2positive pole connects auxiliary IGBT module t 1, auxiliary capacitor c 1negative pole connects clamp diode and is incorporated to DC bus positive pole; Auxiliary capacitor c 3with auxiliary capacitor c 4in parallel by clamp diode, auxiliary capacitor c 3negative pole connects auxiliary IGBT module t 2, auxiliary capacitor c 4positive pole connects clamp diode and is incorporated to DC bus negative pole; Clamp diode, passes through IGBT module t au_11st sub-module capacitance in brachium pontis in connection A phase c- au-_1with auxiliary capacitor c 1positive pole; Pass through IGBT module t au_ i , t au_ i+ 1 to connect in A phase in brachium pontis the iindividual sub-module capacitance c -au-_ i with i+ 1 sub-module capacitance c- au-_ i+ 1 positive pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t au_ n , t al_1to connect in A phase in brachium pontis the nindividual sub-module capacitance c- au-_ n brachium pontis 1st sub-module capacitance lower to A phase c- al-_1positive pole; By IGBT module T al_ i , t al_ i+ 1 to connect in the lower brachium pontis of A phase the iindividual sub-module capacitance c -al-_ i with the lower brachium pontis of A phase the i+ 1 sub-module capacitance c- al-_ i+ 1 positive pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t al_ n to connect in the lower brachium pontis of A phase the nindividual sub-module capacitance c -al_ n with auxiliary capacitor c 3positive pole; Clamp diode, passes through IGBT module t bu_11st sub-module capacitance in brachium pontis in connection B phase c- bu-_1with auxiliary capacitor c 2negative pole; Pass through IGBT module t bu_ i , t bu_ i+ 1 to connect in B phase in brachium pontis the iindividual sub-module capacitance c- bu-_ i with i+ 1 sub-module capacitance c -bu-_ i+ 1 negative pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t bu _ N , t bl_1to connect in B phase in brachium pontis the nindividual sub-module capacitance c- bu_ n brachium pontis 1st sub-module capacitance lower to B phase c- bl-_1negative pole; Pass through IGBT module t bl_ i , t bl_ i+ 1 to connect in the lower brachium pontis of B phase the iindividual sub-module capacitance c- bl-_ i with the lower brachium pontis of B phase the i+ 1 sub-module capacitance c -bl-_ i+ 1 negative pole, wherein ivalue be 1 ~ n-1; Pass through IGBT module t bl_ n to connect in the lower brachium pontis of B phase the nindividual sub-module capacitance c- bl-_ n with auxiliary capacitor c 4negative pole; The annexation of C phase clamp diode is corresponding with the annexation of its submodule; In above-mentioned A, B, C three-phase 6 nindividual IGBT module t au_ i , t al_ i , t bu_ i , t bl_ i , t cu_ i , t cl_ i , wherein ivalue be 1 ~ n, 6 n+ 7 clamp diodes, 4 auxiliary capacitors c 1, c 2, c 3, c 4and 2 auxiliary IGBT module t 1, t 2, common formation is from all pressing subsidiary loop.
4. the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints according to right 1 is from all pressing topology, it is characterized in that: during normal condition, from all pressing in subsidiary loop 6 NIndividual IGBT module T Au_ i , T Al_ i , T Bu_ i , T Bl_ i , T Cu_ i , T Cl_ i Normally closed, during failure condition, 6 NIndividual IGBT module T Au_ i , T Al_ i , T Bu_ i , T Bl_ i , T Cu_ i , T Cl_ i Disconnect, wherein iValue be 1 ~ N; Under normal circumstances, brachium pontis first sub-module capacitance in A phase C- Au-_1During bypass, now auxiliary IGBT module T 1Disconnect submodule electric capacity C -Au-_1 With auxiliary capacitor C 1By clamp diode parallel connection; Brachium pontis in A phase iIndividual sub-module capacitance C- Au-_ i During bypass, wherein iValue be 2 ~ N, submodule electric capacity C- Au-_ i With submodule electric capacity C- Au-_ i-1 By clamp diode parallel connection; Lower brachium pontis first the sub-module capacitance of A phase C- Al_1During bypass, submodule electric capacity C- Al-_1By clamp diode, two brachium pontis reactors L 0With submodule electric capacity C- Au-_ N In parallel; The lower brachium pontis of A phase the iIndividual sub-module capacitance C -al_ i During bypass, wherein iValue be 2 ~ N, submodule electric capacity C -Al-_ i With submodule electric capacity C- Al_ i-1 By clamp diode parallel connection; Auxiliary IGBT module T 2When closed, auxiliary capacitor C 3By clamp diode and submodule electric capacity C- Al_ N In parallel; Auxiliary IGBT module T 1When closed, auxiliary capacitor C 2With submodule electric capacity C- Bu-_1By clamp diode parallel connection; Brachium pontis in B phase iIndividual sub-module capacitance C -bu-_ i During bypass, wherein iValue be 1 ~ N-1, submodule electric capacity C- Bu-_ i With submodule electric capacity C -bu-_ i+ 1 By clamp diode parallel connection; Brachium pontis in B phase NIndividual sub-module capacitance C -bu_ N During bypass, submodule electric capacity C -bu-_ N By clamp diode, two brachium pontis reactors L 0With submodule electric capacity C -bl-_1In parallel; The lower brachium pontis of B phase the iIndividual sub-module capacitance C -bl_ i During bypass, wherein iValue be 1 ~ N-1, submodule electric capacity C- Bl-_ i With submodule electric capacity C- Bl_ i+ 1 By clamp diode parallel connection; The lower brachium pontis of B phase NIndividual sub-module capacitance C- Bl_ N During bypass, submodule electric capacity C- Bl-_ N With auxiliary capacitor C- 4By clamp diode parallel connection; Wherein auxiliary IGBT module T 1Triggering signal and A,In C phase, " logic with " of brachium pontis first submodule triggering signal is consistent; Auxiliary IGBT module T 2The lower brachium pontis of triggering signal and B phase the NThe triggering signal of individual submodule is consistent; In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, auxiliary IGBT module T 1, T 2Be alternately closed, turn off, A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint, U C-1 >= U C-Au_1 >= U C-au_2 >= U C-au_ N >= U C-al_1 >= U C-al_2 >= U C-Al_ N >= U C-3 ; B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint, U C-2 ≤ U C-Bu_1 ≤ U C-bu_2 ≤ U C-bu_ N ≤ U C-bl_1 ≤ U C-Bl_2 ≤ U C-bl_ N ≤ U C-4 ; Against auxiliary capacitor C 1, C 2Between voltage, auxiliary capacitor C 3, C 4Two inequality constraints between voltage, U C-1 ≤ U C-2 , U C-3 >= U C-4 , 4 of A, B phase upper and lower bridge arm NIndividual sub-module capacitance, C Au_ i , C Al_ i , C Bu_ i , C Bl_ i , wherein iValue is 1 ~ N, and auxiliary capacitor C 1, C 2, C 3, C 4, voltage is in self-balancing state, and A, B of topology are alternate possesses submodule capacitor voltage from the ability of equalization; If the form of the composition of C phase is consistent with A in topology, then between constraints and A, B of C, B capacitive coupling voltage, capacitance voltage constraints is consistent; If the form of the composition of C phase is consistent with B in topology, then between constraints and A, B of A, C capacitive coupling voltage, capacitance voltage constraints is consistent, and topology possesses submodule capacitor voltage from the ability of equalization; On the basis that utilizes the single-phase flowing of capacitive energy between adjacent submodule in clamp diode realization mutually; inequality constraints between dependence auxiliary capacitor realizes the peripheral passage of the alternate flowing formation capacitive energy of capacitive energy; and then keeping alternate submodule capacitor voltage stable, is the protection content of this right.
5. the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints according to right 1, from all pressing topology, is characterized in that: auxiliary capacitor c 1, c 2, c 3, c 4both as the passage of A, B capacitive coupling energy exchange, again as the passage of B, C capacitive coupling energy exchange; Function focus utilization in topology of auxiliary capacitor all presses the device consumption in subsidiary loop certainly with minimizing; Auxiliary capacitor c 1, c 2function concentrate, auxiliary capacitor c 3, c 4function do not concentrate; Auxiliary capacitor c 1, c 2function do not concentrate, auxiliary capacitor c 3, c 4function concentrate topology in interest field.
6. the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints according to right 1 is from all pressing topology, it is characterized in that: the centralized single clamp MMC of the auxiliary capacitor based on inequality constraints is from all pressing topology, flexible direct-current transmission field can not only be directly applied to as multi-level voltage source current converter, also by forming STATCOM (STATCOM), Research on Unified Power Quality Conditioner (UPQC), the application of installations such as THE UPFC (UPFC) are in flexible AC transmission field; Other application scenarios of this invention topology of indirect utilization and thought are in interest field.
CN201610047418.7A 2016-01-25 2016-01-25 Inequality constraints-based auxiliary capacitor concentrated single clamping MMC self voltage-sharing topology Pending CN105429491A (en)

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