CN105450070A - Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints - Google Patents
Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints Download PDFInfo
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- CN105450070A CN105450070A CN201610047414.9A CN201610047414A CN105450070A CN 105450070 A CN105450070 A CN 105450070A CN 201610047414 A CN201610047414 A CN 201610047414A CN 105450070 A CN105450070 A CN 105450070A
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- submodule
- brachium pontis
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- module
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/49—Combination of the output voltage waveforms of a plurality of converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/0077—Plural converter units whose outputs are connected in series
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
Abstract
The invention provides a non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints. In the half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology, a half-bridge/full-bridge parallel-serial MMC model is electrically connected with a self-voltage-sharing auxiliary loop through auxiliary switches in the auxiliary loop; the auxiliary switches are switched on, and the half-bridge/full-bridge parallel-serial MMC model and the self-voltage-sharing auxiliary loop form the non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on the inequality constraints; the auxiliary switches are switched off, and the topology is equivalent to the half-bridge/full-bridge parallel-serial MMC topology. Under the condition of not emphasizing the differences between the two topologies, 6K mechanical switches in the auxiliary switches can be omitted. By means of the half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology, the DC failure clamping capacity is achieved without depending on special voltage-sharing control; the capacitances and voltages of sub-modules can be balanced spontaneously on the basis of completing DC and AC energy conversion; meanwhile, the triggering frequencies and capacitance values of the sub-modules can be correspondingly reduced, and base-frequency modulation of MMC is achieved.
Description
Technical field
The present invention relates to flexible transmission field, be specifically related to a kind of based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, and MMC adopts the mode of sub module cascade to construct converter valve, avoids the direct series connection of large metering device, reduces the conforming requirement of device, be convenient to dilatation and redundant configuration simultaneously.Along with the rising of level number, output waveform, close to sinusoidal, effectively can avoid the defect of low level VSC-HVDC.
Half-bridge/full-bridge series-parallel connection MMC is combined by half-bridge and full-bridge submodule, and half-bridge sub modular structure is simple, and cost is low, and running wastage is little, and full-bridge submodule has DC Line Fault clamping ability.
Different from two level, three level VSC, the DC voltage of MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure the waveform quality that AC voltage exports and ensure that in module, each power semiconductor bears identical stress, also in order to better support direct voltage, reduce alternate circulation, must ensure that submodule capacitor voltage is in the state of dynamic stability in the periodicity flowing of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving MMC Neutron module capacitance voltage equalization problem at present.First, the realization of ranking function must rely on the Millisecond sampling of capacitance voltage, needs a large amount of transducers and optical-fibre channel to be coordinated; Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, for the hardware designs of controller brings huge challenge; In addition, sequence all presses the cut-off frequency of the realization of algorithm to submodule to have very high requirement, cut-offs frequency and all presses effect to be closely related, in practice process, may because all press the restriction of effect, the trigger rate of raising submodule of having to, and then bring the increase of converter loss.
Document " ADC-LinkVoltageSelf-BalanceMethodforaDiode-ClampedModula rMultilevelConverterWithMinimumNumberofVoltageSensors ", proposes a kind of clamp diode and transformer of relying on to realize the thinking of MMC submodule capacitor voltage equilibrium.But the program to a certain degree destroys the modular nature of submodule in design, submodule capacitive energy interchange channel is also confined to mutually, the existing structure of MMC could not be made full use of, while being introduced in of three transformers makes control strategy complicated, also can bring larger improvement cost.
Summary of the invention
For the problems referred to above, the object of the invention is to propose a kind of economy, do not rely on and all press algorithm, simultaneously can corresponding reduction submodule trigger rate and capacitor's capacity and the half-bridge/full-bridge series-parallel connection MMC with DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of the present invention is as follows.
Based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, comprise the half-bridge MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
kindividual half-bridge submodule,
n-
kindividual full-bridge submodule and 1 brachium pontis reactor are in series; Comprise by 6
nindividual auxiliary switch (6
kindividual mechanical switch, 6
n-6
kindividual IGBT module), 6
n+ 1 clamp diode composition from all pressing subsidiary loop.
Above-mentioned based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, 1st submodule of brachium pontis in A phase, its submodule electric capacity negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity negative pole downwards with the of brachium pontis in A phase
i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
i-1 sub-module capacitance negative pole is connected; In A phase brachium pontis
kindividual half-bridge submodule, its submodule electric capacity negative pole downwards with the of brachium pontis in A phase
k+ 1 submodule IGBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
k-1 sub-module capacitance negative pole is connected; In A phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with brachium pontis in A phase the
j+ 1 submodule IGBT module mid point is connected, another IGBT module mid point upwards with brachium pontis in A phase
j-1 submodule IGBT module mid point is connected; Brachium pontis in A phase
nindividual submodule, its submodule IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, another IGBT module mid point upwards with the of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity negative pole downwards with A phase time brachium pontis the
i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards
i-1 sub-module capacitance negative pole is connected; The of the lower brachium pontis of A phase
kindividual submodule, its submodule electric capacity negative pole downwards with A phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards
k-1 sub-module capacitance negative pole is connected; The lower brachium pontis of A phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with A phase time brachium pontis the
j+ 1 submodule IGBT module mid point is connected, and another IGBT module mid point is the lower brachium pontis the with A phase upwards
j-1 submodule IGBT module mid point is connected; The lower brachium pontis of A phase the
nindividual submodule IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule IGBT module mid point is connected.1st submodule of brachium pontis in B phase, its submodule capacitance cathode is upwards connected with DC bus positive pole, and its submodule IGBT module mid point is connected with the 2nd sub-module capacitance positive pole of brachium pontis in B phase downwards; In B phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule capacitance cathode upwards with of brachium pontis in B phase
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase
i+ 1 sub-module capacitance positive pole is connected; In B phase brachium pontis
kindividual submodule, its submodule capacitance cathode upwards with of brachium pontis in B phase
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the
k+ 1 submodule IGBT module mid point is connected; In B phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point upwards with brachium pontis in B phase
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with brachium pontis in B phase the
j+ 1 submodule IGBT module mid point is connected; Brachium pontis in B phase
nindividual submodule, its submodule IGBT module mid point upwards with brachium pontis in B phase
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st sub-module capacitance positive pole of the lower brachium pontis of B phase; The of the lower brachium pontis of B phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule capacitance cathode upwards with B phase lower brachium pontis the
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis
i+ 1 sub-module capacitance positive pole is connected; The of the lower brachium pontis of B phase
kindividual submodule, its submodule capacitance cathode is the lower brachium pontis the with B phase upwards
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected; The lower brachium pontis of B phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point is the lower brachium pontis the with B phase upwards
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with B phase time brachium pontis the
j+ 1 submodule IGBT module mid point is connected; The lower brachium pontis of B phase the
nindividual submodule, its submodule IGBT module mid point is the lower brachium pontis the with B phase upwards
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A phase or B.
Above-mentioned based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is from all pressing in subsidiary loop, clamp diode, to connect in A phase in brachium pontis the by auxiliary switch
iindividual sub-module capacitance and
i+ 1 sub-module capacitance positive pole, wherein
ivalue be 1 ~
n-1; The is connected in A phase in brachium pontis by auxiliary switch
nindividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower to A phase; The is connected in the lower brachium pontis of A phase by auxiliary switch
ithe lower brachium pontis of individual sub-module capacitance and A phase the
i+ 1 sub-module capacitance positive pole, wherein
ivalue be 1 ~
n-1.Clamp diode, to connect in B phase in brachium pontis the by auxiliary switch
iindividual sub-module capacitance and
ithe negative pole of+1 sub-module capacitance, wherein
ivalue be 1 ~
n-1; The is connected in B phase in brachium pontis by auxiliary switch
nindividual sub-module capacitance and B phase descend the negative pole of brachium pontis the 1st sub-module capacitance; The is connected in the lower brachium pontis of B phase by auxiliary switch
ithe lower brachium pontis of individual sub-module capacitance and B phase the
ithe negative pole of+1 sub-module capacitance, wherein
ivalue be 1 ~
n-1.Clamp diode simultaneously, connects brachium pontis first sub-module capacitance module capacitance negative pole with brachium pontis in B phase first in A phase by auxiliary switch; The lower brachium pontis of A phase the is connected by auxiliary switch
nthe lower brachium pontis of individual sub-module capacitance and B phase the
nindividual sub-module capacitance positive pole.The annexation of C phase clamp diode is corresponding with the annexation of its submodule.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention is further described.
Fig. 1 is the structural representation of half-bridge submodule;
Fig. 2 is the structural representation of full-bridge submodule;
Fig. 3 is from all pressing topology based on the centralized half-bridge of the auxiliary capacitor/full-bridge series-parallel connection MMC of equality constraint.
Embodiment
For setting forth performance of the present invention and operation principle further, below in conjunction with accompanying drawing, the constituted mode of invention and operation principle are specifically described.But be not limited to Fig. 3 based on the half-bridge/full-bridge series-parallel connection MMC of this principle from all pressing topology.
With reference to figure 3, based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, comprise the half-bridge/full-bridge series-parallel connection MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
kindividual half-bridge submodule,
n-
kindividual full-bridge submodule and 1 brachium pontis reactor are in series; Comprise 6
nindividual auxiliary switch (6
kindividual mechanical switch, 6
n-6
kindividual IGBT module) and 6
n+ 1 clamping diode form from all pressing subsidiary loop.
In half-bridge/full-bridge series-parallel connection MMC model, the 1st submodule of brachium pontis in A phase, its submodule electric capacity
c-
au-_1negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
au-_
i negative pole downwards with the of brachium pontis in A phase
i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
i-1 sub-module capacitance
c -au-_
i-1
negative pole is connected; In A phase brachium pontis
kindividual half-bridge submodule, its submodule electric capacity
c -au-_
k negative pole downwards with the of brachium pontis in A phase
k+ 1 submodule IGBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
k-1 sub-module capacitance
c-
au-_
k-1
negative pole is connected; In A phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with brachium pontis in A phase the
j+ 1 submodule IGBT module mid point is connected, another IGBT module mid point upwards with brachium pontis in A phase
j-1 submodule IGBT module mid point is connected; Brachium pontis in A phase
nindividual submodule, its submodule IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, another IGBT module mid point upwards with the of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
al-_
i negative pole downwards with A phase time brachium pontis the
i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards
i-1 sub-module capacitance
c- al-_
i-1
negative pole is connected; The of the lower brachium pontis of A phase
kindividual submodule, its submodule electric capacity
c -al_
k negative pole downwards with A phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards
k-1 sub-module capacitance
c-
al-_
k-1
negative pole is connected; The lower brachium pontis of A phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with A phase time brachium pontis the
j+ 1 submodule IGBT module mid point is connected, and another IGBT module mid point is the lower brachium pontis the with A phase upwards
j-1 submodule IGBT module mid point is connected; The lower brachium pontis of A phase the
nindividual submodule IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule IGBT module mid point is connected.1st submodule of brachium pontis in B phase, its submodule electric capacity
c -bu-_1
positive pole is upwards connected with DC bus positive pole, its submodule IGBT module mid point downwards with the 2nd sub-module capacitance of brachium pontis in B phase
c -bu-_2positive pole is connected; In B phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
bu-_
i positive pole upwards with of brachium pontis in B phase
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase
i+ 1 sub-module capacitance
c-
bu-_
i+ 1
positive pole is connected; In B phase brachium pontis
kindividual submodule, its submodule electric capacity
c-
bu-_
k positive pole upwards with of brachium pontis in B phase
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the
k+ 1 submodule IGBT module mid point is connected; In B phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point upwards with brachium pontis in B phase
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with brachium pontis in B phase the
j+ 1 submodule IGBT module mid point is connected; Brachium pontis in B phase
nindividual submodule, an one IGBT module mid point upwards with brachium pontis in B phase
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is downwards through two brachium pontis reactors
l 0with the 1st sub-module capacitance of the lower brachium pontis of B phase
c -bl-_1positive pole is connected; The of the lower brachium pontis of B phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c -bl_
i positive pole upwards with B phase lower brachium pontis the
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis
i+ 1 sub-module capacitance
c- bl-_
i+ 1
positive pole is connected; The of the lower brachium pontis of B phase
kindividual submodule, its submodule electric capacity
c -bl_
k positive pole is the lower brachium pontis the with B phase upwards
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected; The lower brachium pontis of B phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, an one IGBT module mid point is the lower brachium pontis the with B phase upwards
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with B phase time brachium pontis the
j+ 1 sub-module I GBT IGBT module mid point is connected; The lower brachium pontis of B phase the
nindividual submodule, its submodule IGBT module mid point is the lower brachium pontis the with B phase upwards
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is connected with DC bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, clamp diode, passes through auxiliary switch
k au_
i2
,
k au_(
i+ 1) 2
to connect in A phase in brachium pontis the
iindividual sub-module capacitance
c -au-_
i with
i+ 1 sub-module capacitance
c -au-_
i+ 1
positive pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k au_
k2
,
t au_
k+ 1
to connect in A phase in brachium pontis the
kindividual sub-module capacitance
c -au-_
k with
k+ 1 sub-module capacitance
c- au_
k+ 1
positive pole; Pass through auxiliary switch
t au_
j ,
t au_
j+ 1
to connect in A phase in brachium pontis the
jindividual sub-module capacitance
c -au-_
j with
j+ 1 sub-module capacitance
c -au-_
j+ 1
positive pole, wherein
jvalue be
k+ 1 ~
n-1; Pass through auxiliary switch
t au_
n ,
k al_12to connect in A phase in brachium pontis the
nindividual sub-module capacitance
c-
au_
n brachium pontis 1st sub-module capacitance lower to A phase
c -al-_1positive pole; Pass through auxiliary switch
k al_
i2
,
k al_(
i+ 1) 2
to connect in the lower brachium pontis of A phase the
iindividual sub-module capacitance
c -al-_
i with
i+ 1 sub-module capacitance
c -al-_
i+ 1
positive pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k al_
k2
,
t al_
k+ 1
to connect in the lower brachium pontis of A phase the
kindividual sub-module capacitance
c-
al-_
k with
k+ 1 sub-module capacitance
c-
al-_
k+ 1
positive pole; Pass through auxiliary switch
t al_
j ,
t al_
j+ 1
to connect in the lower brachium pontis of A phase the
jindividual sub-module capacitance
c -al_
j with
j+ 1 sub-module capacitance
c -al-_
j+ 1
positive pole, wherein
jvalue be
k+ 1 ~
n-1.Clamp diode, passes through auxiliary switch
k bu_
i2
,
k bu_(
i+ 1) 2
to connect in B phase in brachium pontis the
iindividual sub-module capacitance
c-
bu-_
i with
i+ 1 sub-module capacitance
c-
bu-_
i+ 1
negative pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k bu_
k2
,
t bu_
k+ 1
to connect in B phase in brachium pontis the
kindividual sub-module capacitance
c-
bu-_
k with
k+ 1 sub-module capacitance
c-
bu-_
k+ 1
negative pole; Pass through auxiliary switch
t bu_
j ,
t bu_
j+ 1
to connect in B phase in brachium pontis the
jindividual sub-module capacitance
c-
bu-_
j with
j+ 1 sub-module capacitance
c-
bu-_
j+ 1
negative pole, wherein
jvalue be
k+ 1 ~
n-1; Pass through auxiliary switch
t bu_
n ,
k bl_12to connect in B phase in brachium pontis the
nindividual sub-module capacitance
c-
bu-_
n with the 1st sub-module capacitance in the lower brachium pontis of B phase
c-
bl_1negative pole; Pass through auxiliary switch
k bl_
i2
,
k bl_(
i+ 1) 2
to connect in the lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl-_
i with
i+ 1 sub-module capacitance
c-
bl-_
i+ 1
negative pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k bl_
k2
,
t bl_
k+ 1
to connect in the lower brachium pontis of B phase the
kindividual sub-module capacitance
c-
bl_
k with
k+ 1 sub-module capacitance
c-
bl-_
k+ 1
negative pole; Pass through auxiliary switch
t bl_
j ,
t bl_
j+ 1
to connect in the lower brachium pontis of B phase the
jindividual sub-module capacitance
c-
bl-_
j with
j+ 1 sub-module capacitance
c-
bl_
j+ 1
negative pole, wherein
jvalue be
k+ 1 ~
n-1.Clamp diode, passes through auxiliary switch simultaneously
k bu_12connect brachium pontis first sub-module capacitance in A phase
c-
au-_1with first the sub-module capacitance of brachium pontis in B phase
c-
bu-_1negative pole; Pass through auxiliary switch
t al_
n connect the lower brachium pontis of A phase the
nindividual sub-module capacitance
c- al_
n with the lower brachium pontis of B phase the
nindividual sub-module capacitance
c-
bl-_
n positive pole.The annexation of C phase clamp diode is consistent with A.
, from all pressing in subsidiary loop 6
nindividual auxiliary switch
k au_
i2
,
k al_
i2
,
k bu_
i2
,
k bl_
i2
,
k cu_
i2
,
k cl_
i2
,
t au_
j ,
t al_
j ,
t bu_
j ,
t bl_
j ,
t cu_
j ,
t cl_
j normally closed, wherein
ivalue be 1 ~
k,
jvalue be
k+ 1 ~
n, brachium pontis in A phase
iindividual sub-module capacitance
c-
au-_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c-
au-_
i with submodule electric capacity
c-
au-_
i-1
in parallel by clamp diode; Lower brachium pontis first the sub-module capacitance of A phase
c-
al_1during bypass, submodule electric capacity
c-
al-_1by clamp diode, two brachium pontis reactors
l 0with submodule electric capacity
c- au-_
n in parallel; The lower brachium pontis of A phase the
iindividual sub-module capacitance
c-
al_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c- al-_
i with submodule electric capacity
c-
al_
i-1
in parallel by clamp diode.
Under normal circumstances, from all pressing in subsidiary loop 6
nindividual auxiliary switch
k au_
i2
,
k al_
i2
,
k bu_
i2
,
k bl_
i2
,
k cu_
i2
,
k cl_
i2
,
t au_
j ,
t al_
j ,
t bu_
j ,
t bl_
j ,
t cu_
j ,
t cl_
j normally closed, wherein
ivalue be 1 ~
k,
jvalue be
k+ 1 ~
n, brachium pontis in B phase
iindividual sub-module capacitance
c-
bu-_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c-
bu-_
i with submodule electric capacity
c- bu-_
i+ 1
in parallel by clamp diode; Brachium pontis in B phase
nindividual sub-module capacitance
c-
bu_
n during bypass, submodule electric capacity
c -bu-_
n by clamp diode, two brachium pontis reactors
l 0with submodule electric capacity
c- bl-_1in parallel; The lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c -bl-_
i with submodule electric capacity
c- bl_
i+ 1
in parallel by clamp diode.
In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, and between A, B phase upper and lower bridge arm, capacitance voltage is under the effect of clamp diode, meets lower column constraint:
Rely on across two alternate clamp diodes of A, B, certainly all pressing in topology without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC based on inequality constraints, submodule electric capacity
c-
au-_1with submodule electric capacity
c-
bu-_1voltage between, submodule electric capacity
c -al-_
n with submodule electric capacity
c-
bl_
n voltage between there is following inequality constraints;
It can thus be appreciated that half-bridge/full-bridge series-parallel connection MMC, in the dynamic process completing the conversion of orthogonal stream energy, meets constraints below:
The constraints that C, B the are alternate constraints alternate with A, B is consistent.
Illustrated from above-mentioned, this half-bridge/full-bridge series-parallel connection MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.
Claims (5)
1. based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is characterized in that: comprise the half-bridge/full-bridge series-parallel connection MMC model be made up of A, B, C three-phase, each brachium pontis of A, B, C three-phase respectively by
kindividual half-bridge submodule,
n-
kindividual full-bridge submodule and 1 brachium pontis reactor are in series; Comprise 6
nindividual auxiliary switch (6
kindividual mechanical switch, 6
n-6
kindividual IGBT module) and 6
n+ 1 clamping diode form from all pressing subsidiary loop.
2. according to right 1 based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is characterized in that: the 1st submodule of brachium pontis in A phase, its submodule electric capacity
c-
au-_1negative pole is connected with the 2nd sub-module I GBT module mid point of brachium pontis in A phase downwards, and its submodule IGBT module mid point is upwards connected with DC bus positive pole; In A phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
au-_
i negative pole downwards with the of brachium pontis in A phase
i+ 1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
i-1 sub-module capacitance
c -au-_
i-1
negative pole is connected; In A phase brachium pontis
kindividual half-bridge submodule, its submodule electric capacity
c -au-_
k negative pole downwards with the of brachium pontis in A phase
k+ 1 submodule IGBT module mid point is connected, its submodule IGBT module mid point upwards with of brachium pontis in A phase
k-1 sub-module capacitance
c-
au-_
k-1
negative pole is connected; In A phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with brachium pontis in A phase the
j+ 1 submodule IGBT module mid point is connected, another IGBT module mid point upwards with brachium pontis in A phase
j-1 submodule IGBT module mid point is connected; Brachium pontis in A phase
nindividual submodule, its submodule IGBT module mid point is downwards through two brachium pontis reactors
l 0be connected with the 1st sub-module I GBT module mid point of the lower brachium pontis of A phase, another IGBT module mid point upwards with the of brachium pontis in A phase
n-1 submodule IGBT module mid point is connected; The of the lower brachium pontis of A phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
al-_
i negative pole downwards with A phase time brachium pontis the
i+ 1 sub-module I GBT module mid point is connected, and its IGBT module mid point is the lower brachium pontis the with A phase upwards
i-1 sub-module capacitance
c- al-_
i-1
negative pole is connected; The of the lower brachium pontis of A phase
kindividual submodule, its submodule electric capacity
c -al_
k negative pole downwards with A phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected, and its submodule IGBT module mid point is the lower brachium pontis the with A phase upwards
k-1 sub-module capacitance
c-
al-_
k-1
negative pole is connected; The lower brachium pontis of A phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point downwards with A phase time brachium pontis the
j+ 1 submodule IGBT module mid point is connected, and another IGBT module mid point is the lower brachium pontis the with A phase upwards
j-1 submodule IGBT module mid point is connected; The lower brachium pontis of A phase the
nindividual submodule IGBT module mid point is connected with DC bus negative pole downwards, another IGBT module mid point upwards with A phase lower brachium pontis the
n-1 submodule IGBT module mid point is connected; 1st submodule of brachium pontis in B phase, its submodule electric capacity
c -bu-_1
positive pole is upwards connected with DC bus positive pole, its submodule IGBT module mid point downwards with the 2nd sub-module capacitance of brachium pontis in B phase
c -bu-_2positive pole is connected; In B phase brachium pontis
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c-
bu-_
i positive pole upwards with of brachium pontis in B phase
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of brachium pontis in B phase
i+ 1 sub-module capacitance
c-
bu-_
i+ 1
positive pole is connected; In B phase brachium pontis
kindividual submodule, its submodule electric capacity
c-
bu-_
k positive pole upwards with of brachium pontis in B phase
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with brachium pontis in B phase the
k+ 1 submodule IGBT module mid point is connected; In B phase brachium pontis
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, its submodule IGBT module mid point upwards with brachium pontis in B phase
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with brachium pontis in B phase the
j+ 1 submodule IGBT module mid point is connected; Brachium pontis in B phase
nindividual submodule, an one IGBT module mid point upwards with brachium pontis in B phase
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is downwards through two brachium pontis reactors
l 0with the 1st sub-module capacitance of the lower brachium pontis of B phase
c -bl-_1positive pole is connected; The of the lower brachium pontis of B phase
iindividual submodule, wherein
ivalue be 2 ~
k-1, its submodule electric capacity
c -bl_
i positive pole upwards with B phase lower brachium pontis the
i-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with the of B phase time brachium pontis
i+ 1 sub-module capacitance
c- bl-_
i+ 1
positive pole is connected; The of the lower brachium pontis of B phase
kindividual submodule, its submodule electric capacity
c -bl_
k positive pole is the lower brachium pontis the with B phase upwards
k-1 sub-module I GBT module mid point is connected, its submodule IGBT module mid point downwards with B phase time brachium pontis the
k+ 1 submodule IGBT module mid point is connected; The lower brachium pontis of B phase the
jindividual submodule, wherein
jvalue be
k+ 2 ~
n-1, an one IGBT module mid point is the lower brachium pontis the with B phase upwards
j-1 submodule IGBT module mid point is connected, another IGBT module mid point downwards with B phase time brachium pontis the
j+ 1 sub-module I GBT IGBT module mid point is connected; The lower brachium pontis of B phase the
nindividual submodule, its submodule IGBT module mid point is the lower brachium pontis the with B phase upwards
n-1 submodule IGBT module mid point is connected, and another IGBT module mid point is connected with DC bus negative pole downwards; The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, also can be consistent with B; Due to the existence of full-bridge submodule, unnecessary configuration thyristor between the upper and lower output line of half-bridge submodule; Therefore A, B, C phase upper and lower bridge arm submodule be parallel with mechanical switch between output line up and down
k au_
i1
,
k al_
i1
,
k bu_
i1
,
k bl_
i1
,
k cu_
i1
,
k cl_
i1
,
k au_
j ,
k al
_ j ,
k bu_
j ,
k bl_
j ,
k cu_
j ,
k cl_
j , wherein
ivalue be 1 ~
k,
jvalue be
k+ 1 ~
n; A, B, C three-phase status that above-mentioned annexation is formed is consistent, and other topologys after three-phase symmetrized in turn are in interest field.
3. according to right 1 based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is characterized in that: from all pressing in subsidiary loop, clamp diode, passes through auxiliary switch
k au_
i2
,
k au_(
i+ 1) 2
to connect in A phase in brachium pontis the
iindividual sub-module capacitance
c -au-_
i with
i+ 1 sub-module capacitance
c -au-_
i+ 1
positive pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k au_
k2
,
t au_
k+ 1
to connect in A phase in brachium pontis the
kindividual sub-module capacitance
c -au-_
k with
k+ 1 sub-module capacitance
c- au_
k+ 1
positive pole; Pass through auxiliary switch
t au_
j ,
t au_
j+ 1
to connect in A phase in brachium pontis the
jindividual sub-module capacitance
c -au-_
j with
j+ 1 sub-module capacitance
c -au-_
j+ 1
positive pole, wherein
jvalue be
k+ 1 ~
n-1; Pass through auxiliary switch
t au_
n ,
k al_12to connect in A phase in brachium pontis the
nindividual sub-module capacitance
c-
au_
n brachium pontis 1st sub-module capacitance lower to A phase
c -al-_1positive pole; Pass through auxiliary switch
k al_
i2
,
k al_(
i+ 1) 2
to connect in the lower brachium pontis of A phase the
iindividual sub-module capacitance
c -al-_
i with
i+ 1 sub-module capacitance
c -al-_
i+ 1
positive pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k al_
k2
,
t al_
k+ 1
to connect in the lower brachium pontis of A phase the
kindividual sub-module capacitance
c-
al-_
k with
k+ 1 sub-module capacitance
c-
al-_
k+ 1
positive pole; Pass through auxiliary switch
t al_
j ,
t al_
j+ 1
to connect in the lower brachium pontis of A phase the
jindividual sub-module capacitance
c -al_
j with
j+ 1 sub-module capacitance
c -al-_
j+ 1
positive pole, wherein
jvalue be
k+ 1 ~
n-1; Clamp diode, passes through auxiliary switch
k bu_
i2
,
k bu_(
i+ 1) 2
to connect in B phase in brachium pontis the
iindividual sub-module capacitance
c-
bu-_
i with
i+ 1 sub-module capacitance
c-
bu-_
i+ 1
negative pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k bu_
k2
,
t bu_
k+ 1
to connect in B phase in brachium pontis the
kindividual sub-module capacitance
c-
bu-_
k with
k+ 1 sub-module capacitance
c-
bu-_
k+ 1
negative pole; Pass through auxiliary switch
t bu_
j ,
t bu_
j+ 1
to connect in B phase in brachium pontis the
jindividual sub-module capacitance
c-
bu-_
j with
j+ 1 sub-module capacitance
c-
bu-_
j+ 1
negative pole, wherein
jvalue be
k+ 1 ~
n-1; Pass through auxiliary switch
t bu_
n ,
k bl_12to connect in B phase in brachium pontis the
nindividual sub-module capacitance
c-
bu-_
n with the 1st sub-module capacitance in the lower brachium pontis of B phase
c-
bl_1negative pole; Pass through auxiliary switch
k bl_
i2
,
k bl_(
i+ 1) 2
to connect in the lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl-_
i with
i+ 1 sub-module capacitance
c-
bl-_
i+ 1
negative pole, wherein
ivalue be 1 ~
k-1; Pass through auxiliary switch
k bl_
k2
,
t bl_
k+ 1
to connect in the lower brachium pontis of B phase the
kindividual sub-module capacitance
c-
bl_
k with
k+ 1 sub-module capacitance
c-
bl-_
k+ 1
negative pole; Pass through auxiliary switch
t bl_
j ,
t bl_
j+ 1
to connect in the lower brachium pontis of B phase the
jindividual sub-module capacitance
c-
bl-_
j with
j+ 1 sub-module capacitance
c-
bl_
j+ 1
negative pole, wherein
jvalue be
k+1 ~
n-1; Clamp diode, passes through auxiliary switch simultaneously
k bu_12connect brachium pontis first sub-module capacitance in A phase
c-
au-_1with first the sub-module capacitance of brachium pontis in B phase
c-
bu-_1negative pole; Pass through auxiliary switch
t al_
n connect the lower brachium pontis of A phase the
nindividual sub-module capacitance
c- al_
n with the lower brachium pontis of B phase the
nindividual sub-module capacitance
c-
bl-_
n positive pole; The annexation of C phase clamp diode is corresponding with the annexation of its submodule; In above-mentioned A, B, C three-phase 6
nindividual auxiliary switch
k au_
i2
,
k al_
i2
,
k bu_
i2
,
k bl_
i2
,
k cu_
i2
,
k cl_
i2
,
t au_
j ,
t al_
j ,
t bu_
j ,
t bl_
j ,
t cu_
j ,
t cl_
j , wherein
ivalue be 1 ~
k,
jvalue be
k+ 1 ~
n, 6
n+ 1 clamp diode, common formation is from all pressing subsidiary loop.
4. according to right 1 based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is characterized in that: during normal condition, from all pressing in subsidiary loop 6
nindividual auxiliary switch
k au_
i2
,
k al_
i2
,
k bu_
i2
,
k bl_
i2
,
k cu_
i2
,
k cl_
i2
,
t au_
j ,
t al_
j ,
t bu_
j ,
t bl_
j ,
t cu_
j ,
t cl_
j , normally closed, wherein
ivalue be 1 ~
k,
jvalue be
k+ 1 ~
n; During failure condition, 6
n-6
kindividual auxiliary switch
t au_
j ,
t al_
j ,
t bu_
j ,
t bl_
j ,
t cu_
j ,
t cl_
j disconnect, wherein
jvalue be
k+ 1 ~
n; Under normal circumstances, brachium pontis in A phase
iindividual sub-module capacitance
c-
au-_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c-
au-_
i with submodule electric capacity
c-
au-_
i-1
in parallel by clamp diode; Lower brachium pontis first the sub-module capacitance of A phase
c-
al_1during bypass, submodule electric capacity
c-
al-_1by clamp diode, two brachium pontis reactors
l 0with submodule electric capacity
c- au-_
n in parallel; The lower brachium pontis of A phase the
iindividual sub-module capacitance
c-
al_
i during bypass, wherein
ivalue be 2 ~
n, submodule electric capacity
c- al-_
i with submodule electric capacity
c-
al_
i-1
in parallel by clamp diode; Brachium pontis in B phase
iindividual sub-module capacitance
c-
bu-_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c-
bu-_
i with submodule electric capacity
c- bu-_
i+ 1
in parallel by clamp diode; Brachium pontis in B phase
nindividual sub-module capacitance
c-
bu_
n during bypass, submodule electric capacity
c -bu-_
n by clamp diode, two brachium pontis reactors
l 0with submodule electric capacity
c- bl-_1in parallel; The lower brachium pontis of B phase the
iindividual sub-module capacitance
c-
bl_
i during bypass, wherein
ivalue be 1 ~
n-1, submodule electric capacity
c -bl-_
i with submodule electric capacity
c- bl_
i+ 1
in parallel by clamp diode; Brachium pontis the 1st sub-module capacitance in A phase simultaneously
c-
au-_1during input, submodule electric capacity
c- au-_1with submodule electric capacity
c-
bu-_1in parallel by clamp diode; The lower brachium pontis of B phase the
nindividual sub-module capacitance
c-
bl_
n during input, submodule electric capacity
c-
al-_
n with submodule electric capacity
c -bl_
n in parallel by clamp diode; In the process of orthogonal stream energy conversion, each submodule alternately drops into, bypass, and A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,
u c-au_1
>=
u c-au_2
>=
u c-au_
n >=
u c-al_1
>=
u c-al_2
>=
u c-al_
n ; B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,
u c-bu_1
≤
u c-bu_2
≤
u c-bu_
n ≤
u c-bl_1
≤
u c-bl_2
≤
u c-bl_
n ; Rely on across two alternate clamp diodes of A, B, certainly all pressing in topology without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC based on inequality constraints, submodule electric capacity
c-
au-_1with submodule electric capacity
c-
bu-_1voltage between, submodule electric capacity
c -al-_
n with submodule electric capacity
c-
bl_
n voltage between there is following inequality constraints,
u c-au_1
≤
u c-bu_1
,
u c-al_
n >=
u c-bl_
n ; Based on this inequality constraints, in A, B phase upper and lower bridge arm 4
nindividual sub-module capacitance,
c au_
i , C
al_
i ,
c bu_
i ,
c bl_
i , wherein
ivalue is 1 ~
n, voltage be in self-balancing state, topological A, B are alternate possesses submodule capacitor voltage from the ability of equalization; If the form of the composition of C phase is consistent with A in topology, then the constraints of C, B capacitive coupling voltage is consistent with capacitance voltage constraints between A, B; If the form of the composition of C phase is consistent with B in topology, then the constraints of A, C capacitive coupling voltage is consistent with capacitance voltage constraints between A, B, and topology possesses submodule capacitor voltage from the ability of equalization; Realize utilizing clamp diode, on the basis of the single-phase flowing of capacitive energy between adjacent submodule mutually, relying on submodule electric capacity
c -au-_1,
c -bu-_1,
c-
cu-_1with submodule between voltage
c-
al-_
n ,
c -bl_
n ,
c-
cl_
n inequality constraints between voltage, the alternate flowing realizing capacitive energy forms the peripheral passage of capacitive energy, and then keeps alternate submodule capacitor voltage to stablize, and is the protection content of this right.
5. according to right 1 based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, it is characterized in that: based on inequality constraints without auxiliary capacitor formula half-bridge/full-bridge series-parallel connection MMC from all pressing topology, flexible direct-current transmission field can not only be directly applied to as multi-level voltage source current converter, also by forming STATCOM (STATCOM), Research on Unified Power Quality Conditioner (UPQC), the application of installations such as THE UPFC (UPFC) are in flexible AC transmission field; Other application scenarios of this invention topology of indirect utilization and thought are in interest field.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610047414.9A CN105450070A (en) | 2016-01-25 | 2016-01-25 | Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610047414.9A CN105450070A (en) | 2016-01-25 | 2016-01-25 | Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints |
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| Publication Number | Publication Date |
|---|---|
| CN105450070A true CN105450070A (en) | 2016-03-30 |
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ID=55559947
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|---|---|---|---|
| CN201610047414.9A Pending CN105450070A (en) | 2016-01-25 | 2016-01-25 | Non-auxiliary-capacitance type half-bridge/full-bridge parallel-serial MMC self-voltage-sharing topology based on inequality constraints |
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