CN205754041U - The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology - Google Patents

The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology Download PDF

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CN205754041U
CN205754041U CN201620068859.0U CN201620068859U CN205754041U CN 205754041 U CN205754041 U CN 205754041U CN 201620068859 U CN201620068859 U CN 201620068859U CN 205754041 U CN205754041 U CN 205754041U
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phase
submodule
module
brachium pontis
igbt module
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许建中
赵成勇
刘航
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North China Electric Power University
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North China Electric Power University
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Abstract

This utility model provides the centralized single clamp MMC of auxiliary capacitor based on equality constraint from all pressing topology.Single clamp MMC is from all pressing topology, by singly clamping MMC model and from all pressure subsidiary loop joint mappings.Single clamp MMC model and 6 in all pressure subsidiary loop is by subsidiary loopNIndividual IGBT module generation electrical link, IGBT module triggers, and both constitute the centralized single clamp MMC of auxiliary capacitor based on equality constraint from all pressing topology, IGBT module locking, topoligical equivalence is single clamp MMC topology.This list clamp MMC is from all pressing topology, DC side fault can be clamped, do not rely on special Pressure and Control simultaneously, can be on the basis of completing the conversion of orthogonal stream energy, spontaneously realize the equilibrium of submodule capacitor voltage, submodule can be reduced simultaneously accordingly and trigger frequency and capacitor's capacity, it is achieved the fundamental frequency modulation of single clamp MMC.

Description

The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology
Technical field
This utility model relates to flexible transmission field, is specifically related to the centralized single clamp MMC of a kind of auxiliary capacitor based on equality constraint from all pressing topology.
Background technology
Modularization multi-level converter MMC is the developing direction of following HVDC Transmission Technology, MMC uses the mode of sub module cascade to construct converter valve, it is to avoid directly connecting of big metering device, reduces requirement conforming to device, simultaneously facilitates dilatation and redundant configuration.Along with the rising of level number, output waveform, close to sinusoidal, can effectively avoid the defect of low level VSC-HVDC.
Single clamp MMC combines by singly clamping submodule, and each single clamp submodule is made up of 3 IGBT module, 1 sub-module capacitance, 1 diode and 1 mechanical switch, and low cost, running wastage is little.
Different from two level, three level VSC, the DC voltage of MMC is not supported by a bulky capacitor, but is supported by a series of separate suspension submodule capacitances in series.In order to ensure that the waveform quality that AC voltage exports bears identical stress with each power semiconductor in guarantee module, also for preferably supporting DC voltage, reduce alternate circulation, it is necessary to assure submodule capacitor voltage is in the state of dynamic stability at the periodic current disorder of internal organs of brachium pontis power.
Sequence based on capacitance voltage sequence all presses algorithm to be the main flow thinking solving MMC Neutron module capacitance voltage equalization problem at present.First, the realization of ranking function has to rely on the Millisecond sampling of capacitance voltage, needs substantial amounts of sensor and optical-fibre channel to be coordinated;Secondly, when group number of modules increases, the operand of capacitance voltage sequence increases rapidly, and the hardware designs for controller brings huge challenge;Additionally, submodule is cut-off frequency and has the highest requirement by sequence all realizations of pressure algorithm, cut-off frequency and be closely related with all pressure effects, in practice process, probably due to all press the restriction of effect, it has to improve the triggering frequency of submodule, and then bring the increase that inverter is lost.
Document " A DC-Link Voltage Self-Balance Method for a Diode-Clamped Modular Multilevel Converter With Minimum Number of Voltage Sensors ", it is proposed that a kind of rely on clamp diode and transformator to realize MMC submodule capacitor voltage equilibrium thinking.But the program the most to a certain degree destroys the modular nature of submodule, submodule capacitive energy interchange channel is also confined in mutually, could not make full use of the existing structure of MMC, introducing of three transformators also brings along bigger improvement cost while making control strategy complicate.
Utility model content
For the problems referred to above, the purpose of this utility model is to propose a kind of economy, modular, is independent of all pressing algorithm, can reduce submodule simultaneously accordingly and triggers frequency and capacitor's capacity and have the list clamp MMC of DC Line Fault clamping ability from all pressing topology.
The concrete constituted mode of this utility model is as follows.
The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology, and including the list clamp MMC model being made up of A, B, C three-phase, A, B, C three-phase is respectively by 2NIndividual single clamp submodule, 2 brachium pontis reactors are in series;Including by 6NIndividual IGBT module, 6N+ 5 clamp diodes, 2 auxiliary capacitors and 2 auxiliary IGBT module constitute from the most all pressing subsidiary loop.
The centralized single clamp MMC of above-mentioned auxiliary capacitor based on equality constraint is from all pressing topology, and A phase upper and lower bridge arm, list clamps in submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule diode is connected with the 2nd of brachium pontis module I GBT module midpoint in A phase downwards with IGBT module tie-point, and its submodule IGBT module midpoint is upwards connected with dc bus positive pole;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are downwards and in A phase the of brachium pontisi+ 1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisi-1 submodule diode is connected with IGBT module tie-point;In A phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are down through two brachium pontis reactorsL 01st sub-module I GBT module midpoint of brachium pontis lower with A phase is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisN-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontisi+ 1 sub-module I GBT module midpoint is connected, the of its IGBT module midpoint upwards brachium pontis lower with A phasei-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseNIndividual submodule, its submodule diode is connected with dc bus negative pole downwards with IGBT module tie-point, the of its submodule IGBT module midpoint upwards brachium pontis lower with A phaseN-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole.1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with dc bus positive pole with IGBT module tie-point, and its submodule IGBT module midpoint is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards;In B phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisi-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is downwards with in B phase the of brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;In B phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is down through two brachium pontis reactorsL 01st submodule diode of brachium pontis lower with B phase is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseiIndividual submodule, whereiniValue be 2~N-1, the of its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phasei-1 sub-module I GBT module midpoint is connected, its submodule IGBT module midpoint downwards with the of B phase time brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseNIndividual submodule, its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phase theN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is connected with dc bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, it is also possible to consistent with B.
The centralized single clamp MMC of above-mentioned auxiliary capacitor based on equality constraint is from all pressing topology, and it is in all pressure subsidiary loops, and first auxiliary capacitor positive pole connects auxiliary IGBT module, and negative pole connects clamp diode and is incorporated to dc bus positive pole;Second auxiliary capacitor negative pole connects auxiliary IGBT module, and positive pole connects clamp diode and is incorporated to dc bus negative pole.Clamp diode, by the 1st sub-module capacitance and first auxiliary capacitor positive pole in brachium pontis in IGBT module connection A phase;The is connected in A phase in brachium pontis by IGBT moduleiIndividual sub-module capacitance and thei+ 1 sub-module capacitance positive pole, whereiniValue be 1~N-1;The is connected in A phase in brachium pontis by IGBT moduleNIndividual sub-module capacitance brachium pontis 1st sub-module capacitance positive pole lower with A phase;The is connected in the lower brachium pontis of A phase by IGBT moduleiThe lower brachium pontis of individual sub-module capacitance and A phase thei+ 1 sub-module capacitance positive pole, whereiniValue be 1~N-1;The is connected in the lower brachium pontis of A phase by IGBT moduleNIndividual sub-module capacitance and second auxiliary capacitor positive pole.Clamp diode, by the 1st sub-module capacitance and first auxiliary capacitor negative pole in brachium pontis in IGBT module connection B phase;The is connected in B phase in brachium pontis by IGBT moduleiIndividual sub-module capacitance and thei+ 1 sub-module capacitance negative pole, whereiniValue be 1~N-1;The is connected in B phase in brachium pontis by IGBT moduleNIndividual sub-module capacitance brachium pontis 1st sub-module capacitance negative pole lower with B phase;The is connected in the lower brachium pontis of B phase by IGBT moduleiThe lower brachium pontis of individual sub-module capacitance and B phase thei+ 1 sub-module capacitance negative pole, whereiniValue be 1~N-1;The is connected in the lower brachium pontis of B phase by IGBT moduleNIndividual sub-module capacitance and second auxiliary capacitor negative pole.In C phase, the annexation of clamp diode is similar to A phase or B phase.
Accompanying drawing explanation
Below in conjunction with the accompanying drawings this utility model is further illustrated.
Fig. 1 is single structural representation clamping submodule;
Fig. 2 is that the centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology.
Detailed description of the invention
For of the present utility model performance and operation principle are expanded on further, it is specifically described with operation principle to the constituted mode of utility model below in conjunction with accompanying drawing.But list based on this principle clamp MMC is not limited to Fig. 2 from all pressure topologys.
With reference to Fig. 2, the centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology, and including the list clamp MMC model being made up of A, B, C three-phase, A, B, C three-phase is respectively by 2NIndividual single clamp submodule, 2 brachium pontis reactors are in series;Including by 6NIndividual IGBT module, 6N+ 5 clamp diodes, 2 auxiliary capacitorsC 1C 2, two auxiliary IGBT moduleT 1T 2Constitute the most all presses subsidiary loop.
In single clamp MMC model, A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole.1st submodule of brachium pontis in A phase, its submodule diode is connected with the 2nd of brachium pontis module I GBT module midpoint in A phase downwards with IGBT module tie-point, and its submodule IGBT module midpoint is upwards connected with dc bus positive pole;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are downwards and in A phase the of brachium pontisi+ 1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisi-1 submodule diode is connected with IGBT module tie-point;In A phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are down through two brachium pontis reactorsL 01st sub-module I GBT module midpoint of brachium pontis lower with A phase is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisN-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontisi+ 1 sub-module I GBT module midpoint is connected, the of its IGBT module midpoint upwards brachium pontis lower with A phasei-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseNIndividual submodule, its submodule diode is connected with dc bus negative pole downwards with IGBT module tie-point, the of its submodule IGBT module midpoint upwards brachium pontis lower with A phaseN-1 submodule diode is connected with IGBT module tie-point.B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole.1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with dc bus positive pole with IGBT module tie-point, and its submodule IGBT module midpoint is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards;In B phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisi-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is downwards with in B phase the of brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;In B phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is down through two brachium pontis reactorsL 01st submodule diode of brachium pontis lower with B phase is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseiIndividual submodule, whereiniValue be 2~N-1, the of its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phasei-1 sub-module I GBT module midpoint is connected, its submodule IGBT module midpoint downwards with the of B phase time brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseNIndividual submodule, its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phase theN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is connected with dc bus negative pole downwards.The connected mode of C phase upper and lower bridge arm submodule is consistent with A.
From all pressing in subsidiary loop, auxiliary capacitorC 1Positive pole connects auxiliary IGBT moduleT 1, negative pole connects clamp diode and is incorporated to dc bus positive pole;Auxiliary capacitorC 2Negative pole connects auxiliary IGBT moduleT 2, positive pole connects clamp diode and is incorporated to dc bus negative pole.Clamp diode, passes through IGBT moduleT au_11st sub-module capacitance in brachium pontis in connection A phaseC ­au­_1With auxiliary capacitorC 1Positive pole;Pass through IGBT moduleT au_i T au_i+1Connect in A phase in brachium pontis theiIndividual sub-module capacitanceC ­au­_i Withi+ 1 sub-module capacitanceC­au­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT au_N T al_1Connect in A phase in brachium pontis theNIndividual sub-module capacitanceC­au­_N Brachium pontis 1st sub-module capacitance lower with A phaseC­al­_1Positive pole;By IGBT module Tal_i T al_i+1Connect in the lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al­_i Brachium pontis lower with A phase thei+ 1 sub-module capacitanceC­al­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT al_N Connect in the lower brachium pontis of A phase theNIndividual sub-module capacitanceC ­al_N With auxiliary capacitorC 2Positive pole.Clamp diode, passes through IGBT moduleT bu_11st sub-module capacitance in brachium pontis in connection B phaseC­bu­_1With auxiliary capacitorC 1Negative pole;Pass through IGBT moduleT bu_i T bu_i+1Connect in B phase in brachium pontis theiIndividual sub-module capacitanceC­bu­_i Withi+ 1 sub-module capacitanceC ­bu­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bu_N T bl_1Connect in B phase in brachium pontis theNIndividual sub-module capacitanceC­bu_N Brachium pontis 1st sub-module capacitance lower with B phaseC­bl­_1Negative pole;Pass through IGBT moduleT bl_i T bl_i+1Connect in the lower brachium pontis of B phase theiIndividual sub-module capacitanceC­bl­_i Brachium pontis lower with B phase thei+ 1 sub-module capacitanceC ­bl­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bl_N Connect in the lower brachium pontis of B phase theNIndividual sub-module capacitance bl­_N With auxiliary capacitorC 2Negative pole.In C phase, the annexation of clamp diode is consistent with A.
Under normal circumstances, from the most all pressure subsidiary loop in 6NIndividual IGBT moduleT au_i T al_i T bu_iT bl_i T cu_i T cl_i Normally closed, whereiniValue be 1~N, first sub-module capacitance of brachium pontis in A phaseC­au­_1During bypass, now assist IGBT moduleT 1Disconnect, submodule electric capacityC ­ au­_1With auxiliary capacitorC 1In parallel by clamp diode;Brachium pontis in A phaseiIndividual sub-module capacitanceC­au­_i During bypass, whereiniValue be 2~N, submodule electric capacityC­au­_i With submodule electric capacityC­au­_i-1In parallel by clamp diode;Lower first the sub-module capacitance of brachium pontis of A phaseC­al_1During bypass, submodule electric capacityC­al­_1By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC­au­_N In parallel;The lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al_i During bypass, whereiniValue be 2~N, submodule electric capacityC ­ al­_i With submodule electric capacityC­al_i-1In parallel by clamp diode;Auxiliary IGBT moduleT 2During Guan Bi, auxiliary capacitorC 2By clamp diode and submodule electric capacityC­al_N In parallel.
Under normal circumstances, from the most all pressure subsidiary loop in 6NIndividual IGBT moduleT au_i T al_i T bu_iT bl_i T cu_i T cl_i Normally closed, whereiniValue be 1~N, assist IGBT moduleT 1During Guan Bi, auxiliary capacitorC 1With submodule electric capacityC­bu­_1In parallel by clamp diode;Brachium pontis in B phaseiIndividual sub-module capacitanceC ­bu­_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bu­_i With submodule electric capacityC ­bu­_i+1In parallel by clamp diode;Brachium pontis in B phaseNIndividual sub-module capacitanceC ­bu_N During bypass, submodule electric capacityC ­bu­_N By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC ­bl­_1In parallel;The lower brachium pontis of B phase theiIndividual sub-module capacitanceC ­bl_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bl­_i With submodule electric capacity bl_i+1In parallel by clamp diode;The lower brachium pontis of B phaseNIndividual sub-module capacitanceC­bl_N During bypass, submodule electric capacityC­bl­_N With auxiliary capacitorC­2In parallel by clamp diode.Wherein assist IGBT moduleT 1To trigger signal consistent with " logic and " with the 1st submodule of brachium pontis in A, C phase triggering signal;Auxiliary IGBT moduleT 2The lower brachium pontis of triggering signal and B phase theNThe triggering signal of individual submodule is consistent.
During orthogonal stream energy is changed, each submodule alternately puts into, bypass, assists IGBT moduleT 1T 2Alternation switch, A, B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets and descends column constraint:
It follows that at single clamp MMC in the dynamic process completing the conversion of orthogonal stream energy, meet following constraints:
Constraints that C, B the are alternate constraints alternate with A, B is consistent.
Being illustrated from above-mentioned, this list clamp MMC topology possesses submodule capacitor voltage from the ability of equalization.
Finally should be noted that: described embodiment is only some embodiments of the present application rather than whole embodiments.Based on the embodiment in the application, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of the application protection.

Claims (6)

1. the centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology, it is characterised in that: including the list clamp MMC model being made up of A, B, C three-phase, A, B, C three-phase is respectively by 2NIndividual single clamp submodule, 2 brachium pontis reactors are in series;Including by 6NIndividual IGBT module, 6N+ 5 clamp diodes, 2 auxiliary capacitorsC 1C 2, 2 auxiliary IGBT moduleT 1T 2Constitute the most all presses subsidiary loop.
2. according to the centralized single clamp MMC of the auxiliary capacitor based on equality constraint described in right 1 from all pressing topology, it is characterised in that: A phase upper and lower bridge arm, in single clamp submodule, diode connexon module capacitance positive pole, IGBT module connexon module capacitance negative pole;1st submodule of brachium pontis in A phase, its submodule diode is connected with the 2nd of brachium pontis module I GBT module midpoint in A phase downwards with IGBT module tie-point, and its submodule IGBT module midpoint is upwards connected with dc bus positive pole;In A phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are downwards and in A phase the of brachium pontisi+ 1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisi-1 submodule diode is connected with IGBT module tie-point;In A phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are down through two brachium pontis reactorsL 01st sub-module I GBT module midpoint of brachium pontis lower with A phase is connected, and its submodule IGBT module midpoint is upwards with in A phase the of brachium pontisN-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point downwards with the of A phase time brachium pontisi+ 1 sub-module I GBT module midpoint is connected, the of its IGBT module midpoint upwards brachium pontis lower with A phasei-1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of A phaseNIndividual submodule, its submodule diode is connected with dc bus negative pole downwards with IGBT module tie-point, the of its submodule IGBT module midpoint upwards brachium pontis lower with A phaseN-1 submodule diode is connected with IGBT module tie-point;B phase upper and lower bridge arm, in single clamp submodule, IGBT module connexon module capacitance positive pole, diode connexon module capacitance negative pole;1st submodule of brachium pontis in B phase, its submodule diode is upwards connected with dc bus positive pole with IGBT module tie-point, and its submodule IGBT module midpoint is connected with IGBT module tie-point with the 2nd submodule diode of brachium pontis in B phase downwards;In B phase the of brachium pontisiIndividual submodule, whereiniValue be 2~N-1, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisi-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is downwards with in B phase the of brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;In B phase the of brachium pontisNIndividual submodule, its submodule diode and IGBT module tie-point are upwards with in B phase the of brachium pontisN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is down through two brachium pontis reactorsL 01st submodule diode of brachium pontis lower with B phase is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseiIndividual submodule, whereiniValue be 2~N-1, the of its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phasei-1 sub-module I GBT module midpoint is connected, its submodule IGBT module midpoint downwards with the of B phase time brachium pontisi+ 1 submodule diode is connected with IGBT module tie-point;The of the lower brachium pontis of B phaseNIndividual submodule, its submodule diode and IGBT module tie-point upwards brachium pontis lower with B phase theN-1 sub-module I GBT module midpoint is connected, and its submodule IGBT module midpoint is connected with dc bus negative pole downwards;The connected mode of C phase upper and lower bridge arm submodule can be consistent with A, it is also possible to consistent with B;At A, B, C phase upper and lower bridge armiMechanical switch it is parallel with respectively between the upper and lower output lead of individual submoduleK au_i K al_i K bu_i K bl_i K cu_i K cl_i , whereiniValue be 1~N;A, B, C three-phase status that above-mentioned annexation is constituted is consistent, and other topologys after three-phase symmetrized in turn are in interest field.
3. according to the centralized single clamp MMC of the auxiliary capacitor based on equality constraint described in right 1 from all pressing topology, it is characterised in that: in all pressure subsidiary loops, auxiliary capacitorC 1Positive pole connects auxiliary IGBT moduleT 1, negative pole connects clamp diode and is incorporated to dc bus positive pole;Auxiliary capacitorC 2Negative pole connects auxiliary IGBT moduleT 2, positive pole connects clamp diode and is incorporated to dc bus negative pole;Clamp diode, passes through IGBT moduleT au_11st sub-module capacitance in brachium pontis in connection A phaseC ­au­_1With auxiliary capacitorC 1Positive pole;Pass through IGBT moduleT au_i T au_i+1Connect in A phase in brachium pontis theiIndividual sub-module capacitanceC ­au­_i Withi+ 1 sub-module capacitanceC­au­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT au_N T al_1Connect in A phase in brachium pontis theNIndividual sub-module capacitanceC­au­_N Brachium pontis 1st sub-module capacitance lower with A phaseC­al­_1Positive pole;By IGBT module Tal_i T al_i+1Connect in the lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al­_i Brachium pontis lower with A phase thei+ 1 sub-module capacitanceC­al­_i+1Positive pole, whereiniValue be 1~N-1;Pass through IGBT moduleT al_N Connect in the lower brachium pontis of A phase theNIndividual sub-module capacitanceC ­al_N With auxiliary capacitorC 2Positive pole;Clamp diode, passes through IGBT moduleT bu_11st sub-module capacitance in brachium pontis in connection B phaseC­bu­_1With auxiliary capacitorC 1Negative pole;Pass through IGBT moduleT bu_i T bu_i+1Connect in B phase in brachium pontis theiIndividual sub-module capacitanceC­bu­_i Withi+ 1 sub-module capacitanceC ­bu­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bu_N T bl_1Connect in B phase in brachium pontis theNIndividual sub-module capacitanceC­bu_N Brachium pontis 1st sub-module capacitance lower with B phaseC­bl­_1Negative pole;Pass through IGBT moduleT bl_i T bl_i+1Connect in the lower brachium pontis of B phase theiIndividual sub-module capacitanceC­bl­_i Brachium pontis lower with B phase thei+ 1 sub-module capacitanceC ­bl­_i+1Negative pole, whereiniValue be 1~N-1;Pass through IGBT moduleT bl_N Connect in the lower brachium pontis of B phase theNIndividual sub-module capacitance bl­_N With auxiliary capacitorC 2Negative pole;In C phase, the annexation of clamp diode is consistent with A phase or B;In above-mentioned A, B, C three-phase 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i , whereiniValue be 1~N, 6N+ 5 clamp diodes, 2 auxiliary capacitorsC 1C 2And 2 auxiliary IGBT moduleT 1T 2, collectively form from all pressing subsidiary loop.
4. according to the centralized single clamp MMC of the auxiliary capacitor based on equality constraint described in right 1 from the most all pressing topology, it is characterised in that: during normal condition, in the most all pressure subsidiary loops 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i Normally closed, during failure condition, 6NIndividual IGBT moduleT au_i T al_i T bu_i T bl_i T cu_i T cl_i Disconnect, whereiniValue be 1~N;Under normal circumstances, first sub-module capacitance of brachium pontis in A phaseC­au­_1During bypass, now assist IGBT moduleT 1Disconnect, submodule electric capacityC ­ au­_1With auxiliary capacitorC 1In parallel by clamp diode;Brachium pontis in A phaseiIndividual sub-module capacitanceC­au­_i During bypass, whereiniValue be 2~N, submodule electric capacityC­au­_i With submodule electric capacityC­au­_i-1In parallel by clamp diode;Lower first the sub-module capacitance of brachium pontis of A phaseC­al_1During bypass, submodule electric capacityC­al­_1By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC­au­_N In parallel;The lower brachium pontis of A phase theiIndividual sub-module capacitanceC ­al_i During bypass, whereiniValue be 2~N, submodule electric capacityC ­ al­_i With submodule electric capacityC­al_i-1In parallel by clamp diode;Auxiliary IGBT moduleT 2During Guan Bi, auxiliary capacitorC 2By clamp diode and submodule electric capacityC­al_N In parallel;Auxiliary IGBT moduleT 1During Guan Bi, auxiliary capacitorC 1With submodule electric capacityC­bu­_1In parallel by clamp diode;Brachium pontis in B phaseiIndividual sub-module capacitanceC ­bu­_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bu­_i With submodule electric capacityC ­bu­_i+1In parallel by clamp diode;Brachium pontis in B phaseNIndividual sub-module capacitanceC ­bu_N During bypass, submodule electric capacityC ­bu­_N By clamp diode, two brachium pontis reactorsL 0With submodule electric capacityC ­bl­_1In parallel;The lower brachium pontis of B phase theiIndividual sub-module capacitanceC ­bl_i During bypass, whereiniValue be 1~N-1, submodule electric capacityC­bl­_i With submodule electric capacity bl_i+1In parallel by clamp diode;The lower brachium pontis of B phaseNIndividual sub-module capacitanceC­bl_N During bypass, submodule electric capacityC­bl­_N With auxiliary capacitorC­2In parallel by clamp diode;Wherein assist IGBT moduleT 1" logic and " that trigger first submodule triggering signal of signal and brachium pontis in A, C phase consistent;Auxiliary IGBT moduleT 2The lower brachium pontis of triggering signal and B phase theNThe triggering signal of individual submodule is consistent;During orthogonal stream energy is changed, each submodule alternately puts into, bypass, assists IGBT moduleT 1T 2Being alternately closed, turn off, A phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,U 1U au_1U C ­au_2…≥U C ­au_N U C ­al_1U C ­al_2…≥U al_N U 2;B phase upper and lower bridge arm submodule capacitor voltage, under the effect of clamp diode, meets lower column constraint,U 1U bu_1U C ­bu_2…≤U C ­bu_N U C ­bl_1U bl_2…≤U C ­bl_N U 2;The centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology, in dynamic process, and auxiliary capacitorC 1Both can be as the highest electric capacity of A phase voltage, again can be as the minimum electric capacity of B phase voltage;Auxiliary capacitorC 2Both can be as the minimum electric capacity of A phase voltage, again can be as the highest electric capacity of B phase voltage;Against two equality constraints, max (U Ca)=min(U Cb), min (U Ca)=max(U Cb), the 4 of A, B phase upper and lower bridge armNIndividual sub-module capacitance,C au_i C al_i C bu_i C bl_i , whereiniValue be 1~N, and auxiliary capacitorC 1C 2, voltage is in self-balancing state, and A, B of topology are alternate possesses submodule capacitor voltage from the ability of equalization;If the form of the composition of C phase is consistent with A in topology, then the constraints of C, B capacitive coupling voltage is consistent with capacitance voltage constraints between A, B;If the form of the composition of C phase is consistent with B in topology, then the constraints of A, C capacitive coupling voltage is consistent with capacitance voltage constraints between A, B, and topology possesses submodule capacitor voltage from the ability of equalization;In utilizing clamp diode to realize mutually between adjacent submodule on the basis of capacitive energy single-phase flow, equality constraint max between dependence auxiliary capacitor voltage (U Ca) =min(U Cb), min (U Ca)=max(U Cb), or max (U Ca) =min(U Cc), min (U Ca)=max(U Cc), or max (U Cc) =min(U Cb), min (U Cc)=max(U Cb), it is achieved the alternate flowing of capacitive energy constitutes the peripheral passage of capacitive energy, and then keeps alternate submodule capacitor voltage stable, is the protection content of this right.
5. according to the centralized single clamp MMC of the auxiliary capacitor based on equality constraint described in right 1 from all pressing topology, it is characterised in that: auxiliary capacitorC 1C 2Both as the passage of A, B capacitive coupling energy exchange, again as the passage of B, C capacitive coupling energy exchange;The function of auxiliary capacitor focus utilization in topology the most all presses the device consumption in subsidiary loop to reduce;Auxiliary capacitorC 1Function concentrate, auxiliary capacitorC 2Function do not concentrate;Auxiliary capacitorC 1Function do not concentrate, auxiliary capacitorC 2Function concentrate topology in interest field.
6. according to the centralized single clamp MMC of the auxiliary capacitor based on equality constraint described in right 1 from all pressing topology, it is characterized in that: the centralized single clamp MMC of auxiliary capacitor based on equality constraint is from all pressing topology, not only serve as multi-level voltage source current converter and directly apply to flexible direct-current transmission field, also can be by constituting STATCOM (STATCOM), Research on Unified Power Quality Conditioner (UPQC), the device such as THE UPFC (UPFC) is applied to flexible AC transmission field;Other application scenarios of this utility model topology of indirect utilization and thought are in interest field.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105515426A (en) * 2016-01-25 2016-04-20 华北电力大学 Auxiliary capacitor concentrated type single-clamping MMC self-voltage-balancing topology based on equality constraints
CN112583026A (en) * 2020-03-16 2021-03-30 东北林业大学 MMC-STATCOM novel submodule capacitor voltage bidirectional equalization topology

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105515426A (en) * 2016-01-25 2016-04-20 华北电力大学 Auxiliary capacitor concentrated type single-clamping MMC self-voltage-balancing topology based on equality constraints
CN112583026A (en) * 2020-03-16 2021-03-30 东北林业大学 MMC-STATCOM novel submodule capacitor voltage bidirectional equalization topology

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