CN205428910U - 一种半导体贴片式分立器件用引线框架 - Google Patents

一种半导体贴片式分立器件用引线框架 Download PDF

Info

Publication number
CN205428910U
CN205428910U CN201620123719.9U CN201620123719U CN205428910U CN 205428910 U CN205428910 U CN 205428910U CN 201620123719 U CN201620123719 U CN 201620123719U CN 205428910 U CN205428910 U CN 205428910U
Authority
CN
China
Prior art keywords
pin
chip
dao
lead frame
smd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201620123719.9U
Other languages
English (en)
Inventor
赵元杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Yourun Microelectronics Co Ltd
Original Assignee
Jiangsu Yourun Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Yourun Microelectronics Co Ltd filed Critical Jiangsu Yourun Microelectronics Co Ltd
Priority to CN201620123719.9U priority Critical patent/CN205428910U/zh
Application granted granted Critical
Publication of CN205428910U publication Critical patent/CN205428910U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型公开了半导体领域内的一种半导体贴片式分立器件用引线框架，包括框架底筋，框架底筋上开设有若干封装口，每个封装口内均设有第一引脚、第二引脚和基岛，所述基岛上经导电胶粘接有芯片，芯片表面的焊区分别经键合金丝与第一引脚和第二引脚对应相连，所述基岛的中部冲切有沉孔，所述芯片的下部埋入基岛的沉孔内并经导电胶固定粘接在基岛上。所述芯片的周围以及第一引脚和第二引脚的上部均镀有一层银。所述框架底筋上开设有若干定位孔。本实用新型使得产品塑封体的厚度更薄，缩短了键合金丝的长度，制造成本更低，芯片与引线框架之间形成良好的欧姆接触。

Description

一种半导体贴片式分立器件用引线框架
技术领域
本实用新型属于半导体领域，特别涉及一种半导体贴片式分立器件用引线框架。
背景技术
随着我国电子产业的发展，封装技术也在不断升级。当今计算机和信息工业已成为世界各工业发达国家的主导产业之一，集成电路和电子分立器件是现代化电子信息的工业技术核心，是电子计算机、信息工业发展的基础。随着电子信息元件向轻、薄、短、小化方向发展，也促进了引线框架生产技术的进步，要求引线框架的厚度更薄，制造成本更低，产品质量更好。
实用新型内容
本实用新型的目的是提供一种半导体贴片式分立器件用引线框架，使其厚度更薄，制造成本更低，质量更好。
本实用新型的目的是这样实现的：一种半导体贴片式分立器件用引线框架，包括框架底筋，框架底筋上开设有若干封装口，每个封装口内均设有第一引脚、第二引脚和基岛，所述基岛上经导电胶粘接有芯片，芯片表面的焊区分别经键合金丝与第一引脚和第二引脚对应相连，所述基岛的中部冲切有沉孔，所述芯片的下部埋入基岛的沉孔内并经导电胶固定粘接在基岛上。
与现有技术相比，本实用新型的有益效果在于：通过在基岛上冲切沉孔，避免了安装芯片的过程中导电胶的胶量过大导致导电胶受芯片压力影响溢出基岛本体，影响产品质量，使得芯片与引线框架形成良好的欧姆接触；有效地缩短了芯片焊区表面与框架引脚之间的高度距离，缩短了键合金丝的长度，减少了键合金丝的耗用量，降低封装成本；有效地减小了产品塑封体的整体厚度；从而降低分立器件用引线框架的制造成本。
作为本实用新型的进一步改进，所述芯片的周围以及第一引脚和第二引脚的上部均镀有一层银。通过超声波热压焊将芯片表面的焊区与第一引脚和第二引脚通过键合金丝连接起来，超声波热压焊将金和银在一定压力下焊接结合，形成一定的拉力，使得芯片和框架引脚之间的连接更牢固，避免短路。
为了便于引线框架进行封装，所述框架底筋上开设有若干定位孔。
附图说明
图1为本实用新型封装口的结构示意图。
图2为本实用新型的结构示意图。
图3为本实用新型封装口的另一种结构示意图。
其中，1框架底筋，2封装口，201第一引脚，202第二引脚，203基岛，3导电胶，4芯片，5键合金丝，6定位孔，7沉孔。
具体实施方式
如图1-3所示，为一种半导体贴片式分立器件用引线框架，包括框架底筋1，框架底筋1上开设有若干封装口2，每个封装口2内均设有第一引脚201、第二引脚202和基岛203，基岛203上经导电胶3粘接有芯片4，芯片4表面的焊区分别经键合金丝5与第一引脚201和第二引脚202对应相连，基岛203的中部冲切有沉孔7，芯片4的下部埋入基岛203的沉孔7内并经导电胶3固定粘接在基岛203上。为了便于进行超声波热压焊，芯片4的周围以及第一引脚201和第二引脚202的上部均镀有一层银。框架底筋1上开设有若干定位孔6。
通过在基岛203上冲切沉孔7，避免了安装芯片4的过程中导电胶3的胶量过大导致导电胶3受芯片4压力影响溢出基岛203本体，影响产品质量，使得芯片4与引线框架形成良好的欧姆接触，避免芯片4与框架引脚之间发生短路；有效地缩短了芯片4焊区表面与框架引脚之间的高度距离，缩短了键合金丝5的长度，减少了键合金丝5的耗用量，降低封装成本；有效地减小了产品塑封体的整体厚度；从而降低分立器件用引线框架的制造成本。
本实用新型并不局限于上述实施例，在本实用新型公开的技术方案的基础上，本领域的技术人员根据所公开的技术内容，不需要创造性的劳动就可以对其中的一些技术特征作出一些替换和变形，这些替换和变形均在本实用新型的保护范围内。

Claims (3)

1.一种半导体贴片式分立器件用引线框架，包括框架底筋，框架底筋上开设有若干封装口，每个封装口内均设有第一引脚、第二引脚和基岛，所述基岛上经导电胶粘接有芯片，芯片表面的焊区分别经键合金丝与第一引脚和第二引脚对应相连，其特征在于：所述基岛的中部冲切有沉孔，所述芯片的下部埋入基岛的沉孔内并经导电胶固定粘接在基岛上。
2.根据权利要求1所述的一种半导体贴片式分立器件用引线框架，其特征在于：所述芯片的周围以及第一引脚和第二引脚的上部均镀有一层银。
3.根据权利要求1或2所述的一种半导体贴片式分立器件用引线框架，其特征在于：所述框架底筋上开设有若干定位孔。
CN201620123719.9U 2016-02-17 2016-02-17 一种半导体贴片式分立器件用引线框架 Active CN205428910U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620123719.9U CN205428910U (zh) 2016-02-17 2016-02-17 一种半导体贴片式分立器件用引线框架

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620123719.9U CN205428910U (zh) 2016-02-17 2016-02-17 一种半导体贴片式分立器件用引线框架

Publications (1)

Publication Number Publication Date
CN205428910U true CN205428910U (zh) 2016-08-03

Family

ID=56541085

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620123719.9U Active CN205428910U (zh) 2016-02-17 2016-02-17 一种半导体贴片式分立器件用引线框架

Country Status (1)

Country Link
CN (1) CN205428910U (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109962051A (zh) * 2019-04-30 2019-07-02 无锡麟力科技有限公司 基岛沉降型封装结构
CN113540007A (zh) * 2020-04-16 2021-10-22 世界先进积体电路股份有限公司 封装结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109962051A (zh) * 2019-04-30 2019-07-02 无锡麟力科技有限公司 基岛沉降型封装结构
CN113540007A (zh) * 2020-04-16 2021-10-22 世界先进积体电路股份有限公司 封装结构

Similar Documents

Publication Publication Date Title
TWI654729B (zh) 半導體裝置及其製造方法
CN106783792A (zh) 一种塑封体侧面引脚具有侧边爬锡性能的封装结构
CN108109972A (zh) 具有引脚侧壁爬锡功能的半导体封装结构及其制造工艺
US20190341338A1 (en) Preformed lead frame and lead frame package made from the same
CN112447895A (zh) 一种增强防水性能的全彩smd led
CN205428910U (zh) 一种半导体贴片式分立器件用引线框架
JP3213791U (ja) リードフレームの予備成形体
CN201752013U (zh) 芯片与无源器件直接置放多圈引脚方式封装结构
CN102270620A (zh) 在边缘引脚具有凹槽的半导体封装结构
CN202050364U (zh) 桥式整流器
CN205752163U (zh) 二极管模块的框架
CN102157480A (zh) 桥式整流器
CN101944520A (zh) 半导体封装结构与半导体封装工艺
CN201829490U (zh) 芯片区打孔集成电路引线框架
CN106158796A (zh) 芯片封装结构及其制作方法
CN212587519U (zh) 一种led晶元封装结构
CN205211727U (zh) 一种指纹识别多芯片封装结构
CN204375733U (zh) 一种双引线框架
CN202394891U (zh) 一种中心布线双圈排列ic芯片堆叠封装件
CN219106192U (zh) 全覆式Chip LED器件
CN106298749B (zh) 发光二极管、电子器件及其制作方法
CN207587727U (zh) 一种多载体引线框架
CN207834289U (zh) 具有引脚侧壁爬锡功能的半导体封装结构
CN203871321U (zh) 无刷直流电机集成驱动电路的封装结构
CN220821555U (zh) 传感器芯片qfn封装过渡结构

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant