CN204516753U - Flip-chip framework half-etching structure - Google Patents
Flip-chip framework half-etching structure Download PDFInfo
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- CN204516753U CN204516753U CN201520097171.0U CN201520097171U CN204516753U CN 204516753 U CN204516753 U CN 204516753U CN 201520097171 U CN201520097171 U CN 201520097171U CN 204516753 U CN204516753 U CN 204516753U
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Abstract
The utility model relates to a kind of flip-chip framework half-etching structure, belongs to integrated circuit or discrete component encapsulation technology field.It comprises chip carrier (1) and pin array (2), and described pin array (2) is arranged at chip carrier (1) around, and described chip carrier (1) front is provided with longitudinal runner (3) and transverse flow channels (4).A kind of flip-chip framework of the utility model half-etching structure, it can guide the direction of mould stream on the one hand, and mould stream is flow through smoothly, solves because plastic packaging material is filled bad and causes pore and anti-package envelope phenomenon, improving stress on the other hand.
Description
Technical field
The utility model relates to a kind of flip-chip framework half-etching structure, belongs to integrated circuit or discrete component encapsulation technology field.
Background technology
Flip-chip framework in current industry under the die side doing front half-etching, therefore when flip-chip Frame Design large chip time because mould stream is obstructed, there is plastic packaging material and fill bad situation (as shown in Figure 1).
Summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, a kind of flip-chip framework half-etching structure is provided, it can guide the direction of mould stream on the one hand, mould stream is flow through smoothly, solve because plastic packaging material is filled bad and cause pore and anti-package envelope phenomenon, on the other hand because framework is metal material, chip is silicon material, two kinds of different materials combine, temperature influence, rising-heat contracting-cold, framework and chip chamber can produce stress, the utility model can reduce the contact of chip and metal covering in metal surface etching, thus improves stress.
The purpose of this utility model is achieved in that a kind of flip-chip framework half-etching structure, and it comprises chip carrier and pin array, and described pin array is arranged at around chip carrier, and described chip carrier front is provided with longitudinal runner and transverse flow channels.
The width of described longitudinal runner and transverse flow channels is the 1/4-1/2 of chip carrier width.
Described longitudinal runner and transverse flow channels are formed by half-etching.
Compared with prior art, the utility model has following beneficial effect:
A kind of flip-chip framework of the utility model half-etching structure, it can guide the direction of mould stream on the one hand, and mould stream is flow through smoothly, solves because plastic packaging material is filled bad and causes pore and anti-package envelope phenomenon, improving stress on the other hand.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing flip-chip framework.
Fig. 2 is the schematic diagram of a kind of flip-chip framework of the utility model half-etching structure.
Wherein:
Chip carrier 1
Pin array 2
Longitudinal runner 3
Transverse flow channels 4
Chip 5.
Embodiment
See Fig. 2, a kind of flip-chip framework of the utility model half-etching structure, it comprises chip carrier 1 and pin array 2, described pin array 2 is arranged at around chip carrier 1, described chip carrier 1 front is provided with longitudinal runner 3 and transverse flow channels 4, and described longitudinal runner 3 and transverse flow channels 4 are formed by half-etching.
Claims (3)
1. a flip-chip framework half-etching structure, it is characterized in that: it comprises chip carrier (1) and pin array (2), described pin array (2) is arranged at chip carrier (1) around, and described chip carrier (1) front is provided with longitudinal runner (3) and transverse flow channels (4).
2. a kind of flip-chip framework half-etching structure according to claim 1, is characterized in that: the width of described longitudinal runner (3) and transverse flow channels (4) is the 1/4-1/2 of chip carrier width.
3. a kind of flip-chip framework half-etching structure according to claim 1, is characterized in that: described longitudinal runner (3) and transverse flow channels (4) are formed by half-etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520097171.0U CN204516753U (en) | 2015-02-11 | 2015-02-11 | Flip-chip framework half-etching structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520097171.0U CN204516753U (en) | 2015-02-11 | 2015-02-11 | Flip-chip framework half-etching structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204516753U true CN204516753U (en) | 2015-07-29 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520097171.0U Active CN204516753U (en) | 2015-02-11 | 2015-02-11 | Flip-chip framework half-etching structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204516753U (en) |
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2015
- 2015-02-11 CN CN201520097171.0U patent/CN204516753U/en active Active
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |