CN203339146U - A multi-ceramic-layer patterned structural substrate for optical and electronic devices - Google Patents
A multi-ceramic-layer patterned structural substrate for optical and electronic devices Download PDFInfo
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- CN203339146U CN203339146U CN2013203450063U CN201320345006U CN203339146U CN 203339146 U CN203339146 U CN 203339146U CN 2013203450063 U CN2013203450063 U CN 2013203450063U CN 201320345006 U CN201320345006 U CN 201320345006U CN 203339146 U CN203339146 U CN 203339146U
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Abstract
The utility model relates to a multi-ceramic-layer patterned structural substrate for optical and electronic devices. The multi-ceramic-layer patterned structural substrate comprises a metallic basic body on which a voltage-withstanding ceramic layer and heat conductive ceramic layers are formed successively. Transition layers are disposed between the voltage-withstanding ceramic layer and the heat conductive ceramic layers. And multiple isolating pedestals are formed by etching the heat conductive ceramic layers and the transition layers. The multi-ceramic-layer patterned structural substrate for optical and electronic devices has the metallic basic body with a larger size and is capable of containing multiple optical and/or electronic devices which have good electrical isolation and thermal insulation.
Description
Technical field
The utility model belongs to electronic technology field, and in particular, the utility model relates to a kind of pattern structure of many ceramic layers for optics and electronic device substrate.
Background technology
For the device of optics and/or electronics, as integrated circuit or laser diode all need to utilize heat conducting material to be conducted heat.Need to adopt metallic matrix for this reason, as the copper matrix, and often need the electricity isolation between the device of described optics and/or electronics and metallic matrix.And some ceramic material has higher heat conduction efficiency and electricity is insulated.The ceramic material that for this reason between the device of be everlasting optics and/or electronics and metallic matrix, uses high heat conduction is as for providing electricity isolation and the conductive intermediate materials of maintaining heat still.For the efficient heat transfer from the device of optics and/or electronics to metallic matrix is provided, it is essential that good hot interface is provided between pottery and metallic matrix.
And, in increasing application, a plurality of optics and/or electronic device need to be coupled in the functional structure with electricity isolation and heat conduction.And, in order to hold a plurality of optics and/or electronic device, need to use larger sized basis material, for example need to use larger metallic matrix and ceramic wafer.If yet, when described a plurality of optics and/or electronic device being coupled on the ceramic component at single interface, between the optics of each coupling and/or electronic device, will cause difficult heat transfer, and may cause electrically conduction and be short-circuited.For this reason, need between a plurality of optics and/or electronic device, provide electricity isolation and heat isolation.
The utility model content
In order to solve above-mentioned technical problem of the prior art, the purpose of this utility model is to provide a kind of pattern structure of many ceramic layers for optics and electronic device substrate.
To achieve these goals, the utility model has adopted following technical scheme:
Many ceramic layers for optics and electronic device pattern structure substrate described in the utility model, comprise metallic matrix, and be formed with successively withstand voltage ceramic layer and thermal conductive ceramic layer on described metallic matrix; There is transition zone between described withstand voltage ceramic layer and thermal conductive ceramic layer, and form a plurality of isolation pedestals by the described thermal conductive ceramic layer of etching and transition zone.
Wherein, the thickness of described withstand voltage ceramic layer is 10-500 um; Described withstand voltage ceramic layer is selected from aluminium oxide, a kind of in aluminum oxynitride or carborundum.Described withstand voltage ceramic layer can prevent the problem of high electrical breakdown, improves the safety and stability of described structure.
Wherein, the thickness of described thermal conductive ceramic layer is 10-500 um; And be selected from AlN, AlON or SiN.Described thermal conductive ceramic layer can be realized laterally and the conduction of heat radially, solves the heat dissipation problem of optics and/or electronic unit.
Wherein, there is brazing layer between described metal substrate and withstand voltage ceramic layer.
The technical solution of the utility model has following beneficial effect compared to existing technology:
(1) pattern structure of the many ceramic layers for optics and electronic device substrate described in the utility model, there is larger sized metal substrate, and can hold a plurality of optics and/or electronic device, and there is good electricity isolation and heat isolation between described a plurality of optics and/or electronic device.
(2) pattern structure of the many ceramic layers for optics and electronic device substrate described in the utility model, described thermal conductive ceramic layer can be realized radially effectively heat conduction and shift, solve the heat dissipation problem of optics and/or electronic unit; Described withstand voltage ceramic layer can prevent the problem of high electrical breakdown, improves the safety and stability of described structure.
(3) pattern structure of the many ceramic layers for optics and electronic device substrate described in the utility model, can on described isolation pedestal, form the metallic circuit layer as required, described metallic circuit layer can be by depositing metal layers on the thermal conductive ceramic layer, and then dry ecthing forms; Also can after forming, the isolation pedestal form by deposition or coating.
The accompanying drawing explanation
The schematic diagram that Fig. 1 is the described pattern structure of many ceramic layers for optics and electronic device of embodiment 1 substrate.
The schematic diagram that Fig. 2 is the described pattern structure of many ceramic layers for optics and electronic device of embodiment 2 substrate.
Embodiment
embodiment 1
As shown in Figure 1, the described pattern structure of many ceramic layers for optics and electronic device of the present embodiment substrate, comprise aluminum or aluminum alloy matrix 10, and be formed with successively the withstand voltage ceramic layer 20 of SiC and AlN thermal conductive ceramic layer 40 on described metallic matrix; Described SiC is withstand voltage has aluminium transition zone 30 between ceramic layer 20 and AlN thermal conductive ceramic layer 40, and forms a plurality of isolation pedestals 50 by the described AlN thermal conductive ceramic of etching layer 40 and aluminium transition zone 30.The described structure of the present embodiment can be for electronic devices such as the optics such as LED etc. or wiring boards, and can be on single metal substrate a plurality of optics of intensive laying and/or electronic device, and needn't worry heat conduction and the conductivity between described a plurality of optics and/or electronic device.
embodiment 2
As shown in Figure 2, the described pattern structure of many ceramic layers for optics and electronic device of the present embodiment substrate, comprise aluminum or aluminum alloy matrix 10, and be formed with successively the withstand voltage ceramic layer 20 of SiC and AlN thermal conductive ceramic layer 40 on described metallic matrix; Described SiC is withstand voltage has aluminium transition zone 30 between ceramic layer 20 and AlN thermal conductive ceramic layer 40, between the withstand voltage ceramic layer 20 of described alloy matrix aluminum 10 and described SiC, is provided with active soldering layer 60; And form a plurality of isolation pedestals 50 by the described AlN thermal conductive ceramic of etching layer 40 and aluminium transition zone 30.The described structure of the present embodiment can be for electronic devices such as the optics such as LED etc. or wiring boards, and can be on single metal substrate a plurality of optics of intensive laying and/or electronic device, and needn't worry heat conduction and the conductivity between described a plurality of optics and/or electronic device.
For the ordinary skill in the art, be to be understood that and can not breaking away from the utility model scope of disclosure, can adopt to be equal to and replace or equivalent transformation form enforcement above-described embodiment.Protection range of the present utility model is not limited to the specific embodiment of embodiment part, as long as no the execution mode that breaks away from utility model essence, within all being interpreted as dropping on the protection range of the utility model requirement.
Claims (4)
1. the pattern structure of the many ceramic layers for an optics and electronic device substrate, comprise metallic matrix, it is characterized in that being formed with successively withstand voltage ceramic layer and thermal conductive ceramic layer on described metallic matrix; There is transition zone between described withstand voltage ceramic layer and thermal conductive ceramic layer, and form a plurality of isolation pedestals by the described thermal conductive ceramic layer of etching and transition zone.
2. the pattern structure of the many ceramic layers for optics and electronic device substrate according to claim 1, the thickness that it is characterized in that described withstand voltage ceramic layer is 10-500 μ m.
3. the pattern structure of the many ceramic layers for optics and electronic device substrate according to claim 1, the thickness that it is characterized in that described thermal conductive ceramic layer is 10-500 μ m.
4. the pattern structure of the many ceramic layers for optics and electronic device substrate according to claim 1, is characterized in that having brazing layer between described metal substrate and withstand voltage ceramic layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203450063U CN203339146U (en) | 2013-06-17 | 2013-06-17 | A multi-ceramic-layer patterned structural substrate for optical and electronic devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203450063U CN203339146U (en) | 2013-06-17 | 2013-06-17 | A multi-ceramic-layer patterned structural substrate for optical and electronic devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203339146U true CN203339146U (en) | 2013-12-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013203450063U Expired - Fee Related CN203339146U (en) | 2013-06-17 | 2013-06-17 | A multi-ceramic-layer patterned structural substrate for optical and electronic devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203339146U (en) |
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2013
- 2013-06-17 CN CN2013203450063U patent/CN203339146U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: SUZHOU JINGPIN ADVANCED MATERIALS CO., LTD. Free format text: FORMER NAME: SUZHOU JINGPIN PHOTOELECTRIC TECHNOLOGY CO., LTD. |
|
| CP03 | Change of name, title or address |
Address after: Wujiang District of Suzhou City, Jiangsu province 215200 Lili town FENHU Road No. 558 Patentee after: Suzhou Jing Pin new material limited company Address before: FenHu FenHu Avenue in Wujiang District of Suzhou City, Jiangsu province 215211 No. 558 No. two on the third floor of the building of scientific research innovation park (South) Patentee before: Suzhou Jingpin Optical-Electronical Technology Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131211 Termination date: 20160617 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |