CN202816924U - Power device packaging substrate - Google Patents
Power device packaging substrate Download PDFInfo
- Publication number
- CN202816924U CN202816924U CN 201220401421 CN201220401421U CN202816924U CN 202816924 U CN202816924 U CN 202816924U CN 201220401421 CN201220401421 CN 201220401421 CN 201220401421 U CN201220401421 U CN 201220401421U CN 202816924 U CN202816924 U CN 202816924U
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- copper
- copper layer
- ceramic substrate
- power device
- floor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The utility model belongs to the electronic packaging technology, and relates to a ceramic substrate for heat dissipation in power device packaging. The power device packaging substrate comprises a ceramic substrate, a chip welding area copper layer, an electrode lead area copper layer and a stress compensation copper layer, wherein the chip welding area copper layer, the electrode lead area copper layer and the stress compensation copper layer are of a nano-porous copper structure and identical in thickness, the chip welding area copper layer and the electrode lead area copper layer are disposed on the upper surface of the ceramic substrate, and the stress compensation copper layer is disposed on the lower surface of the ceramic substrate. The copper layer can be manufactured on the ceramic substrate by adopting processes such as copper foil electroplating, selective corrosion, thermal compression bonding and the like, and the thickness of the copper layer is selected within the range of 30-500 micrometers. The power device packaging substrate has the characteristics that heat dissipation performance, electrical conductivity, weldability, resistance to heat shocks, adhesive force between the copper layer and the ceramic substrate, and the like of power device products such as large-power LEDs, IGBTs, LDs and the like are improved, thereby significantly improving the reliability and the stability of power electronic products, particularly reducing the production cost of ceramic copper-clad plates, and being applicable to mass production and development of chip on board (COB) packaging technology.
Description
Technical field
The field belongs to Electronic Encapsulating Technology under the utility model, is specifically related to a kind of power device package ceramic heat-dissipating substrate.
Background technology
Along with three-dimensional packaging technology development and level of integrated system improve, take large-power light-emitting diodes (LED), igbt (IGBT), laser (LD) in the power device manufacture process of representative, selecting of heat-radiating substrate becomes crucial sport technique segment, and directly has influence on serviceability and the reliability of device.For Electronic Packaging, heat-radiating substrate mainly is high heat conductance itself that utilize its material to have, and heat is derived from chip, realizes and extraneous electrical interconnection and heat exchange.But for power device package, substrate also requires to have higher heat conduction, insulation, high temperature resistant, proof voltage ability and thermal matching energy except possessing basic wiring (electrical interconnection) function, generally adopt ceramic copper-clad plate.Ceramic copper-clad plate commonly used comprises the metallized ceramic base plate of thick-film technique preparation, the ceramic copper-clad plate (DBC) of high temperature Direct Bonding technique preparation and the ceramic copper-clad plate (DPC) of directly electroplating technology preparation at present.Wherein, thick-film technique is fired the metallization that realizes pottery after adopting the metal paste printing, and its shortcoming is cost of sizing agent and sintering process (1300 ℃) cost height, and metal layer rough surface, thickness generally are no more than 25 microns, have limited the ducting capacity of high electric current; (1065 ℃) Cu and Al under the high temperature adopted in the preparation of DBC substrate
2O
3Between eutectic reaction, equipment and process control is had relatively high expectations, production cost is high; And DPC substrate surface copper layer adopts the electroplating technology preparation, thickness limited (generally being lower than 100 microns), and the bond strength between copper layer and pottery is low, and reliability was lower when product was used.
The utility model content
Deficiency for above-mentioned ceramic substrate performance, the utility model proposes a kind of power device package substrate, it can improve the adhesive force between thermal diffusivity, conductivity, solderability, thermal-shock resistance, copper layer and the ceramic substrate of power device product, satisfies the power device package radiating requirements.
The power device package substrate that the utility model provides, it is characterized in that, it comprises ceramic substrate, have the identical chips welding district copper floor of nanoporous steel structure and thickness, contact conductor district copper floor and stress compensation copper floor, chips welding district copper floor and contact conductor district copper floor are positioned at the ceramic substrate upper surface, and stress compensation copper layer is positioned at the ceramic substrate lower surface.
The beneficial effect of a kind of power device package substrate of the present utility model is: adopt the mode of Copper Foil and potsherd low-temperature thermocompression bonding, prepare the novel copper ceramic substrate that covers, satisfy the power device package radiating requirements.Can improve adhesive force between thermal diffusivity, conductivity, solderability, thermal-shock resistance, copper layer and the ceramic substrate of power device (such as great power LED, IGBT, LD etc.) product etc., thereby significantly improve the reliability and stability of power electronic product, especially can reduce the production cost of ceramic copper-clad plate, be fit to the development of large-scale production and chip on board encapsulation technology (COB).
The ceramic copper-clad plate of the utility model preparation has following features:
(1) perfect heat-dissipating, adhesive strength is high between copper layer and ceramic substrate, stress is little.Pottery is high thermal conducting material (the aluminium oxide thermal conductivity is 20-30W/mK, and the aluminium nitride thermal conductivity is greater than 200W/mK), and the thermal conductivity of copper reaches 398W/mK.Particularly the copper layer adopts low-temperature thermocompression bonding technique to be combined with potsherd, and interfacial stress is little, thermal resistance is little, adhesion strength is high;
(2) heat-resisting, good insulation preformance.Pottery is heat-resistant insulation material, and the adhesive strength of copper layer is not subjected to the impact of temperature;
(3) thermal shock resistance is strong.The thermal coefficient of expansion of ceramic copper-clad plate (CTE) is determined by Ceramic Substrate Material, and the CTE of the CTE of Ceramic Substrate Material and power device chip is close, has avoided the high thermal stress between chip and substrate after the welded encapsulation;
(4) copper layer thickness depends on copper thickness, can (30 microns to 500 microns) select in wide range, satisfies power device package conduction, heat radiation requirement;
(5) solderability is good.Copper layer smooth surface is conducive to that power device chip mounts and routing;
(6) production cost is low, and ceramic copper-clad plate can adopt Copper Foil and ceramic substrate thermocompression bonding preparation, and technique is simple, is fit to large-scale production, and satisfies chip on board encapsulation technology (COB) development.
Description of drawings
Fig. 1 is the overall structure cross-sectional schematic of the utility model embodiment, and 1 is ceramic substrate among the figure, and 2 is chips welding district copper floor, and 3 is contact conductor district copper floor, and 4 are bottom stress compensation copper layer.
Fig. 2 is the process chart of the utility model embodiment.
Embodiment
Below by by embodiment the utility model being described in further detail, but following examples only are illustrative, and protection range of the present utility model is not subjected to the restriction of these embodiment.
As shown in Figure 1, the utility model base plate for packaging comprises ceramic substrate 1, the chips welding district copper floor 2 of ceramic substrate upper surface and contact conductor district copper floor 3, the stress compensation copper layer 4 of ceramic substrate lower surface.Wherein, chips welding district copper floor 2 is identical with the thickness of stress compensation copper floor 4.
Ceramic substrate 1 is aluminium oxide, aluminium nitride or beryllium oxide ceramics substrate, and copper layer 2,3, the 4th by the copper metallization that pure copper material forms, specifically adopts electrolytic copper foil to form in ceramic substrate surface thermocompression bonding.Described copper layer thickness is 30 microns to 500 microns, is preferably 50 microns to 100 microns.Chip in the chips welding district 2 can be one or more, and a plurality of chips can be array and distribute.
Prepare the technological process of above-mentioned base plate for packaging as shown in Figure 2, specifically comprise:
1) ceramic substrate through clean/oven dry after, each sputter 20nm titanium film (Ti) of upper and lower surface and 50nm copper film (Cu).The shape of ceramic substrate can be circular, also can be square or other are special-shaped.The material of ceramic substrate can be aluminium oxide, aluminium nitride or beryllium oxide;
2) choosing thickness is 100 microns cathode copper paillon foil (size suitable with ceramic substrate), and the layer of brass behind 5 microns of the first electroplating depositions obtains one deck nanoporous steel structure by selective corrosion at copper foil surface again.The thickness of electrolytic copper foil has determined the copper layer thickness of ceramic base plate surface, can select to 500 micrometer ranges at 30 microns.
3) two identical Copper Foils of thickness being placed respectively sputter the ceramic substrate upper and lower surface of metallic film is arranged, is 350 degree in temperature, and pressure is to realize thermocompression bonding under the vacuum environment of 5MPa, obtains the copper-ceramic substrate of two-sided copper containing layer;
4) by the figure burn into cleans, the technique such as dry is prepared the containing metal circuit ceramic copper-clad plate.
The above only is the preferred embodiment of a kind of power device package substrate of the present utility model, is not that the utility model technical scope is made any restriction.Copper Foil can be electrolytic copper foil or rolled copper foil as described, and its thickness is 10 μ m to 500 μ m.Every foundation technical spirit of the present utility model is made any modification or equivalent variations, modification to above-described embodiment, all belongs to the scope of the utility model technology contents.
Claims (8)
1. power device package substrate, it is characterized in that, it comprises ceramic substrate, and have nanoporous steel structure and identical chips welding district copper floor, contact conductor district copper floor and a stress compensation copper floor of thickness, chips welding district copper floor and contact conductor district copper floor are positioned at the ceramic substrate upper surface, and stress compensation copper layer is positioned at the ceramic substrate lower surface.
2. described power device package substrate according to claim 1 is characterized in that, described chips welding district copper floor, contact conductor district copper floor and the stress compensation copper floor copper floor for being formed at ceramic substrate surface hot pressing by Copper Foil.
3. described power device package substrate according to claim 2 is characterized in that described Copper Foil is electrolytic copper foil or rolled copper foil.
4. described power device package substrate according to claim 1 is characterized in that described ceramic substrate is alumina ceramic substrate, aluminium nitride ceramic substrate or beryllium oxide ceramics substrate.
5. according to claim 1,2 or 3 described power device package substrates, it is characterized in that described chips welding district copper floor, contact conductor district copper floor and stress compensation copper layer thickness are 30 microns to 500 microns.
6. according to claim 1,2 or 3 described power device package substrates, it is characterized in that described chips welding district copper floor, contact conductor district copper floor and stress compensation copper layer thickness are 50 microns to 100 microns.
7. according to claim 1,2 or 3 described power device package substrates, it is characterized in that, be furnished with a chip on the described chips welding district copper floor.
8. according to claim 1,2 or 3 described power device package substrates, it is characterized in that be furnished with a plurality of chips on the described chips welding district copper floor, a plurality of chips are array and distribute.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220401421 CN202816924U (en) | 2012-08-14 | 2012-08-14 | Power device packaging substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220401421 CN202816924U (en) | 2012-08-14 | 2012-08-14 | Power device packaging substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202816924U true CN202816924U (en) | 2013-03-20 |
Family
ID=47875764
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220401421 Expired - Lifetime CN202816924U (en) | 2012-08-14 | 2012-08-14 | Power device packaging substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202816924U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103715101A (en) * | 2013-12-23 | 2014-04-09 | 上海申和热磁电子有限公司 | Hot pressing method for direct copper-coated ceramic base board |
| CN105244425A (en) * | 2015-10-13 | 2016-01-13 | 深圳大学 | Flip-chip LED (light-emitting diode) chip and manufacturing method for electrodes of flip-chip LED chip |
| TWI555174B (en) * | 2013-09-23 | 2016-10-21 | 台達電子企業管理（上海）有限公司 | Power module |
| CN112310029A (en) * | 2019-07-26 | 2021-02-02 | 株洲中车时代半导体有限公司 | Substrate and substrate integrated power semiconductor device and manufacturing method thereof |
-
2012
- 2012-08-14 CN CN 201220401421 patent/CN202816924U/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI555174B (en) * | 2013-09-23 | 2016-10-21 | 台達電子企業管理（上海）有限公司 | Power module |
| US10381286B2 (en) | 2013-09-23 | 2019-08-13 | Delta Electronics (Shanghai) Co., Ltd. | Power module |
| CN103715101A (en) * | 2013-12-23 | 2014-04-09 | 上海申和热磁电子有限公司 | Hot pressing method for direct copper-coated ceramic base board |
| CN105244425A (en) * | 2015-10-13 | 2016-01-13 | 深圳大学 | Flip-chip LED (light-emitting diode) chip and manufacturing method for electrodes of flip-chip LED chip |
| CN105244425B (en) * | 2015-10-13 | 2018-06-19 | 深圳大学 | The manufacturing method of flip LED chips and its electrode |
| CN112310029A (en) * | 2019-07-26 | 2021-02-02 | 株洲中车时代半导体有限公司 | Substrate and substrate integrated power semiconductor device and manufacturing method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 430200 Wuhan four East Lake Road Development Zone, Hubei 40 Gezhouba Dam 40 Sun City 23 building 103 room. Patentee after: WUHAN LIZHIDA TECHNOLOGY CO.,LTD. Address before: 430074 Ding Yuan Lou, international business center, Optics Valley Avenue, Wuhan, Hubei, A423 Patentee before: WUHAN LIZHIDA SCIENCE & TECHNOLOGY Co.,Ltd. |
|
| CP03 | Change of name, title or address | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130320 |
|
| CX01 | Expiry of patent term |