CN202772130U - 一种基于aaqfn可用于单芯片封装的封装件 - Google Patents

一种基于aaqfn可用于单芯片封装的封装件 Download PDF

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CN202772130U
CN202772130U CN2012202758551U CN201220275855U CN202772130U CN 202772130 U CN202772130 U CN 202772130U CN 2012202758551 U CN2012202758551 U CN 2012202758551U CN 201220275855 U CN201220275855 U CN 201220275855U CN 202772130 U CN202772130 U CN 202772130U
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chip
lead frame
bonding
packaging
aaqfn
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郭小伟
谌世广
崔梦
李万霞
王虎
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Huatian Technology Xian Co Ltd
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Huatian Technology Xian Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型涉及一种基于AAQFN可用于单芯片封装的封装件，属于集成电路封装技术领域，封装件包括引线框架、粘片胶、芯片、键合线、塑封体、蚀刻凹槽；引线框架经过刷磨、刷绿漆处理，引线框架上固定粘片胶，粘片胶上固定芯片，芯片与引线框架通过粘片胶相连，键合线直接从芯片打到引线框架上，芯片上的焊点与内引脚间的焊线是键合线，塑封体包围了引线框架、粘片胶、芯片、键合线构成电路，芯片、键合线、引线框架构成电路的电源和信号通道。本实用新型使集成电路框架与塑封体结合更加牢固，不受外界环境影响，直接提高产品的封装可靠性，同时降低了成本。

Description

一种基于AAQFN可用于单芯片封装的封装件
技术领域
本实用新型涉及一种扁平封装件，尤其是一种基于AAQFN可用于单芯片封装的封装件，属于集成电路封装技术领域。
背景技术
集成电路是信息产业和高新技术的核心，是经济发展的基础。集成电路封装是集成电路产业的主要组成部分，它的发展一直伴随着其功能和器件数的增加而迈进。自20世纪90年代起，它进入了多引脚数、窄间距、小型薄型化的发展轨道。无载体栅格阵列封装(即AAQFN)是为适应电子产品快速发展而诞生的一种新的封装形式，是电子整机实现微小型化、轻量化、网络化必不可少的产品。
无载体栅格阵列封装元件，底部没有焊球，焊接时引脚直接与PCB板连接，与PCB的电气和机械连接是通过在PCB焊盘上印刷焊膏，配合SMT回流焊工艺形成的焊点来实现的。该技术封装可以在同样尺寸条件下实现多引脚、高密度、小型薄型化封装，具有散热性、电性能以及共面性好等特点。
AAQFN封装产品适用于大规模、超大规模集成电路的封装。AAQFN封装的器件大多数用于手机、网络及通信设备、数码相机、微机、笔记本电脑和各类平板显示器等高档消费品市场。掌握其核心技术，具备批量生产能力，将大大缩小国内集成电路产业与国际先进水平的差距，该产品有着广阔市场应用前景。
但是由于技术难度等限制，目前AAQFN产品在市场上的推广有一定难度，尤其是在可靠性方面，直接影响产品的使用及寿命，已成为AAQFN封装件的技术攻关难点。
实用新型内容
为了克服上述现有技术存在的问题，本实用新型提供一种基于AAQFN可用于单芯片封装的封装件，使集成电路框架与塑封体结合更加牢固，不受外界环境影响，直接提高产品的封装可靠性，同时降低了成本。
为了实现上述目的，本实用新型采用得技术方案是：封装件包括引线框架1、粘片胶2、芯片3、键合线4、塑封体5、蚀刻凹槽6；引线框架1经过刷磨、刷绿漆处理，引线框架1背后有蚀刻凹槽6，引线框架1上固定粘片胶2，粘片胶2上固定芯片3，芯片3与引线框架1通过粘片胶2相连，键合线4直接从芯片3打到引线框架1上，芯片3上的焊点与内引脚间的焊线是键合线4，塑封体5包围了引线框架1、粘片胶2、芯片3、键合线4构成电路，芯片3、键合线4、引线框架1构成电路的电源和信号通道。
所述的键合线4为金线或者铜线；所述的粘片胶2可以用胶膜片(DAF)替换。
本实用新型的有益效果：框架上有凹槽结构，在框架与一次塑封料、绿漆之间形成有效的防拖拉结构，解决了传统冲压框架在塑封工序塑封料填充后，由于框架本身平整光滑，塑封料与框架之间的结合度低，极易出现分层的情况，大大降低封装件分层情况的发生几率，极大提高产品可靠性，优于传统AQQFN产品的塑封效果；同时工艺简单，方便操作，成本低。
附图说明
图1为本实用新型的结构示意图；
图中：1-引线框架、2-粘片胶、3-芯片、4-键合线、5-塑封体、6-蚀刻凹槽。
具体实施方式
下面结合附图和实施例对本实用新型做进一步说明，以方便技术人员理解。
如图1所示：封装件包括引线框架1、粘片胶2、芯片3、键合线4、塑封体5、蚀刻凹槽6；引线框架1经过刷磨、刷绿漆处理，引线框架1背后有蚀刻凹槽6，引线框架1上固定粘片胶2，粘片胶2上固定芯片3，芯片3与引线框架1通过粘片胶2相连，键合线4直接从芯片3打到引线框架1上，芯片3上的焊点与内引脚间的焊线是键合线4，塑封体5包围了引线框架1、粘片胶2、芯片3、键合线4构成电路，芯片3、键合线4、引线框架1构成电路的电源和信号通道。
传统冲压框架在塑封工序塑封料填充后，由于框架本身平整光滑，塑封料与框架之间的结合度低，极易出现分层的情况，封装件可靠性得不到保证。本实用新型采用的不同于以往的塑封工艺，在框架上用腐蚀的方法形成凹槽后，采用先刷磨，后刷绿漆的方法，在框架与一次塑封料、绿漆之间形成有效的防拖拉结构，大大降低封装件分层情况的发生几率，极大提高产品可靠性，优于传统AQQFN产品的塑封效果。

Claims (3)

1.一种基于AAQFN可用于单芯片封装的封装件，其特征在于：封装件包括引线框架、粘片胶、芯片、键合线、塑封体、蚀刻凹槽；引线框架经过刷磨、刷绿漆处理，引线框架背后有蚀刻凹槽，引线框架上固定粘片胶，粘片胶上固定芯片，芯片与引线框架通过粘片胶相连，键合线直接从芯片打到引线框架上，芯片上的焊点与内引脚间的焊线是键合线，塑封体包围了引线框架、粘片胶、芯片、键合线构成电路，芯片、键合线、引线框架构成电路的电源和信号通道。
2.根据权利要求1所述的一种基于AAQFN可用于单芯片封装的封装件，其特征在于：所述的键合线为金线或者铜线。
3.根据权利要求1所述的一种基于AAQFN可用于单芯片封装的封装件，其特征在于：所述的粘片胶用胶膜片(DAF)替换。
CN2012202758551U 2012-06-13 2012-06-13 一种基于aaqfn可用于单芯片封装的封装件 Expired - Lifetime CN202772130U (zh)

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Granted publication date: 20130306