CN201192347Y - Ultrasonic diagnostic apparatus preamplifier - Google Patents
Ultrasonic diagnostic apparatus preamplifier Download PDFInfo
- Publication number
- CN201192347Y CN201192347Y CNU2008200937654U CN200820093765U CN201192347Y CN 201192347 Y CN201192347 Y CN 201192347Y CN U2008200937654 U CNU2008200937654 U CN U2008200937654U CN 200820093765 U CN200820093765 U CN 200820093765U CN 201192347 Y CN201192347 Y CN 201192347Y
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- preamplifier
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Abstract
The utility model discloses a preamplifier of a diasonograph, which comprises a fieldistor and an audion which are connected sequentially. A negative feedback loop is connected with an input terminal and an output terminal of the audion; the audion is set to be a PNP audion; the fieldistor is set to be a dual-gate fieldistor. The preamplifier adopts the dual-gate fieldistor to realize the control of the magnification times, and is very suitable for a receiving front-end of the diasonograph to realize the primary amplification; a transistor can be matched with the back-end load at any time; at the same time, the preamplifier can realize the frequency compensation and enlarge the bandwidth range.
Description
Technical field
This utility model relates to diasonograph, is specifically related to a kind of diasonograph preamplifier.
Background technology
As shown in Figure 1, nearly all usually ultrasonic diagnostic equipment all has the one-level preamplifier, and is too weak before arriving controllable gain to amplify IC and flooded by noise with the echo-signal that prevents to receive.Now also there is the type of a lot of producers not adopt the pre-amplifying circuit of front end, if adopt a kind of like this scheme that front end is put in advance that do not add, not only the figure place to back ADC sampling A will have requirements at the higher level, and components and parts layout and cabling on the plank of the circuit of front end had a significant impact, the method of doing like this has certain risk, capacity of resisting disturbance also a little can a little less than a bit.
The utility model content
The technical problems to be solved in the utility model provides a kind of diasonograph preamplifier, to strengthen the capacity of resisting disturbance of diasonograph.
This utility model is to solve the problems of the technologies described above the technical scheme that is adopted to be:
A kind of diasonograph preamplifier comprises the field effect transistor and the audion that link to each other successively, and the input and the outfan of audion are connected to negative feedback loop.
Described diasonograph preamplifier, wherein said audion is made as the PNP audion.
Described diasonograph preamplifier, wherein said field effect transistor is made as dual gate FET.
Described diasonograph preamplifier, wherein also comprise first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, first electric capacity, second electric capacity, the 3rd electric capacity, the 4th electric capacity, inductance, first diode, second diode, one end of first resistance is connected with an end of second resistance and first electric capacity, its other end links to each other with the drain electrode of dual gate FET, the other end ground connection of second resistance and first electric capacity, one end of the 3rd resistance is connected with the first grid of dual gate FET, the other end adds gain-controlled voltage, one end of the 4th resistance is connected with an end of second electric capacity and the second grid of dual gate FET, the other end of second electric capacity is connected with an end of the 7th resistance, the other end ground connection of the 7th resistance, the 5th resistance is in parallel with inductance, one end of the 5th resistance and the negative pole of first diode, the positive pole connection of second diode also is added with bias voltage, the positive pole of its other end and first diode, the negative pole of second diode, one end of the 3rd electric capacity and the source electrode of dual gate FET connect, the other end of the 3rd electric capacity and the 9th resistance, one end of the 6th resistance and the 8th resistance connects, the 9th resistance other end ground connection, the 6th resistance other end is added with bias voltage, the 8th resistance other end is connected with the base stage of PNP audion, one end of the 11 resistance is added with bias voltage, its other end is connected with an end of the tenth resistance and the 4th electric capacity, the 4th electric capacity other end ground connection, the tenth resistance other end is connected with the PNP transistor emitter, and the PNP transistor collector connects load.
The beneficial effects of the utility model are: this utility model preamplifier adopts the smooth field effect transistor of double grid to realize the control of amplification, the receiving front-end that is well suited for diasonograph is realized first order amplification, transistor can be realized the coupling at any time with the rear end load, this utility model preamplifier can be realized the compensation of frequency simultaneously, enlarges bandwidth range.
Description of drawings
This utility model comprises following accompanying drawing:
Fig. 1 is a prior art medical ultrasound diagnosis instrument module diagram;
Fig. 2 is this utility model diasonograph preamplifier module diagram;
Fig. 3 is this utility model diasonograph preamplifier circuit figure.
The specific embodiment
With embodiment this utility model is described in further detail with reference to the accompanying drawings below:
As shown in Figure 2, this utility model diasonograph preamplifier comprises field effect transistor and the audion that links to each other successively, and the input and the outfan of audion are connected to negative feedback loop.Audion is made as the PNP audion.Field effect transistor is made as dual gate FET.
As shown in Figure 3, this utility model diasonograph preamplifier also comprises first resistance R 37, second resistance R 38, the 3rd resistance R 39, the 4th resistance R 40, the 5th resistance R 41, the 6th resistance R 42, the 7th resistance R 43, the 8th resistance R 44, the 9th resistance R 45, the tenth resistance R 46, the 11 resistance R 47, first capacitor C 24, second capacitor C 27, the 3rd capacitor C 29, the 4th capacitor C 30, inductance L 5, the first diode D9, the second diode D10, one end of first resistance R 37 is connected with the end of second resistance R 38 with first capacitor C 24, its other end links to each other with the drain electrode of dual gate FET BF998WR, the other end ground connection of second resistance R 38 and first capacitor C 24, one end of the 3rd resistance R 39 is connected with the first grid of dual gate FET BF998WR, the other end adds gain-controlled voltage, one end of the 4th resistance R 40 is connected with an end of second capacitor C 27 and the second grid of dual gate FET BF998WR, the other end of second capacitor C 27 is connected with an end of the 7th resistance R 43, the other end ground connection of the 7th resistance R 43, the 5th resistance R 41 is in parallel with inductance L 5, one end of the 5th resistance R 41 and the negative pole of the first diode D9, the positive pole connection of the second diode D10 also is added with bias voltage, the positive pole of its other end and the first diode D9, the negative pole of the second diode D10, one end of the 3rd capacitor C 29 and the source electrode of dual gate FET BF998WR connect, the other end of the 3rd capacitor C 29 and the 9th resistance R 45, one end of the 6th resistance R 42 and the 8th resistance R 44 connects, the 9th resistance R 45 other end ground connection, the 6th resistance R 42 other ends are added with bias voltage, the base stage of the 8th resistance R 44 another termination PNP audions, one end of the 11 resistance R 47 is added with bias voltage, its other end is connected with the end of the tenth resistance R 46 with the 4th capacitor C 30, the 4th capacitor C 30 other end ground connection, the tenth resistance R 46 other ends are connected with the PNP transistor emitter, and the PNP transistor collector connects load.
In foregoing circuit, STC is a control voltage that is added on the dual gate FET, and this voltage is used for controlling the amplification of dual gate FET, just the first order TGC in the diasonograph.The transistance point of back have following some: 1. signal inversion, 2. signal amplifies, by transferring feedback resistance R47 and load, can make the depth of feedback increasing and reduce, this need be in physical circuit be used, thereby regulate resistance R 47 according to actual loading size in the circuit, 3. capacitor C 30 can be used as frequency compensation herein and come usefulness, can realize the adjusting of bandwidth by regulating it.
Those skilled in the art do not break away from essence of the present utility model and spirit, can there be the various deformation scheme to realize this utility model, the above only is the preferable feasible embodiment of this utility model, be not so limit to interest field of the present utility model, the equivalent structure that all utilization this utility model description and accompanying drawing content are done changes, and all is contained within the interest field of the present utility model.
Claims (4)
1. diasonograph preamplifier is characterized in that: comprise the field effect transistor and the audion that link to each other successively, the input and the outfan of audion are connected to negative feedback loop.
2. diasonograph preamplifier according to claim 1 is characterized in that: described audion is made as the PNP audion.
3. diasonograph preamplifier according to claim 2 is characterized in that: described field effect transistor is made as dual gate FET.
4. diasonograph preamplifier according to claim 3, it is characterized in that: also comprise first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, first electric capacity, second electric capacity, the 3rd electric capacity, the 4th electric capacity, inductance, first diode, second diode, one end of first resistance is connected with an end of second resistance and first electric capacity, its other end links to each other with the drain electrode of dual gate FET, the other end ground connection of second resistance and first electric capacity, one end of the 3rd resistance is connected with the first grid of dual gate FET, the other end adds gain-controlled voltage, one end of the 4th resistance is connected with an end of second electric capacity and the second grid of dual gate FET, the other end of second electric capacity is connected with an end of the 7th resistance, the other end ground connection of the 7th resistance, the 5th resistance is in parallel with inductance, one end of the 5th resistance and the negative pole of first diode, the positive pole connection of second diode also is added with bias voltage, the positive pole of its other end and first diode, the negative pole of second diode, one end of the 3rd electric capacity and the source electrode of dual gate FET connect, the other end of the 3rd electric capacity and the 9th resistance, one end of the 6th resistance and the 8th resistance connects, the 9th resistance other end ground connection, the 6th resistance other end is added with bias voltage, the 8th resistance other end is connected with the base stage of PNP audion, one end of the 11 resistance is added with bias voltage, its other end is connected with an end of the tenth resistance and the 4th electric capacity, the 4th electric capacity other end ground connection, the tenth resistance other end is connected with the PNP transistor emitter, and the PNP transistor collector connects load.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CNU2008200937654U CN201192347Y (en) | 2008-04-30 | 2008-04-30 | Ultrasonic diagnostic apparatus preamplifier |
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CNU2008200937654U CN201192347Y (en) | 2008-04-30 | 2008-04-30 | Ultrasonic diagnostic apparatus preamplifier |
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CNU2008200937654U Expired - Fee Related CN201192347Y (en) | 2008-04-30 | 2008-04-30 | Ultrasonic diagnostic apparatus preamplifier |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102596429A (en) * | 2009-11-06 | 2012-07-18 | 佳能株式会社 | Ultrasonic detection device and ultrasonic diagnostic device |
CN107769743A (en) * | 2017-11-23 | 2018-03-06 | 日照朝力信息科技有限公司 | A kind of ultrasonic imaging echo gain compensation circuit |
CN109708741A (en) * | 2018-12-04 | 2019-05-03 | 中船重工海声科技有限公司 | A kind of hydrophone pre-amplification circuit suitable for extensive basic matrix signal system |
CN109938771A (en) * | 2019-03-30 | 2019-06-28 | 河南省省立医院有限公司 | Three-dimensional basin baselap acoustic image processing control system |
-
2008
- 2008-04-30 CN CNU2008200937654U patent/CN201192347Y/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102596429A (en) * | 2009-11-06 | 2012-07-18 | 佳能株式会社 | Ultrasonic detection device and ultrasonic diagnostic device |
CN102596429B (en) * | 2009-11-06 | 2014-09-03 | 佳能株式会社 | Ultrasonic detection device and ultrasonic diagnostic device |
US9314820B2 (en) | 2009-11-06 | 2016-04-19 | Canon Kabushiki Kaisha | Ultrasonic detection device and ultrasonic diagnostic device |
US10464102B2 (en) | 2009-11-06 | 2019-11-05 | Canon Kabushiki Kaisha | Ultrasonic detection device and ultrasonic diagnostic device |
CN107769743A (en) * | 2017-11-23 | 2018-03-06 | 日照朝力信息科技有限公司 | A kind of ultrasonic imaging echo gain compensation circuit |
CN109708741A (en) * | 2018-12-04 | 2019-05-03 | 中船重工海声科技有限公司 | A kind of hydrophone pre-amplification circuit suitable for extensive basic matrix signal system |
CN109938771A (en) * | 2019-03-30 | 2019-06-28 | 河南省省立医院有限公司 | Three-dimensional basin baselap acoustic image processing control system |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090211 Termination date: 20150430 |
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