CN1983555B

CN1983555B - Method of making semiconductor element

Info

Publication number: CN1983555B
Application number: CN2006101622604A
Authority: CN
Inventors: 池本由平; 平田宏治; 青木和夫; 金子由基夫; 氏家建和
Original assignee: Toyoda Gosei Co Ltd
Current assignee: Toyoda Gosei Co Ltd
Priority date: 2005-12-14
Filing date: 2006-12-13
Publication date: 2010-05-19
Anticipated expiration: 2026-12-13
Also published as: JP2007165625A; JP4680762B2; CN1983555A

Abstract

A method of making a semiconductor element which has a substrate formed of gallium oxide and a semiconductor layer formed on the substrate. The method has: a first dividing step that the substrate with the semiconductor layer formed thereon is divided into a strip bar along a first cleaved surface of the substrate; and a second dividing step that the strip bar is divided in a direction perpendicular to the first cleaved surface.

Description

The manufacture method of semiconductor element

The application is based on Japanese patent application No.2005-360441,2006-055332 and 2006-187478, and the full content of above-mentioned application is incorporated this paper by reference into.

Technical field

The present invention relates to make the method for semiconductor element, be specifically related to manufacturing and comprise gallium oxide (Ga ₂O ₃) substrate and the semiconductor element (chip) that forms semiconductor layer thereon.The invention still further relates to the semiconductor element that utilizes this method to make.

Background technology

III group-III nitride based compound semiconductor is used to make short-wave long light-emitting element (or LED element).This light-emitting component uses transparent sapphire substrate.Yet because Sapphire Substrate is non-conductive, so light-emitting component need have the horizontal electrode structure, and this carries out etching and processing after just requiring to form semiconductor layer on substrate.

Therefore, wish to obtain to be fit to grow the conduction of III group-III nitride based compound semiconductor and transparent substrate thereon.

In order to satisfy this requirement, gallium oxide (Ga has been proposed ₂O ₃) substrate (for example, JP-A-2005-217437 and JP-A-2004-56098).Gallium oxide is monoclinic crystal structure and has conductivity.Especially, because the lattice match of gallium oxide and III group-III nitride based compound semiconductor is that sapphire is better than triangle, therefore can on the substrate that forms by the bulk-shaped monocrystal gallium oxide, form the III group-III nitride based compound semiconductor of high crystalline quality.

On the other hand, wafer division normally by use draw the machine at quarter draw that process causes quarter.Another kind of known wafer fission process be have formation thereon n-type layer and the monocrystal SiC wafer of p-type layer utilize cleavage character to be separated into crystal block (or crystal grain) (for example JP-A-2002-255692).

And, known wafer fission process be oxide monocrystal for example niobium lithium single-crystal wafer utilize cleavage character and be separated into crystal block (or sheet) (for example JP-A-10-305420 and JP-A-11-224865) by the thermal stress that the short-pulse laser radiation produces.

The inventor has studied the wafer fission process of the semiconductor element that is formed by gallium oxide, and finds following problem.

Gallium oxide is β-Ga especially ₂O ₃Have the rational matter of strong solution, and its (100) crystal face has cleavage fissure with (001) crystal face.Thereby when wafer is divided into crystal block, thereby substrate may be peeled off defective chip.In other words, even can on substrate, form high-quality III group-III nitride based compound semiconductor, also be difficult to make wafer split into crystal block.

Like this because the gallium oxide substrate there were significant differences along with crystal plane direction on cleavage fissure, be difficult to come high productivity to cut apart wafer by drawing a carving method.Specifically, β-Ga ₂O ₃Also on the direction parallel, has cleavage fissure with the substrate surface that forms semiconductor layer.Therefore, when passing through to draw the carving method cut crystal, be easy near cut surface, produce and peel off and crackle.

The above-mentioned wafer splitting method that is disclosed among JP-A-2002-255692, JP-A-10-305420 and the JP-A-11-224865 is to utilize cleavage fissure that wafer is divided into crystal block on the wafer all surface.So these methods are not suitable for using the fission process of the semiconductor wafer of gallium oxide substrate because the gallium oxide substrate on cleavage strength with the different significant differences that exist of crystal plane direction.

Summary of the invention

Purpose according to embodiment of the present invention provides a kind of method of making semiconductor element, and this method can comprise gallium oxide (Ga with high yield production ₂O ₃) substrate and form the semiconductor element (for example chip) of semiconductor layer thereon, and near working position, do not cause and peel off and crackle.

(1) according to one embodiment of the invention, a kind of manufacturing comprises the substrate that is formed by gallium oxide and is formed on the method for the semiconductor element of the semiconductor layer on the substrate, comprising:

First segmentation procedure is divided into crystal bar (strip bar) with the substrate that forms semiconductor layer thereon along first cleavage surface of substrate; With

Second segmentation procedure is cut apart crystal bar on the direction perpendicular to first cleavage surface.

According to the method (1) of above embodiment, initiatively utilize the cleavage character of first cleavage surface to cut apart substrate, obtain crystal bar.Therefore, cleavage character is not the obstruction of cutting apart substrate.

Then, when crystal bar is divided into crystal block, if resemble existing and form face (or opposite face) cutting crystal bar perpendicular to semiconductor layer drawing in the carving method, then go up stress application in the second cleavage surface direction (perpendicular to first cleavage surface and be parallel to semiconductor layer form face).Like this, substrate may be peeled off or semiconductor layer may stand excessive stresses.On the contrary, in the method (1) of above embodiment,, therefore can significantly reduce the stress on the second cleavage surface direction perpendicular to first cleavage surface cutting crystal bar.Like this, can prevent substrate desquamation and can reduce the stress that is applied on the semiconductor layer.Therefore, can carry out element divisions smoothly, and can high productive capacity and high yield manufacturing element.

In the method (1) of above embodiment, preferred second segmentation procedure comprises markers step.The mark that provides by markers step limits the cut-off rule of crystal bar and with the reference of do to cut-off rule.For example, cut-off rule is formed on the side that semiconductor layer forms the crystal bar surface, utilizes cut-off rule to cut crystal bar as guiding perpendicular to first cleavage surface then.

Cut-off rule (=mark) can be provided as by the formed shallow trench of mentioning after a while in the present embodiment of draw carving, and perhaps is provided as Plotted line, if can discern from the side (=the first cleavage surface) of crystal bar.And Plotted line can be formed on the side of crystal bar.In addition, because chip size is scheduled to, so, just can carry out chip cutting continuously at the interval of chip size and reference point by certain reference point is provided.Reference point can provide by drawing to carve or draw.Moreover, can carry out mark by laser or dry ecthing.Mark can also be formed on the back side that semiconductor layer forms face.

Second segmentation procedure comprises drawing carves step.In drawing the step at quarter, crystal bar is drawn quarter (carving step for first stroke) perpendicular to first cleavage surface.Like this crystal bar is drawn and carved to distance one side (=the first cleavage surface) desired depth, anti-turnback, (second cleavage surface) drawn and carved again from the another side, thereby finishes cutting apart of crystal bar.At this, be formed on mark on the crystal bar surface (=semiconductor layer form face) and can allow convenience and accurate localization first and second cleavage surfaces.From side surface direction is drawn quarter to crystal bar, can reduce stress by like this for substrate or semiconductor layer.

In the method (1) of above embodiment,, the gallium oxide substrate is made wafer, and in the gallium oxide crystal, have beta structure by to via for example brilliant section of piece that obtains of EFG and FZ of known method.For β-Ga ₂O ₃, select substrate surface to have (100), (010), (001) or (801) crystal face.β-Ga no matter ₂O ₃Crystal plane direction how, it all is a conduction and transparent.

Can the high-quality III group-III nitride of epitaxial growth based compound semiconductor on the gallium oxide substrate.III group-III nitride based compound semiconductor is by representing as the following general formula of the plain system of quaternary: Al _xGa _yIn _1-x-yN (0≤x≤1,0≤y≤1,0≤x+y≤1), and comprise for example GaN and InN and element system Al for example of two element systems _xGa _1-xN, Al _xIn _1-xN and Ga _xIn _1-xN (being 0＜x＜1).Part III family element can be by boron (B), thallium replacements such as (Ta), and part nitrogen (N) can be by phosphorus (P), arsenic (As), antimony (Sb), bismuth replacements such as (Bi).

Semiconductor layer outside the III nitride base compound semiconductor layer also can be grown on the gallium oxide substrate.

According to another embodiment of the present invention, a kind of semiconductor element comprises:

Form and have the substrate of predetermined crystal plane direction by gallium oxide; With

Be formed on the semiconductor layer on the substrate,

Wherein semiconductor element is a chip form, also comprises first end face that forms along the cleavage surface of substrate and second end face that forms perpendicular to first end face, and

First end face has the cleavage fissure stronger than second end face.

In above embodiment (2), can take following improvement and variation.

(i) substrate is by β-Ga ₂O ₃Form.

(ii) second end face forms by drawing to carve.

(iii) second end face forms by the laser processing that irradiation has the laser of predetermined wavelength.

(iv) predetermined crystal plane direction comprises one of (100), (001), (010) and (801) crystal plane direction.

(3) according to another embodiment of the present invention, a kind of method of making semiconductor element may further comprise the steps:

Form semiconductor layer having on the gallium oxide substrate of predetermined crystal plane direction;

The gallium oxide substrate is rived into crystal bar along its cleavage surface; With

Utilize the process except that rive (cleaving), along direction cutting crystal bar perpendicular to cleavage surface.

In above embodiment (3), can take following improvement and variation.

(v) described process comprises the process at quarter of drawing.

(vi) described process comprises that irradiation has the laser processing of the laser of predetermined wavelength.

(vii) predetermined wavelength comprises the wavelength that is lower than 400nm.

(viii) predetermined wavelength comprises the wavelength that laser by comprising the YAG triple-frequency harmonics or excimer laser obtain.

(ix) predetermined crystal plane direction comprise (100), (001), (010) and (801) crystal plane direction one of at least.

(4) according to another embodiment of the present invention, a kind of method of making semiconductor element may further comprise the steps:

Element forms step, by gallium oxide (Ga ₂O ₃) form first conductive-type semiconductor layer and second conductive-type semiconductor layer on the substrate that forms; With

Draw to carve step, implement the substrate that process will have first and second conductive-type semiconductor layers at a plurality of strokes of quarters and be divided into semiconductor element by each stroke being carved part.

(5) according to another embodiment of the present invention, a kind of method of making semiconductor element may further comprise the steps:

Element forms step, by gallium oxide (Ga ₂O ₃) form first conductive-type semiconductor layer and second conductive-type semiconductor layer on the substrate that forms;

Carve step, substrate is drawn quarter for first stroke along first direction; With

Carve step for second stroke, be divided into semiconductor element thereby substrate is drawn the substrate that will have first and second conductive-type semiconductor layers quarter along the second direction opposite with first direction.

(6) according to another embodiment of the present invention, a kind of method of making semiconductor element may further comprise the steps:

Carve step for first stroke, carve width along first direction with first stroke substrate is drawn quarter; With

Carve step for second stroke, substrate is drawn carved the substrate that will have first and second conductive-type semiconductor layers and be divided into semiconductor element thereby carve width with second stroke along first direction.

In above embodiment (5) or (6), can take following improvement and variation.

(x) carry out first and second strokes with an identical stroke width at quarter (for example 20 μ m) and carve step.

(xi) first stroke of width at quarter (for example 50 μ m) carved width (for example 20 μ m) greater than second stroke.

Term definition

Herein, " draw carve (dicing) " thus be meant and form the process that the cutting groove that is similar to lattice in the wafer is divided into wafer crystal block (or chip)." scraping blade (scribing) " be meant by diamond custting machine etc. and form scratch (kerf) on wafer surface, thereby utilize the cleavage surface of wafer wafer to be divided into the process of crystal block (or chip) simultaneously." sliver (breaking) " thus be meant along being formed on cutting groove on the wafer or the scratch wafer that fractures and wafer be divided into the process of crystal block (or crystal grain).

Description of drawings

Below with reference to description of drawings according to the preferred embodiments of the invention, wherein:

Fig. 1 is the β-Ga that has in expression the present invention first and the 3rd preferred embodiment ₂O ₃The sectional view of the semiconductor element (as wafer or chip) of substrate and formation semiconductor layer thereon;

Fig. 2 A and 2B are the schematic diagrames of first segmentation procedure in expression first embodiment;

Fig. 3 is the perspective illustration of second segmentation procedure (being markers step) in expression first embodiment;

Fig. 4 is the perspective illustration of another second segmentation procedure (promptly carving step for first stroke) in expression first embodiment;

Fig. 5 is the perspective illustration of another second segmentation procedure (promptly carving step for second stroke) in expression first embodiment;

Fig. 6 is the perspective view of the gallium oxide substrate that forms light-emitting component thereon in expression the present invention second preferred embodiment;

Fig. 7 is the diagram of expression MOCVD method;

Fig. 8 is the sectional view of expression LED element;

Fig. 9 is that expression is rived along predetermined cleavage district and had the β-Ga of formation semiconductor layer thereon ₂O ₃Substrate is to obtain having β-Ga ₂O ₃The perspective view of the process of the crystal bar of substrate;

Figure 10 represents that the crystal bar that utilizes diamond tool to make by riving is divided into the perspective view of the process of chip;

Figure 11 illustrates that the crystal bar that utilizes laser processing to replace diamond tool to make by riving is divided into the perspective view of the process of chip;

Figure 12 A-12E is the sectional view of the manufacture method of the semiconductor element (LED element) in expression the present invention the 3rd preferred embodiment;

Figure 13 A-13C is that explanation utilizes a stroke icking tool will have Ga ₂O ₃The crystal bar of substrate (or crystal bar) is divided into the sectional view of chip;

Figure 14 A-14C is the sectional view of the manufacture method of the semiconductor element (LED element) in expression the present invention the 4th preferred embodiment; With

Figure 15 is the improved crystal face figure of expression the 3rd or the 4th embodiment.

Embodiment

First embodiment

Semiconductor device manufacturing method in first embodiment below will be described.

The formation of semiconductor layer

With β-Ga ₂O ₃Wafer is placed in the MOCVD equipment and at first nitrogenize is carried out on its surface.Nitriding method is not done concrete restriction, for example can heat β-Ga in ammonia atmosphere ₂O ₃Wafer.Then, on its (100) crystal face, form III group-III nitride based compound semiconductor by common method.

In this embodiment, semiconductor element has the following layer structure of mentioning, thereby constitutes light-emitting component (or LED element) (see figure 1).Fig. 1 illustrates this layer structure and does not have accurately to show the thickness of its each layer.

Layer: form

P-contact layer 16:p ⁺-GaN

P-coating 15:p-AlGaN

MQW luminescent layer 14:InGaN/GaN

N-coating 13:n-AlGaN

N-contact layer 12:n ⁺-GaN

Resilient coating 11:Al _xGa _1-xN (0.5≤x≤1)

Substrate: 10 β-Ga ₂O ₃

As previously mentioned, under 600-1100 ℃, in ammonia atmosphere, heat β-Ga ₂O ₃Substrate a few minutes.Nitrided surface thus.

Resilient coating utilizes hydrogen to form as carrier gas and under about 350-550 ℃ lower temperature by mocvd method.Al _xGa _1-xWhat the N resilient coating was wished is that Al is more than needed.

Though n-type layer is formed by GaN in the present embodiment, it can for example AlGaN, InGaN and AlInGaN form by other III group-III nitride based compound semiconductors.The n-type dopant that is doped in the n-type layer can be Si, Ge, Se, Te, C etc.

P-type layer also can be formed by above-mentioned III group-III nitride based compound semiconductor.The p-type dopant that is doped in the p-type layer can be Mg, Zn, Be, Ca, Sr, Ba etc.

Though III group-III nitride based compound semiconductor prepares by mocvd method in the present embodiment, it also can pass through preparations such as MBE (molecular beam epitaxy), HVPE (halide vapour phase epitaxy), sputter, ion injection, electronic shower.

On the p-contact layer, form the current-diffusion layer 17 of ITO (tin indium oxide), on current-diffusion layer 17, form the p-lateral electrode 18 of gold.At β-Ga ₂O ₃The back side of substrate 10 (with the surperficial facing surfaces that forms semiconductor layer thereon) is gone up and is formed n-lateral electrode 19.Because β-Ga ₂O ₃Substrate 10 conducts electricity, thus p-lateral electrode 18 can vertically form with n-lateral electrode 19, thereby can simplify the manufacture process of LED element.

First segmentation procedure

β-the Ga that will have semiconductor layer ₂O ₃Wafer is cut apart (or separation) along its (001) crystal face and is become similar bar, thereby obtains crystal bar 10A.One of crystal bar 10A has the width that equals element (or chip) width.In other words, just constituted crystal bar 10A with a continuous Connection Element of size (or chip).When mark crystal bar 10A, form the kerf 60 that arrives substrate from wafer surface (being that semiconductor layer forms the surface).Kerf 60 forms along first cleavage surface of substrate.Then, wafer is divided into bar shaped crystal bar 10A along kerf 60 slivers.

Because first segmentation procedure is to carry out along first cleavage surface of substrate, so it is very little to be applied to the stress of substrate.Therefore, can prevent damage to substrate and semiconductor layer.

Second segmentation procedure (markers step)

At first, as shown in Figure 3, on the face side of individual crystal bar 10A, utilize and draw icking tool 30 formation shallow trenchs 33.Groove 33 is marks, and the location of drawing the process at quarter of carrying out subsequently with opposing is instructed.The degree of depth of groove 33 is not done concrete restriction, as long as its degree of depth does not for example apply any stress to substrate.For example, the depth d 1 of groove 33 is preferably 0≤d1≤0.5t1, and wherein t1 is the thickness of substrate 10.

Groove 33 is formed on the edge that cutting part is a chip, along groove 33 crystal bar 10A is cut into chip.

In Fig. 3, indicate first cutting planes (i.e. first cleavage surface) with Reference numeral m1.

Second segmentation procedure (carving step for first stroke)

The crystal bar 10A that will have shallow trench 33 marks that form thereon revolves and turn 90 degrees, thereby makes the first cutting planes m1 (Fig. 4) up.On the first cutting planes m1 side, draw quarter.Carve treating in the step for first stroke and draw zone Reference numeral 40 indications at quarter.Draw when carving, groove 33 is as guiding.Like this, can accurately and easily draw location in quarter.If do not form groove 33,, thereby be difficult to accurately determine the split position of chip then because first release surface is smooth.

Be preferably 0.2t2≤d2≤0.8t2 first stroke of depth d 2 of carving formed groove on the step, wherein t2 is the width of crystal bar 10A shown in Figure 4.

Second segmentation procedure (carving step for second stroke)

Then, as shown in Figure 5,, make the first cutting planes m1 down with crystal bar 10A Rotate 180 degree.Then, on the opposite side plane of crystal bar 10A m2 (this plane m2 is corresponding to first cutting planes), draw quarter.At this, groove 33 is carved so that accurately draw as guiding.Carve treating in the step for second stroke and draw zone Reference numeral 50 indications at quarter.Be preferably 0.2t2≤d3≤0.8t2 second stroke of depth d 3 of carving formed groove on the step, wherein t2 is the width of crystal bar 10A shown in Figure 4.

So just finished a stroke quarter.Then, by sliver crystal bar 10A is cut apart (separation) and become chip.

Then, the chip of making thus directly or by base station can be installed on the wire substrate according to purposes.

Second embodiment

The gallium oxide substrate

Fig. 6 illustrates the gallium oxide substrate that forms light-emitting component (LED element) thereon.

β-Ga as the gallium oxide substrate ₂O ₃Substrate 10 is to be processed into the substrate with predetermined crystal plane direction, for β-Ga ₂O ₃Substrate 10, substrate surface are set at (100), (010), (001) crystal face or (801) crystal face.As mentioned above, when substrate surface is set at (100), (010), (001) crystal face or (801) crystal face, can also on (001) crystal face, discern cleavage character.

When at β-Ga ₂O ₃When forming light-emitting component on the substrate 10, substrate surface is set at (100) crystal face or (801) crystal face, to help the formation of wafer process and light-emitting component.At this, utilize cleavage fissure to make wafer split and utilize and draw to carve wait, the feasible β-Ga that is formed on along the cutting of (010) crystal face along (001) crystal face ₂O ₃A large amount of light-emitting components on the substrate 10 are divided into bare chip.

Be preferably formed identification division 1a, for example recess, groove and orientation plane are with identification β-Ga ₂O ₃The crystal plane direction of substrate 10.

The formation of light-emitting component

Fig. 7 illustrates the MOCVD method.MOCVD equipment 100 comprises: the reactor 101 that connects the discharge portion 106 with vacuum pump and exhaust apparatus (all not shown); Settle β-Ga on it ₂O ₃The pedestal 102 of substrate 10; The heater 103 of heating base 102; The rotation of control pedestal 102 and the Control Shaft 104 of vertical moving; With β-Ga ₂O ₃Substrate 10 tilts or the quartz nozzle 105 of source of supply gas flatly; With the gas generator that produces each provenance gas, for example TMG (trimethyl gallium) gas generator 111, TMA (trimethyl aluminium) gas generator 112 and TMI (trimethyl indium) gas generator 113.As required, can increase or reduce the quantity of gas generator.NH ₃As nitrogenous source and H ₂As carrier gas.TMG and NH ₃Be used for GaN film grown, TMA, TMG and NH ₃The AlGaN film that is used for growing, TMI, TMG and NH ₃Be used for the growing InGaN film.

Film by MOCVD equipment 100 form carry out as follows, with β-Ga ₂O ₃Substrate 10 is installed on the pedestal 102, and wherein film forms the surface and be placed in the reative cell 101 up.

At this, with β-Ga ₂O ₃Substrate 10 is installed on the pedestal 102 that make can be by cleavage district 2 with draw that to carve rectangular areas that district 3 surrounds be that pre-position in the light-emitting component zone 4 forms the light-emitting component (see figure 6).

The structure of LED element

Fig. 8 illustrates the structure of LED element 1.

LED element 1 comprises: order is formed on the β-Ga with n-type conductivity ₂O ₃Si doped n on the substrate 10 ⁺-GaN layer 12; Si doped n-AlGaN layer 13; MQW (Multiple Quantum Well) 14 with the multi-quantum pit structure that forms by InGaN/GaN; Mg doped p-AlGaN layer 15, Mg doped p ⁺-GaN layer 16; The p-electrode 18 that forms by ITO (tin indium oxide); Be formed on β-Ga ₂O ₃The n-electrode 19 of substrate 10 belows.

n ⁺-GaN layer 12 and p ⁺-GaN layer 16 is respectively by under 1100 ℃ growth temperature, to placing β-Ga ₂O ₃Supply NH in the reactor of substrate 10 ₃With TMG and as the H of carrier ₂Grow.In addition, for n ⁺-GaN layer 12 is with single silane (SiH ₄) produce n-type conductivity as Si source (n-dopant).For p ⁺-GaN layer 16 is with bis-cyclopentadiene magnesium (Cp ₂Mg) produce p-type conductivity as Mg source (p-dopant).N-AlGaN layer 13 and p-AlGaN layer 15 are by supply TMA and NH in reactor ₃Form with TMG.

MQW 14 supplies TMI and TMG and NH by under 1100 ℃ growth temperature in reactor ₃, as the N of carrier gas ₂Grow.Particularly, supply TMI and TMG and NH ₃Form InGaN, and supply TMG and NH ₃Form GaN.

The manufacture process of LED element (wafer form)

At first, on the pedestal of MOCVD equipment, place β-Ga ₂O ₃Substrate 10.

Then, be warming up to predetermined temperature (400 ℃) and to wherein supplying N ₂Subsequently, the temperature in the reactor rises to 1100 ℃ and keep this temperature.At this moment, thus the supply 60sccm TMG form the thick n of 1 μ m ⁺-GaN layer 12.Then, stop to reactor supply N ₂And supply H ₂

Then, grow n-AlGaN layer 13, MQW 14, p-AlGaN layer 15, p of order ⁺-GaN layer 16, p-electrode 18 and n-electrode 19.Omit the explanation of its growth course.

Ga ₂ O ₃ Riving of substrate cut apart

Check and make good β-Ga with formation semiconductor layer thereon ₂O ₃The electrical characteristics of substrate 10 and defective utilize cleavage character to rive subsequently.

Fig. 9 is a perspective view of representing the process of riving, wherein has the β-Ga of formation semiconductor layer thereon ₂O ₃Substrate 10 is rived along predetermined cleavage district, thereby obtains having β-Ga ₂O ₃The bar shaped chip of substrate.β-Ga ₂O ₃Substrate 10 is fixed on the pre-position of fixed pedestal 120, discerns the cleavage direction by recognition site 1a simultaneously.The position of chopper (or splitting cutter) 121 is aimed at cleavage district 2, subsequently chopper 121 is depressed, cleavage district 2 is applied predetermined shearing force, wafer is rived along cleavage district 2.Repeat these steps, will have the β-Ga that forms semiconductor layer thereon ₂O ₃Substrate 10 is divided into bar shaped chip 5 (see figure 10)s.

Ga ₂ O ₃ Cut apart the quarter of drawing of substrate

Figure 10 is the perspective view that the process at quarter is drawn in expression, wherein is cut into chip by the bar shaped chip of making 5 of riving by diamond tool 130.In this process, diamond tool 130 is carved district's 3 cutting rod core sheets 5 along drawing, and rotates diamond tool 130 simultaneously.Cut direction or zone are set at little cleavage fissure or do not have the direction of cleavage.Like this, the bar shaped chip can be divided into chip 5 strokes of quarters, each chip constitutes light-emitting component, and does not cause any defective, for example chip.

(improvement) Ga ₂ O ₃ Cut apart the quarter of drawing of substrate

Figure 11 represents that the strip crystal block 5 that utilizes laser processing to replace stroke process at quarter (passing through diamond tool) to make by riving is divided into the perspective view of the process of chip.

YAG laser 140 as light source drives under specified criteria, emission of lasering beam 141.It vibrates by continuous Q switching and drives.Emitted laser bundle 141 converts the triple-frequency harmonics with 355nm wavelength to by wavelength shifter 142, be processed into directional light by collimator lens 143, on the speculum 144 reflection and control focus on bar shaped chip 5 the surface or by focus on the precalculated position on the Y direction from its surface at mobile collector lens 143 on the optical axis direction.

Carry out laser processing by process velocity and scanning times on the output of suitable adjusting laser, frequency of oscillation, directions X and the Y direction.For example, as shown in figure 11, mobile X-Y platform 146 on the Y direction, make laser beam 141 with predetermined scanning times irradiation bar shaped chip 5 surfaces, to form the processing groove 5a that divides and cut of being used to of given number, simultaneously for each groove 5a, laser beam 141 is mobile on directions X.

The triple-frequency harmonics of YAG laser has the 355nm wavelength, according to β-Ga ₂O ₃See through spectrum, it is about 30% by β-Ga ₂O ₃Absorb.As a result, not only contributes thermal processing is with heating and the handled part of fusion to be radiated at strip chip 5 lip-deep laser beams 141, and the contribution laser ablation is to cut at least a portion β-Ga ₂O ₃Intermolecular linkage, by gasification be broken into subparticle and make handled part be disperseed and remove.

Processing wavelength from the laser beam 141 of light source 140 is not limited to 355nm, and can be 400nm or following scope, and this scope causes optical absorption, makes the laser processing of above-mentioned substrate become possibility.

By applying given force, strip chip 5 can be divided into the chip with necessary shape along the groove 5a that processes.On the contrary, when processing groove 5a passes strip chip 5, strip chip 5 can be divided into the chip with necessary shape, and not need to apply given force.

As selection, for wafer 10 rather than strip chip 5, by laser beam 141 processing division or cut after the groove 5a of required given number on X or Y direction, can be subsequently on perpendicular to the Y of above-mentioned direction or directions X mobile X-Y platform 146, make laser beam 141 be radiated on wafer 10 surfaces, on X or Y direction, to form the groove 5a of given number.Like this, be used to divide or the processing groove 5a that cuts can be formed on the surface of wafer 10 as lattice.Subsequently, by applying given force, wafer 10 can be divided into the chip with necessary shape along processing groove 5a.

The assembling light-emitting component

Thus by riving, divide or cutting from β-Ga ₂O ₃The naked crystal block that substrate 10 (wafer form) obtains is used to assemble light-emitting component.

To comprise β-Ga ₂O ₃The light-emitting component (or chip) of substrate 10, n-electrode 19, epitaxial loayer 26 and p-electrode 18 is stuck with paste by conducting metal and is installed on the base station 28 with lead-in wire stitch 29, and described lead-in wire stitch 29 will insert circuit board etc.Base station 28 is made of the n-type silicon substrate as Zener diode, is not subjected to electrostatic influence with protection LED element 10.N-electrode 19 is electrically connected to the p-type semiconductor layer 28a that is formed on the base station 28.P-electrode 18 is electrically connected to base station 28 by bonding electrodes 24, junction surface 25 and wire bonds 27.Assemble the luminescent device that can be installed on circuit board etc. like this.

The effect of second embodiment

In second embodiment, be formed on light-emitting component (chip form) on the gallium oxide substrate and can be cut apart and do not cause near peeling off or crackle institute's working position.Particularly at the β-Ga of crystal face with different cleavage strengths ₂O ₃Under the situation of substrate, at first substrate is cut apart by riving so that smooth surface to be provided along a crystal face (having high cleavage fissure), cut apart by drawing quarter or laser processing along another crystal face (having low cleavage fissure) subsequently.Thus, can improve product yield to increase production capacity.Like this, the present embodiment is characterised in that, for comprising gallium oxide (Ga ₂O ₃) and the semiconductor element (wafer form) of the semiconductor layer that forms thereon, by riving in the rational direction of strong solution and waiting a quarter and carry out cutting procedure by carry out drawing except that riving in the rational direction of weak solution.Though in second embodiment, light-emitting component is the LED element, form laser diode by identical process.At this, its cleavage surface can be used as optical resonator.

The 3rd embodiment

Fig. 1 is that the nitride semiconductor device in expression the present invention the 3rd preferred embodiment is the sectional view of III nitride base compound semiconductor light-emitting device (being designated hereinafter simply as " light-emitting component ").

Light emitting element structure

Light-emitting component 1 is a vertical type light emitting element of arranging p-and n-lateral electrode in vertical direction, comprising: Ga ₂O ₃Substrate 10 is as the growth substrates of the III group-III nitride based compound semiconductor that is used for growing thereon; Be formed on Ga with order ₂O ₃AlN resilient coating 11 on the substrate 10; The Si doped n ⁺-GaN layer 12; Si doped n-AlGaN layer 13; MQW (Multiple Quantum Well) 14 with the multi-quantum pit structure that forms by InGaN/GaN; Mg doped p-AlGaN layer 15, Mg doped p ⁺-GaN layer 16 and the current-diffusion layer 17 that formed by ITO (tin indium oxide) are to diffuse to p with electric current ⁺-GaN layer 16.AlN resilient coating 11-p ⁺-GaN layer 16 is all grown by MOCVD (metal organic chemical vapor deposition).

Light-emitting component 1 also comprises the p-electrode 18 of the gold that is formed on the current-diffusion layer 17 and is formed on Ga ₂O ₃The n-electrode 19 of the aluminium of substrate 10 belows.

The Ga of the present embodiment ₂O ₃Substrate 10 has the transparency in blue light-ultraviolet range, and the β-Ga that is obtained by the bulk-shaped monocrystal as 2 inches diameter by EFG or FZ method ₂O ₃Form.

AlN resilient coating 11 passes through to settling Ga ₂O ₃Supply NH in the reactor of substrate 10 ₃And TMA (trimethyl aluminium) and as the H of carrier gas ₂And grow.

n ⁺-GaN layer 12 and p ⁺-AlGaN layer 16 passes through to placing Ga ₂O ₃Supply NH in the reactor of substrate 10 ₃And TMG (trimethyl gallium) and as the H of carrier ₂Grow.In addition, for n ⁺-GaN layer 12 is with single silane (SiH ₄) produce n-type conductivity as Si source (n-dopant).For p ⁺-GaN layer 16 is with bis-cyclopentadiene magnesium (Cp ₂Mg) produce p-type conductivity as Mg source (p-dopant).N-AlGaN layer 13 and p-AlGaN layer 15 are by supply TMA and NH in reactor ₃Grow with TMG.

MQW 14 is by supply TMI and TMG and NH in reactor ₃, as the N of carrier gas ₂Grow.Particularly, supply TMI and TMG and NH ₃Form InGaN, and supply TMG and NH ₃Form GaN.

Figure 12 A-12E is the sectional view of the manufacture method of the semiconductor element (LED element) in expression the present invention the 3rd preferred embodiment.

At first, shown in Figure 12 A, provide by bulk-shaped monocrystal β-Ga ₂O ₃The Ga that forms ₂O ₃Substrate 10 (wafer form) also places it on the pedestal in the reactor.

Then, shown in Figure 12 B, the Ga under 400 ℃ growth temperature in being placed on reactor ₂O ₃Supply TMA and NH on the surface of substrate 10 ₃And as the H of carrier ₂Come growing AIN resilient coating 11.

Then, shown in Figure 12 C, GaN based semiconductor, n ⁺-GaN layer 12-p ⁺-GaN layer 16 sees through MOCVD and is grown on the AlN resilient coating 11, and current-diffusion layer 17 is formed on p by sputter ⁺On-GaN the layer 16.

Then, shown in Figure 12 D, the p-lateral electrode 18 of gold is formed on the current-diffusion layer 17 by deposition.

Then, shown in Figure 12 E, the n-lateral electrode 19 of aluminium is formed on Ga ₂O ₃On the back side of substrate 10 (not forming semiconductor layer thereon).Simultaneously, will have the wafer counter-rotating of GaN based semiconductor to form n-lateral electrode 19.

Fig. 2 A-2B is the Ga that expression has the GaN based semiconductor ₂O ₃The schematic plan view of the segmentation procedure of substrate 10 (wafer form).Fig. 2 A illustrates cuts apart Ga ₂O ₃State before the substrate 10, Fig. 2 B illustrates cuts apart Ga ₂O ₃State behind the substrate 10.

Cut apart wafer Ga ₂O ₃During substrate 10, at first cut apart slivering to expose β-Ga ₂O ₃Cleavage surface.Particularly, shown in Fig. 2 A, kerf 60 is along Ga ₂O ₃The cleavage direction of substrate 10 forms.Subsequently, shown in Fig. 2 B, will have the Ga of kerf 60 ₂O ₃ Substrate 10 becomes the bar have according to the size of scratch width by cutting apart (or breaking), to form crystal bar 10A.

Figure 13 A-13C is that explanation will have Ga ₂O ₃The crystal bar of substrate (or crystal bar) is divided into the sectional view of chip.

At first, as shown in FIG. 13A, utilize diamond to draw icking tool 20 in crystal bar 10A and form groove (=cutting part 21), it has from p-lateral electrode 18 to Ga ₂O ₃The degree of depth and the diamond of about half thickness of substrate 10 are drawn the thickness that icking tool 20 has 20 μ m.

Subsequently, shown in Figure 13 B,, be placed on position with drawing icking tool 20, and utilize and draw icking tool 20 at p-lateral electrode 19 and Ga corresponding to the cutting part 21 that forms as shown in FIG. 13A with crystal bar 10A counter-rotating ₂O ₃Reverse side from cutting part 21 in the substrate 10 forms another groove.

By crystal bar 10A is formed groove, crystal bar 10A is divided into light-emitting component 1 shown in Figure 13 C.

The effect of the 3rd embodiment

In the 3rd embodiment, has the Ga of GaN based semiconductor ₂O ₃Substrate 10 (crystal bar form) see through to draw icking tool 20 with progressively rather than the mode in a step cut.Thus, can prevent to produce and break, described breaking is owing to draw that internal stress concentration of local due to carving causes.The inventor finds and can draw to carve substrate or draw and carve about half substrate thickness and prevent and break by carve in the step on the both direction on the substrate thickness (or on rightabout) at each stroke.And, find that stroke depth d at quarter (carving step for each stroke) is effective in 0.2t≤d≤0.8t scope, wherein t is a substrate thickness.

Though in the present embodiment, the electrode structure of light-emitting component 1 is vertical, it can be a level.Under latter event, the step of counter-rotating wafer is optional in the electrode forming process.

In the 3rd embodiment, has the Ga of GaN based semiconductor by riving ₂O ₃The crystal bar 10A that substrate 10 (wafer form) forms is divided into chip by drawing along the rightabout on the thickness of crystal bar 10A to carve.Yet drawing quarter can be on the equidirectional on the crystal bar 10A thickness.

The 4th embodiment

Figure 14 A-14C is the sectional view of the manufacture method of the semiconductor element in expression the present invention the 4th preferred embodiment.

At first, shown in Figure 14 A, utilize diamond to draw icking tool 22 in crystal bar 10A and form groove (=cutting part 21), it has from p-lateral electrode 18 to Ga ₂O ₃The degree of depth and the diamond of about half thickness of substrate 10 are drawn the thickness that icking tool 22 has 50 μ m.

Subsequently, as shown in Figure 14B, another groove utilizes diamond to draw the bottom surface of icking tool 23 from cutting part 21 bottoms to crystal bar 10A and is formed on Ga ₂O ₃On the residual thickness of substrate 10 and p-lateral electrode 19, and diamond draws the thickness that icking tool 23 has 20 μ m, and its thickness than first stroke of icking tool 22 is thin.

By crystal bar 10A is formed groove, crystal bar 10A is divided into light-emitting component 1 shown in Figure 14 C.

The effect of the 4th embodiment

In the 4th embodiment, has the Ga of GaN based semiconductor ₂O ₃Substrate 10 (wafer form) is with progressively rather than the cutting after see through drawing the groove that icking tool 22 forms substrates one half thickness of the mode in a step, utilize subsequently thickness thinner draw icking tool 23 to its bottom surface formation groove.Thus, can prevent to produce and break, described breaking is owing to draw that internal stress concentration of local due to carving causes.

Other embodiment

Figure 15 is the improved plane graph of expression the 3rd or the 4th embodiment.Though in third and fourth embodiment, cut apart crystal bar 10A, Ga by drawing to carve ₂O ₃Substrate 10 (wafer form) also can by with form crystal lattice (seeing Figure 15) as instructed in third and fourth embodiment from its front and/or the back side draw to carve and be divided into chip.

The present invention can be applicable to for example for example optical diode, optotransistor and LDR of LED and LD and light receiving element of light-emitting component.

Though having carried out complete sum with respect to particular, the present invention clearly illustrates, but claims are not limited to this, but comprise all changes of the available basic instruction that falls into this paper substantially and proposed of those skilled in the art and replace structure.

Claims

1. method of making semiconductor element, described semiconductor element comprise the substrate that is formed by gallium oxide and are formed on semiconductor layer on the described substrate that this method comprises:

First segmentation procedure, the substrate that will have thereon a semiconductor layer that forms is divided into crystal bar along first cleavage surface of substrate; With

2. according to the process of claim 1 wherein:

Described semiconductor layer is formed on perpendicular to first cleavage surface of substrate and is parallel on the crystal face of second cleavage surface of substrate.

3. according to the method for claim 2, wherein:

Described second segmentation procedure comprises:

Markers step, wherein mark is formed on the semiconductor layer formation crystal face of crystal bar or is formed on the semiconductor layer of crystal bar and forms on the relative crystal face of crystal face; With

Draw and carve step, wherein utilize described mark, on perpendicular to the direction of first cleavage surface, draw described crystal bar at quarter as reference position.

4. according to the method for claim 3, wherein:

Described markers step comprises that the shallow stroke of semiconductor layer of carving described substrate forms crystal face.

5. according to the method for claim 3, wherein:

Described stroke carve step comprise with cleavage surface in first cleavage surface of crystal bar draw carve to first stroke of desired depth carve step and draw in first cleavage surface of carving with described crystal bar another relative cleavage surface of cleavage surface second stroke quarter step.

6. according to the process of claim 1 wherein:

Described semiconductor layer is formed by III group-III nitride based compound semiconductor.

7. method of making semiconductor element may further comprise the steps:

Utilize the process except that riving, along direction cutting crystal bar perpendicular to cleavage surface.

8. according to the method for claim 7, wherein:

Described process comprises the process at quarter of drawing.

9. according to the method for claim 7, wherein:

Described process comprises that irradiation has the laser processing of predetermined wavelength laser.

10. according to the method for claim 9, wherein:

Described predetermined wavelength comprises the wavelength that is lower than 400nm.

11. according to the method for claim 9, wherein:

Described predetermined wavelength comprises the wavelength that obtains by laser that comprises the YAG triple-frequency harmonics or excimer laser.

12. according to the method for claim 7, wherein:

Described predetermined crystal plane direction comprise (100), (001), (010) and (801) crystal plane direction one of at least.