JP2007299912A - Manufacturing method of light-emitting device and semiconductor wafer for manufacturing light-emitting device - Google Patents

Manufacturing method of light-emitting device and semiconductor wafer for manufacturing light-emitting device Download PDF

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JP2007299912A
JP2007299912A JP2006126253A JP2006126253A JP2007299912A JP 2007299912 A JP2007299912 A JP 2007299912A JP 2006126253 A JP2006126253 A JP 2006126253A JP 2006126253 A JP2006126253 A JP 2006126253A JP 2007299912 A JP2007299912 A JP 2007299912A
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Kazunori Hagimoto
和徳 萩本
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Shin Etsu Handotai Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To minimize occurrence of defective lamination of a transparent substrate, cracks of a compound semiconductor layer, and the like, in a manufacturing method of a light-emitting device wherein a substrate for growth is removed through etching after a compound semiconductor layer including a light-emitting layer portion on the substrate for growth grows by a MOVPE method, then the transparent substrate is laminated on the compound semiconductor layer with the substrate for growth removed. <P>SOLUTION: A process to remove projected type exposure portions 51 of a columnar semiconductor defective portion is performed prior to a laminating process after a substrate removing process, wherein the semiconductor defective portion remains on a second main surface of a layer 50 subject to device forming, without being dissolved by selective chemical etching. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は発光素子の製造方法及び発光素子製造用半導体ウェーハに関する。   The present invention relates to a method for manufacturing a light emitting element and a semiconductor wafer for manufacturing a light emitting element.

特開2001−68731号公報JP 2001-68731 A 特開2002−203987号公報JP 2002-203987 A

(AlGa1−xIn1−yP混晶(ただし、0≦x≦1,0≦y≦1;以下、AlGaInP混晶、あるいは単にAlGaInPとも記載する)により発光層部が形成された発光素子は、薄いAlGaInP活性層を、それよりもバンドギャップの大きいn型AlGaInPクラッド層とp型AlGaInPクラッド層とによりサンドイッチ状に挟んだダブルへテロ構造を採用することにより、高輝度の素子を実現できる。発光層部は有機金属気相成長法(Metal-Oxide Vapor Phase Epitaxy:MOVPE)にて成長する方法が一般的である。 The light-emitting layer portion is formed of (Al x Ga 1-x ) y In 1-y P mixed crystal (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1; hereinafter also referred to as AlGaInP mixed crystal or simply AlGaInP). The light emitting device has a high brightness by adopting a double hetero structure in which a thin AlGaInP active layer is sandwiched between an n-type AlGaInP cladding layer and a p-type AlGaInP cladding layer having a larger band gap. An element can be realized. In general, the light emitting layer is grown by metal-organic vapor phase epitaxy (MOVPE).

AlGaInP発光素子の場合、発光層部の成長基板としてGaAs基板が使用されるが、GaAsはAlGaInP発光層部の発光波長域において光吸収が大きい。そこで、特許文献1及び特許文献2には、一旦GaAs基板を除去し、GaP基板を新たに貼り合わせる方法が開示されている。   In the case of an AlGaInP light emitting device, a GaAs substrate is used as a growth substrate for the light emitting layer portion. However, GaAs absorbs a large amount of light in the emission wavelength region of the AlGaInP light emitting layer portion. Therefore, Patent Documents 1 and 2 disclose a method of once removing a GaAs substrate and newly bonding a GaP substrate.

しかしながら、本発明者が検討したところ、GaAs基板上にAlGaInP発光層部をMOVPE法により成長した後、GaAs基板を化学エッチングにより除去すると、基板除去した発光層部の裏面(第二主表面)に突起状の介在物が形成されていることがあり、そのままGaP基板を貼り合わせた場合、突起の周囲に貼り合わせ不良となる領域が形成されやすくなる。また、貼り合わせの対象となる発光層部を含む薄い化合物半導体層が突起周囲でGaP基板から浮き上がり、貼り合わせのために加圧すると応力集中してクラックが入りやすい問題がある。   However, as a result of studies by the present inventors, when the AlGaInP light emitting layer portion is grown on the GaAs substrate by the MOVPE method and then the GaAs substrate is removed by chemical etching, the back surface (second main surface) of the light emitting layer portion removed from the substrate is formed. Projection-like inclusions may be formed, and when the GaP substrate is bonded as it is, a region causing a bonding failure is likely to be formed around the protrusion. Further, there is a problem that a thin compound semiconductor layer including a light emitting layer portion to be bonded is lifted from the GaP substrate around the protrusions, and stress is concentrated and cracks are easily generated when pressure is applied for bonding.

本発明の課題は、成長用基板上に発光層部を含む化合物半導体層をMOVPE法により成長した後、成長用基板をエッチング除去し、該成長用基板が除去された化合物半導体層に透明基板を貼り合わせる発光素子の製造方法において、透明基板の貼り合わせ不良や化合物半導体層への割れ等を生じにくくし、さらには該製造方法によって実現可能な割れや貼り合わせ不良が低減された発光素子製造用半導体ウェーハを提供することにある。   An object of the present invention is to grow a compound semiconductor layer including a light-emitting layer portion on a growth substrate by MOVPE, and then etch away the growth substrate, and then add a transparent substrate to the compound semiconductor layer from which the growth substrate has been removed. In the method for manufacturing a light-emitting element to be bonded, it is difficult to cause a bonding failure of a transparent substrate, a crack to a compound semiconductor layer, and the like. It is to provide a semiconductor wafer.

課題を解決するための手段及び発明の効果Means for Solving the Problems and Effects of the Invention

上記課題を解決するために、本発明の発光素子の製造方法は、
不透明の化合物半導体からなる成長用単結晶基板の第一主表面上に、発光層部を有する素子化対象層を含んだ化合物半導体成長層の少なくとも発光層部をMOVPE法によりエピタキシャル成長して中間積層体を得るMOVPE成長工程と、
中間積層体の、素子化対象層の第二主表面側に位置する成長用単結晶基板を含む非素子化部分を、少なくとも素子化対象層と接する部分を選択化学エッチングにより溶解する形で除去する基板除去工程と、
非素子化部分を除去後の素子化対象層の第二主表面に透明素子基板を貼り合わせ結合する貼り合わせ工程とがこの順序で実施されるとともに、
MOVPE成長工程において、素子化対象層と非素子化部分とに層厚方向にまたがる形で、素子化対象層の第二主表面を形成する化合物半導体とは異質の化合物半導体からなる柱状半導体欠陥部が形成されるとともに、基板除去工程後において素子化対象層の第二主表面に、選択化学エッチングにより溶解されずに残留した柱状半導体欠陥部の突起状露出部分を除去する突起除去工程を、貼り合わせ工程に先立って実施することを特徴とする。
In order to solve the above problems, a method for manufacturing a light-emitting device of the present invention includes
On the first main surface of the single crystal substrate for growth made of an opaque compound semiconductor, at least the light emitting layer portion of the compound semiconductor growth layer including the device target layer having the light emitting layer portion is epitaxially grown by the MOVPE method. MOVPE growth process to obtain
The non-elementization part including the single crystal substrate for growth located on the second main surface side of the elementization target layer of the intermediate laminate is removed in such a manner that at least a part in contact with the elementization target layer is dissolved by selective chemical etching. A substrate removal step;
A bonding step of bonding and bonding the transparent element substrate to the second main surface of the elementization target layer after removing the non-elementized portion is performed in this order,
In the MOVPE growth step, a columnar semiconductor defect made of a compound semiconductor that is different from the compound semiconductor that forms the second main surface of the elementization target layer so as to extend in the layer thickness direction between the elementization target layer and the non-elementization portion. And a protrusion removing step for removing the protruding exposed portion of the columnar semiconductor defect portion remaining undissolved by selective chemical etching on the second main surface of the elementization target layer after the substrate removing step. It is characterized by being carried out prior to the combining step.

また、本発明の発光素子製造用半導体ウェーハは、発光層部を有する化合物半導体からなる素子化対象層の第一主表面を部分的に覆う形で光取出側電極が形成される一方、該素子化対象層の第二主表面に透明素子基板が貼り合された構造を有するとともに、該素子化対象層の層厚方向途中位置から第二主表面に向けて、該素子化対象層の第二主表面を形成する化合物半導体とは異質の化合物半導体からなる柱状半導体欠陥部が、先端面が第二主表面と一致する形態にて形成され、透明素子基板の第一主表面が、柱状半導体欠陥部の先端面と第二主表面の当該先端面に連なる周縁領域との双方に接する形で密着結合されてなることを特徴とする。   Further, in the semiconductor wafer for manufacturing a light emitting device of the present invention, the light extraction side electrode is formed so as to partially cover the first main surface of the device target layer made of the compound semiconductor having the light emitting layer portion. A transparent element substrate is bonded to the second main surface of the device layer to be processed, and the second layer of the device layer to be processed from the middle position in the layer thickness direction of the device layer to the second main surface. A columnar semiconductor defect made of a compound semiconductor that is different from the compound semiconductor forming the main surface is formed in a form in which the front end surface coincides with the second main surface, and the first main surface of the transparent element substrate is a columnar semiconductor defect. It is characterized in that it is tightly coupled in such a way as to be in contact with both the front end surface of the part and the peripheral region connected to the front end surface of the second main surface.

上記本発明によると、MOVPE成長工程において素子化対象層と非素子化部分とに層厚方向にまたがる形で柱状半導体欠陥部が形成された場合に、選択化学エッチングにより溶解されずに素子化対象層の第二主表面に残留する上記柱状半導体欠陥部の突起状露出部分を除去してから貼り合わせ工程を実施するので、該突起状露出部分に起因した貼り合わせ不良領域が形成されにくくなり、また貼り合せの加圧時に、突起位置への応力集中により薄く脆い素子化対象層にクラックが入ったりする不具合も起こりにくくなる。その結果、得られる発光素子製造用半導体ウェーハは、化合物半導体成長層(素子化対象層)に深く埋没した柱状半導体欠陥部が形成されているにも拘わらず、その柱状半導体欠陥部の先端面が(上記の突起除去工程によって)、透明素子基板が貼り合わされる化合物半導体成長層の第二主表面に対して面一となり、透明素子基板は柱状半導体欠陥部の先端面と上記第二主表面の当該先端面に連なるの周縁領域との双方に接する形で密着結合される。その結果、柱状半導体欠陥部周辺にもクラックや貼り合わせ不良領域を生じにくく、該発光素子製造用半導体ウェーハをダイシングして得られる発光素子チップの歩留まりを大幅に向上することができる。   According to the present invention, when a columnar semiconductor defect is formed in the MOVPE growth step so as to extend in the layer thickness direction between the element target layer and the non-element part, the element target is not dissolved by selective chemical etching. Since the bonding step is performed after removing the protruding exposed portion of the columnar semiconductor defect portion remaining on the second main surface of the layer, it becomes difficult to form a bonding failure region due to the protruding exposed portion, In addition, it is difficult to cause a problem that a thin and brittle device layer is cracked due to the stress concentration at the protrusion position when the bonding is pressed. As a result, the resulting semiconductor wafer for manufacturing a light-emitting element has a columnar semiconductor defect portion that is deeply buried in the compound semiconductor growth layer (elementization target layer), but the tip surface of the columnar semiconductor defect portion is (By the above protrusion removal step), the transparent element substrate is flush with the second main surface of the compound semiconductor growth layer to which the transparent element substrate is bonded, and the transparent element substrate is formed between the tip surface of the columnar semiconductor defect portion and the second main surface. It is tightly coupled so as to be in contact with both of the peripheral region connected to the tip surface. As a result, cracks and poor bonding regions are hardly generated around the columnar semiconductor defect portion, and the yield of light-emitting element chips obtained by dicing the semiconductor wafer for manufacturing light-emitting elements can be greatly improved.

MOVPE成長工程において化合物半導体成長層に柱状半導体欠陥部が形成される主たる要因は、例えば以下のようなものである。すなわち、化合物半導体成長層の原料有機金属ガスの分解により生じたIII族金属粒子が、成長中又は成長後の化合物半導体成長層上に落下して、当該化合物半導体成長層を合金化により溶解しつつ侵食し、その侵食孔内に生じた液相中に異質の化合物半導体を析出する形で柱状半導体欠陥部が形成される。   The main factors for forming columnar semiconductor defects in the compound semiconductor growth layer in the MOVPE growth step are, for example, as follows. That is, the group III metal particles generated by the decomposition of the raw material organic metal gas of the compound semiconductor growth layer fall on the compound semiconductor growth layer during or after growth, and dissolve the compound semiconductor growth layer by alloying. The columnar semiconductor defect portion is formed in such a manner that it erodes and deposits a foreign compound semiconductor in the liquid phase generated in the erosion hole.

高輝度の発光素子を得るには、成長用単結晶基板としてGaAs単結晶基板を使用し、発光層部を、組成式(AlGa1−xIn1−yP(ただし、0≦x≦1,0≦y≦1)にて表される化合物半導体のうち、GaAsと格子整合する組成を有する化合物半導体(第一のIII−V族化合物半導体)にて各々構成された第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有するものとして成長するとよい。なお、「GaAsと格子整合する化合物半導体」とは、応力による格子変位を生じていないバルク結晶状態にて見込まれる、当該の化合物半導体の格子定数をa1、同じくGaAsの格子定数をa0として、{|a1−a0|/a0}×100(%)にて表される格子不整合率が、1%以内に収まっている化合物半導体のことをいう。また、「組成式(Alx’Ga1−x’y’In1−y’P(ただし、0≦x’≦1,0≦y’≦1)にて表される化合物のうち、GaAsと格子整合する化合物」のことを、「GaAsと格子整合するAlGaInP」などと記載する。また、活性層は、AlGaInPの単一層として構成してもよいし、互いに組成の異なるAlGaInPからなる障壁層と井戸層とを交互に積層した量子井戸層として構成してもよい(量子井戸層全体を、一層の活性層とみなす)。 In order to obtain a high-intensity light-emitting element, a GaAs single crystal substrate is used as the growth single crystal substrate, and the light-emitting layer portion has a composition formula (Al x Ga 1-x ) y In 1-y P (where 0 ≦ Among the compound semiconductors represented by x ≦ 1, 0 ≦ y ≦ 1), the first conductive materials each composed of a compound semiconductor (first III-V group compound semiconductor) having a composition lattice-matched with GaAs. The mold cladding layer, the active layer, and the second conductivity type cladding layer may be grown as having a double heterostructure laminated in this order. Note that the “compound semiconductor lattice-matched with GaAs” means that the lattice constant of the compound semiconductor expected in a bulk crystal state in which no lattice displacement is caused by stress is a1, and the lattice constant of GaAs is a0. A compound semiconductor having a lattice mismatch ratio represented by | a1-a0 | / a0} × 100 (%) within 1%. Further, among the compounds represented by “composition formula (Al x ′ Ga 1−x ′ ) y ′ In 1−y ′ P (where 0 ≦ x ′ ≦ 1, 0 ≦ y ′ ≦ 1), GaAs The compound that is lattice-matched with “AlGaInP that is lattice-matched with GaAs” or the like is described. The active layer may be configured as a single layer of AlGaInP, or may be configured as a quantum well layer in which barrier layers and well layers made of AlGaInP having different compositions are stacked alternately (the entire quantum well layer). Is regarded as a single active layer).

上記のような発光層部をMOVPEで成長した場合、柱状半導体欠陥部をなす異質の化合物半導体は、発光層部よりもGa又はInの含有比率が高く、かつ、V族元素の主体がPからなる多結晶化合物半導体からなるものが非常に形成されやすく、これに起因した突起状露出部を予め除去してから透明素子基板を貼り合せるようにすることは、上記発光層部を有した発光素子チップの製造歩留まり向上に大きく寄与する。特に、透明素子基板を、脆いGaP単結晶にて構成する場合は、本発明の採用により透明素子基板側のクラック発生防止も達成でき、より効果的である。   When the above light emitting layer part is grown by MOVPE, the foreign compound semiconductor forming the columnar semiconductor defect part has a Ga or In content ratio higher than that of the light emitting layer part, and the main component of the V group element is P. It is very easy to form a polycrystalline compound semiconductor, and the protrusion-like exposed portion resulting therefrom is removed in advance, and then the transparent element substrate is bonded to the light emitting device having the light emitting layer portion. This greatly contributes to the improvement of chip manufacturing yield. In particular, when the transparent element substrate is composed of a brittle GaP single crystal, the adoption of the present invention can achieve prevention of cracks on the transparent element substrate side, which is more effective.

突起状露出部分の除去には、洗浄やエッチング以外の次のような強制的な除去工程を採用するとよい。
・突起除去工程において突起状露出部分を機械研削処理により切除する。
・突起除去工程において突起状露出部分を、挟持治具により挟みつけた状態で折り取ることにより切除する。
・突起除去工程において突起状露出部分を、レーザー照射により焼き飛ばすことにより除去する。
・突起除去工程において突起状露出部分を、ウォータージェットにより除去する。
いずれの方法においても、例えば素子化対象層の第二主表面側を実体顕微鏡等の拡大鏡で観察しながら、手動により突起状露出部分を除去することもできるし、ロボットを用いてその作業を自動化することも可能である。
For removal of the protrusion-like exposed portion, the following forced removal process other than cleaning and etching may be employed.
-In the protrusion removal step, the protrusion-like exposed portion is cut out by mechanical grinding.
-In the protrusion removal step, the protrusion-like exposed portion is cut off by being folded while being sandwiched by a holding jig.
-In the protrusion removal process, the protrusion-like exposed part is removed by burning off by laser irradiation.
In the protrusion removal step, the protrusion-like exposed portion is removed with a water jet.
In either method, for example, while observing the second main surface side of the elementization target layer with a magnifying glass such as a stereomicroscope, it is possible to manually remove the protruding exposed portion, or to perform the work using a robot. It can also be automated.

以下、本発明の実施の形態を添付の図面を参照して説明する。
図1は、本発明の一実施形態である発光素子100を示す概念図である。発光素子100は、発光層部24を有する化合物半導体からなる素子化対象層50の第一主表面を部分的に覆う形で光取出側電極9が形成される一方、該素子化対象層50の第二主表面に透明素子基板90が貼り合された構造を有する。素子化対象層50において、発光層部24の上に電流拡散層7が形成され、その電流拡散層7の上に光取出側電極9が形成されている。また、透明素子基板90はn型GaP単結晶基板(以下、n型GaP単結晶基板90という:発光層部24からの発光光束に対して透明である(活性層5よりもバンドギャップエネルギーが大きい))であり、その第二主表面の全面が裏面電極20により覆われている。光取出側電極9は、電流拡散層7の第一主表面の略中央に形成され、該光取出側電極9の周囲の領域が発光層部24からの光取出領域とされている。また、光取出側電極9の中央部に電極ワイヤ17を接合するためのAu等にて構成されたボンディングパッド16が配置されている。
Embodiments of the present invention will be described below with reference to the accompanying drawings.
FIG. 1 is a conceptual diagram showing a light emitting device 100 according to an embodiment of the present invention. In the light emitting device 100, the light extraction side electrode 9 is formed so as to partially cover the first main surface of the device formation target layer 50 made of a compound semiconductor having the light emitting layer portion 24. A transparent element substrate 90 is bonded to the second main surface. In the device target layer 50, the current diffusion layer 7 is formed on the light emitting layer portion 24, and the light extraction side electrode 9 is formed on the current diffusion layer 7. The transparent element substrate 90 is an n-type GaP single crystal substrate (hereinafter referred to as an n-type GaP single crystal substrate 90: transparent to the luminous flux from the light emitting layer portion 24 (having a larger band gap energy than the active layer 5). )), And the entire surface of the second main surface is covered with the back electrode 20. The light extraction side electrode 9 is formed substantially at the center of the first main surface of the current diffusion layer 7, and a region around the light extraction side electrode 9 is a light extraction region from the light emitting layer portion 24. A bonding pad 16 made of Au or the like for bonding the electrode wire 17 is disposed at the center of the light extraction side electrode 9.

発光層部24はMOVPE法で成長されたものであり、組成式(AlGa1−xIn1−yP(ただし、0≦x≦1,0≦y≦1)にて表される化合物半導体のうち、GaAsと格子整合する組成を有する化合物半導体にて構成されている。具体的には、発光層部24は、ノンドープ(AlGa1−xIn1−yP(ただし、0≦x≦0.55,0.45≦y≦0.55)混晶からなる活性層5を、p型(AlGa1−zIn1−yP(ただしx<z≦1)からなるp型クラッド層6とn型(AlGa1−zIn1−yP(ただしx<z≦1)からなるn型クラッド層4とにより挟んだ構造を有する。図1の発光素子100では、光取出側電極9側にp型AlGaInPクラッド層6が配置されており、裏面電極20側にn型AlGaInPクラッド層4が配置されている。従って、通電極性は光取出側電極9側が正である。なお、ここでいう「ノンドープ」とは、「ドーパントの積極添加を行なわない」との意味であり、通常の製造工程上、不可避的に混入するドーパント成分の含有(例えば1013〜1016atoms/cm程度を上限とする)をも排除するものではない。 The light emitting layer portion 24 is grown by the MOVPE method, and is represented by a composition formula (Al x Ga 1-x ) y In 1-y P (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1). Among the compound semiconductors, a compound semiconductor having a composition lattice-matched with GaAs is used. Specifically, the light emitting layer portion 24 is made of a non-doped (Al x Ga 1-x ) y In 1-y P (where 0 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.55) mixed crystal. The active layer 5 is made of p-type (Al z Ga 1-z ) y In 1-y P (where x <z ≦ 1) and n-type (Al z Ga 1-z ) y In It has a structure sandwiched between n-type cladding layers 4 made of 1-yP (where x <z ≦ 1). In the light emitting device 100 of FIG. 1, the p-type AlGaInP cladding layer 6 is disposed on the light extraction side electrode 9 side, and the n-type AlGaInP cladding layer 4 is disposed on the back electrode 20 side. Therefore, the energization polarity is positive on the light extraction side electrode 9 side. Here, the "non-doped" means an "not intentionally added with a dopant", the normal manufacturing process, the content of the dopant component inevitably mixed (e.g. 10 13 ~10 16 atoms / cm 3 to a maximum extent) is not excluded also.

一方、電流拡散層7は、ドーパントをZn(Mgでもよく、ZnとMgとを併用してもよい)としたp型GaP層として形成されている。電流拡散層7はハイドライド気相成長(Hydride Vapor Phase Epitaxial Growth Method:HVPE)法により形成されたものであり、その形成厚さは例えば5μm以上200μm以下(一例として、150μm)である。また、電流拡散層7と発光層部24との間には、発光層部24に続く形でMOVPE法により成長されたn型GaP接続層7pが形成されている。つまり、素子化対象層50のうち、発光層部24とn型GaP接続層7pとがMOVPE法により成長され、電流拡散層7がHVPE法により成長されたものである。   On the other hand, the current spreading layer 7 is formed as a p-type GaP layer in which the dopant is Zn (Mg may be used, or Zn and Mg may be used in combination). The current diffusion layer 7 is formed by a hydride vapor phase epitaxy (HVPE) method, and the thickness thereof is, for example, 5 μm or more and 200 μm or less (as an example, 150 μm). Further, an n-type GaP connection layer 7p grown by the MOVPE method is formed between the current spreading layer 7 and the light emitting layer portion 24 in a form following the light emitting layer portion 24. That is, in the device target layer 50, the light emitting layer portion 24 and the n-type GaP connection layer 7p are grown by the MOVPE method, and the current diffusion layer 7 is grown by the HVPE method.

素子化対象層50には、図11に示すように、その層厚方向途中位置から第二主表面MP2に向けて、該素子化対象層50の第二主表面MP2を形成する化合物半導体(本実施形態では、n型AlGaInPクラッド4)とは異質の化合物半導体からなる柱状半導体欠陥部55が、その先端面が素子化対象層50の上記第二主表面MP2と一致する形態にて形成されている。また、透明素子基板であるn型GaP単結晶基板90は、その第一主表面MP1が、柱状半導体欠陥部の先端面と第二主表面の当該先端面に連なる周縁領域との双方に接する形で貼り合せにより密着結合されている。   As shown in FIG. 11, the elementalization target layer 50 has a compound semiconductor (this book) that forms the second main surface MP2 of the elementalization target layer 50 from the middle position in the layer thickness direction toward the second main surface MP2. In the embodiment, the columnar semiconductor defect portion 55 made of a compound semiconductor different from that of the n-type AlGaInP clad 4) is formed in such a form that the front end surface thereof coincides with the second main surface MP2 of the device layer 50. Yes. The n-type GaP single crystal substrate 90, which is a transparent element substrate, has a shape in which the first main surface MP1 is in contact with both the front end surface of the columnar semiconductor defect portion and the peripheral region connected to the front end surface of the second main surface. Are tightly bonded by bonding.

以下、図1の発光素子100の製造方法について説明する。
まず、図2に示すように、成長用単結晶基板としてのn型GaAs単結晶基板1(発光層部24からの発光光束に対して不透明である(活性層5よりもバンドギャップエネルギーが小さい))を用意する。そして、工程1において、その基板1の第一主表面に、n型GaAsバッファ層1bを例えば0.5μm、次いで、AlInPからなるエッチストップ層2を0.5μm、そして、発光層部24として、各々(AlGa1−xIn1−yPよりなる、1μmのn型クラッド層4(n型ドーパントはSi)、0.6μmの活性層(ノンドープ)5、及び1μmのp型クラッド層6(p型ドーパントはMg:有機金属分子からのCもp型ドーパントとして寄与しうる)を、この順序にてエピタキシャル成長させる。次に、工程2では、発光層部24の上にp型GaPからなる接続層7pをMOVPE法によりヘテロエピタキシャル成長する。
Hereinafter, a method for manufacturing the light emitting device 100 of FIG. 1 will be described.
First, as shown in FIG. 2, an n-type GaAs single crystal substrate 1 as a growth single crystal substrate (which is opaque to the luminous flux from the light emitting layer portion 24 (having a smaller band gap energy than the active layer 5). ). In step 1, the n-type GaAs buffer layer 1b is, for example, 0.5 μm on the first main surface of the substrate 1, then the etch stop layer 2 made of AlInP is 0.5 μm, and the light emitting layer portion 24 is each consists of (Al x Ga 1-x) y in 1-y P, 1μm n -type cladding layer 4 of the (n-type dopant is Si), 0.6 .mu.m active layer (non-doped) 5, and 1 [mu] m p-type cladding Layer 6 (p-type dopant Mg: C from organometallic molecules can also contribute as p-type dopant) is grown epitaxially in this order. Next, in step 2, the connection layer 7p made of p-type GaP is heteroepitaxially grown on the light emitting layer portion 24 by the MOVPE method.

これら各層のエピタキシャル成長は、公知のMOVPE法により行なわれる。Al、Ga、In(インジウム)、P(リン)の各成分源となる原料ガスとしては以下のようなものを使用できる;
・Al源ガス;トリメチルアルミニウム(TMAl)、トリエチルアルミニウム(TEAl)など;
・Ga源ガス;トリメチルガリウム(TMGa)、トリエチルガリウム(TEGa)など;
・In源ガス;トリメチルインジウム(TMIn)、トリエチルインジウム(TEIn)など。
・P源ガス:トリメチルリン(TMP)、トリエチルリン(TEP)、ホスフィン(PH)など。
Epitaxial growth of each of these layers is performed by a known MOVPE method. The following materials can be used as source gases for the source components of Al, Ga, In (indium), and P (phosphorus);
Al source gas; trimethylaluminum (TMAl), triethylaluminum (TEAl), etc .;
Ga source gas; trimethylgallium (TMGa), triethylgallium (TEGa), etc .;
In source gas; trimethylindium (TMIn), triethylindium (TEIn), etc.
P source gas: trimethyl phosphorus (TMP), triethyl phosphorus (TEP), phosphine (PH 3 ), etc.

次に、図3の工程3に進み、p型GaPよりなる電流拡散層7を、HVPE法により接続層7p上にホモエピタキシャル成長させる。HVPE法は、具体的には、容器内にてIII族元素であるGaを所定の温度に加熱保持しながら、そのGa上に塩化水素を導入することにより、下記(1)式の反応によりGaClを生成させ、キャリアガスであるH2ガスとともに基板上に供給する。
Ga(液体)+HCl(気体) → GaCl(気体)+1/2H‥‥(1)
成長温度は例えば640℃以上860℃以下に設定する。また、V族元素であるPは、PHをキャリアガスであるH2とともに基板上に供給する。さらに、p型ドーパントであるZnは、DMZn(ジメチルZn)の形で供給する。GaClはPHとの反応性に優れ、下記(2)式の反応により、効率よく電流拡散層7を成長させることができる:
GaCl(気体)+PH(気体)
→GaP(固体)+HCl(気体)+H2(気体)‥‥(2)
Next, proceeding to step 3 in FIG. 3, the current diffusion layer 7 made of p-type GaP is homoepitaxially grown on the connection layer 7p by the HVPE method. Specifically, in the HVPE method, GaCl, which is a group III element, is heated and held at a predetermined temperature in a container, and hydrogen chloride is introduced onto the Ga, thereby causing GaCl by the reaction of the following formula (1). And is supplied onto the substrate together with H 2 gas which is a carrier gas.
Ga (liquid) + HCl (gas) → GaCl (gas) + 1 / 2H 2 (1)
The growth temperature is set to, for example, 640 ° C. or more and 860 ° C. or less. Further, P, which is a group V element, supplies PH 3 onto the substrate together with H 2 which is a carrier gas. Furthermore, Zn which is a p-type dopant is supplied in the form of DMZn (dimethyl Zn). GaCl is excellent in reactivity with PH 3, and the current diffusion layer 7 can be efficiently grown by the reaction of the following formula (2):
GaCl (gas) + PH 3 (gas)
→ GaP (solid) + HCl (gas) + H 2 (gas) (2)

ここまでの工程で、GaAs単結晶基板1上には化合物半導体成長層60が2種の気相成長法によりエピタキシャル成長され、中間積層体200が形成されている。中間積層体200のうち、発光層部24、接続層7p及び電流拡散層7が素子化対象層50であり、それ以外の部分(エッチストップ層2、バッファ層1b及びGaAs単結晶基板1)が非素子化部分70である。他方、MOVPE成長工程においては、上記素子化対象層50の発光層部24及び接続層7pと、これに先立つエッチストップ層2及びバッファ層1bとが成長される。このMOVPE成長工程において素子化対象層50には、前述の柱状半導体欠陥部55が、例えば以下のよう原因により形成される。すなわち、図6に示すように、化合物半導体成長層(図6の例では、バッファ層1b及びエッチストップ層2)の原料有機金属ガスの分解により生じたIII族金属粒子52が、成長中又は成長後の化合物半導体成長層に落下して(状態A)、当該化合物半導体成長層を合金化により溶解しつつ侵食し(状態B)、その侵食孔55h内に生じた液相中53に異質の化合物半導体54を析出する形で柱状半導体欠陥部55が形成される(状態C)。合金化はGaAs単結晶基板1の側にまで進展し、柱状半導体欠陥部55の先端側はバッファ層1b及びエッチストップ層2とを突き抜けてGaAs単結晶基板1内部に入り込んでいる。他方、柱状半導体欠陥部55の基端側は発光層部24(つまり、素子化対象層)内にあり、結果として柱状半導体欠陥部55は、素子化対象層50と非素子化部分70とにまたがって位置している。   Through the steps so far, the compound semiconductor growth layer 60 is epitaxially grown on the GaAs single crystal substrate 1 by two kinds of vapor phase growth methods, and the intermediate stacked body 200 is formed. In the intermediate laminate 200, the light emitting layer portion 24, the connection layer 7p, and the current diffusion layer 7 are the device target layers 50, and the other portions (the etch stop layer 2, the buffer layer 1b, and the GaAs single crystal substrate 1). This is a non-elementized portion 70. On the other hand, in the MOVPE growth step, the light emitting layer portion 24 and the connection layer 7p of the elementization target layer 50, the etch stop layer 2 and the buffer layer 1b preceding this are grown. In the MOVPE growth step, the above-described columnar semiconductor defect portion 55 is formed in the elementization target layer 50 due to, for example, the following causes. That is, as shown in FIG. 6, the group III metal particles 52 generated by the decomposition of the source organic metal gas of the compound semiconductor growth layer (the buffer layer 1b and the etch stop layer 2 in the example of FIG. 6) are growing or growing. The compound semiconductor growth layer falls to the subsequent compound semiconductor growth layer (state A), erodes while dissolving the compound semiconductor growth layer by alloying (state B), and a foreign compound in the liquid phase 53 generated in the erosion hole 55h A columnar semiconductor defect 55 is formed in the form of depositing the semiconductor 54 (state C). Alloying progresses to the GaAs single crystal substrate 1 side, and the tip side of the columnar semiconductor defect portion 55 penetrates through the buffer layer 1b and the etch stop layer 2 and enters the GaAs single crystal substrate 1 inside. On the other hand, the base end side of the columnar semiconductor defect portion 55 is in the light emitting layer portion 24 (that is, the element formation target layer). Situated across.

より詳しく説明すると、MOVPEの反応容器内には、基板支持用のサセプタやプラネタリーあるいはプルプレートといった周辺構造物が配置され、高周波コイル等で高温(例えば650℃〜900℃)に加熱される。この状態で容器内部の上方に配置されたインジェクターから原料有機金属ガスを容器内部空間に噴射するとともに、別の供給ノズルからV族源となるガス(例えばホスフィンなどのP源ガス)を供給し、両者を反応させてIII−V族化合物半導体を基板上に成長する形となる。   More specifically, peripheral structures such as a susceptor, a planetary, or a pull plate for supporting a substrate are arranged in a reaction container of MOVPE, and are heated to a high temperature (for example, 650 ° C. to 900 ° C.) by a high frequency coil or the like. In this state, while injecting the raw material organometallic gas from the injector disposed above the interior of the container into the interior space of the container, a gas serving as a group V source (for example, a P source gas such as phosphine) is supplied from another supply nozzle, Both are reacted to grow a III-V compound semiconductor on the substrate.

発光層部24が上記のごとくAlGaInPにて構成される場合、インジェクターには低融点のGaやInがIII族金属として付着し、これが成長層側に落下すると、柱状半導体欠陥部55は、発光層部24よりもGa又はInの含有比率が高く、かつ、V族元素の主体がPである多結晶化合物半導体(例えばGaP)からなるものとして形成される。   When the light emitting layer portion 24 is composed of AlGaInP as described above, low-melting point Ga or In adheres to the injector as a group III metal, and when this falls to the growth layer side, the columnar semiconductor defect portion 55 becomes the light emitting layer. It is formed of a polycrystalline compound semiconductor (for example, GaP) in which the content ratio of Ga or In is higher than that of the portion 24 and the main group V element is P.

このとき、上記の周辺構造物が高温に加熱されているので、原料有機金属ガス供給用のインジェクターもその輻射熱で加熱されてしまい、インジェクター内部で原料である有機金属の分解が生じ(例えば、トリメチルアルミニウム(TMAl):240℃、トリメチルガリウム(TMGa):222℃、トリメチルインジウム(TMIn):205℃)、インジェクター内にIII族金属が析出する。析出したIII族金属粒子は原料有機金属ガスとともにインジェクターを通して高速で反応容器内に噴射され、化合物半導体基板やエピタキシャル成長中の化合物半導体層に降り注ぐことになる。   At this time, since the peripheral structure is heated to a high temperature, the raw material organic metal gas supply injector is also heated by the radiant heat, and decomposition of the organic metal as the raw material occurs inside the injector (for example, trimethyl). Aluminum (TMAl): 240 ° C., trimethylgallium (TMGa): 222 ° C., trimethylindium (TMIn): 205 ° C.), and a group III metal is deposited in the injector. The deposited group III metal particles are jetted into the reaction vessel at a high speed through the injector together with the raw organic metal gas, and drop into the compound semiconductor substrate and the compound semiconductor layer during epitaxial growth.

上記のようにして降り注いだIII族金属粒子52は、エピタキシャル成長された化合物半導体成長層60やGaAs単結晶基板(成長用単結晶基板)1を構成する化合物半導体と合金化する。反応容器内は上記のごとく昇温されているので、化合物半導体層の合金化された部分は溶融して侵食孔55hを生じ、該侵食孔55h内はIII金属リッチな液相53で満たされる。他方、V族元素源ガスは通常、III族元素源となる有機金属ガスに対し、得られる化合物半導体のIII−V族化学量論比よりもV族リッチとなるとなるように反応容器内に供給されるので、侵食孔内に生じた液相中には素子化対象層(特に発光層部)とは組成の異なるIII−V族化合物半導体が析出し、柱状半導体欠陥部55となるのである。   The group III metal particles 52 poured down as described above are alloyed with the compound semiconductor constituting the epitaxially grown compound semiconductor growth layer 60 and the GaAs single crystal substrate (growth single crystal substrate) 1. Since the temperature inside the reaction vessel is raised as described above, the alloyed portion of the compound semiconductor layer is melted to form the erosion hole 55h, and the erosion hole 55h is filled with the liquid phase 53 rich in III metal. On the other hand, the group V element source gas is normally supplied into the reaction vessel so that it becomes richer in the group V than the group III-V stoichiometric ratio of the obtained compound semiconductor with respect to the organometallic gas serving as the group III element source. Therefore, in the liquid phase generated in the erosion hole, a group III-V compound semiconductor having a composition different from that of the device layer (particularly, the light emitting layer) is deposited, and the columnar semiconductor defect portion 55 is formed.

図7に示すように、柱状半導体欠陥部55の発生要因となるIII族金属粒子52の付着は、化合物半導体成長層60を成長中の種々のタイミングで生じうる。例えばバッファ層1bやエッチストップ層2を成長直後にIII族金属粒子52aが付着すると、GaAs単結晶基板1に比較的深く食い込んだ柱状半導体欠陥部55aとなる。また、発光層部24の成長途上でIII族金属粒子52bが付着すると、発光層部24の厚さ方向中間位置から柱状半導体欠陥部55bが成長することとなる。また、発光層部24を成長後、接続層7pの成長途中にIII族金属粒子52cが付着することもありえ、この場合は発光層部24を貫通する柱状半導体欠陥部55cが発生する。   As shown in FIG. 7, the attachment of the group III metal particles 52 that cause the columnar semiconductor defect 55 can occur at various timings during the growth of the compound semiconductor growth layer 60. For example, if the group III metal particles 52a adhere immediately after the growth of the buffer layer 1b or the etch stop layer 2, a columnar semiconductor defect portion 55a that has penetrated into the GaAs single crystal substrate 1 relatively deeply. Further, when the group III metal particles 52b are attached during the growth of the light emitting layer portion 24, the columnar semiconductor defect portion 55b grows from the middle position in the thickness direction of the light emitting layer portion 24. In addition, after the light emitting layer portion 24 is grown, the group III metal particles 52c may adhere during the growth of the connection layer 7p. In this case, a columnar semiconductor defect portion 55c penetrating the light emitting layer portion 24 is generated.

さらに、MOVPEによる接続層7pまでの成長が終了してからIII族金属粒子52dが付着した場合、これを除去せずにHVPE成長容器に移し替えて電流拡散層7を成長すると、HVPEの昇温過程でIII族金属粒子52dが溶融・合金化し、同様の柱状半導体欠陥部55dが発生する。また、HVPE成長容器内でIII族金属粒子52eが付着することもありえ、この場合は素子化対象層50の全体を貫通する形で柱状半導体欠陥部55eが発生する。   Further, when the group III metal particles 52d adhere after the growth of the connection layer 7p by MOVPE is completed, if the current diffusion layer 7 is grown without being removed, the current diffusion layer 7 is grown. In the process, the group III metal particles 52d are melted and alloyed, and a similar columnar semiconductor defect 55d is generated. In addition, the group III metal particles 52e may adhere in the HVPE growth vessel. In this case, the columnar semiconductor defect portion 55e is generated so as to penetrate the entire device target layer 50.

次に、図4の工程4に進み、GaAs単結晶基板1を除去する。該除去は、GaAs単結晶基板1の第二主表面側から研削を行って基板厚さをある程度減じてから、GaAsに対して選択エッチング性を有する第一エッチング液(例えばアンモニア/過酸化水素混合液)を用いてGaAs単結晶基板1をバッファ層1bとともにエッチング除去し、次いで工程5に示すように、エッチストップ層2をなすAlInPに対して選択エッチング性を有する第二エッチング液(例えば塩酸:Al酸化層除去用にフッ酸を添加してもよい)を用いて該エッチストップ層2をエッチング除去することにより実施できる。なお、エッチストップ層2に代えてAlAs剥離層を形成し、これを選択エッチングすることにより、該GaAs単結晶基板1を素子化対象層50から剥離する形でGaAs単結晶基板1を除去するようにしてもよい。   Next, the process proceeds to step 4 in FIG. 4, and the GaAs single crystal substrate 1 is removed. The removal is performed by grinding from the second main surface side of the GaAs single crystal substrate 1 to reduce the thickness of the substrate to some extent, and then a first etching solution having a selective etching property with respect to GaAs (for example, mixed ammonia / hydrogen peroxide). Then, the GaAs single crystal substrate 1 is removed by etching together with the buffer layer 1b using a liquid, and then, as shown in Step 5, a second etching liquid (for example, hydrochloric acid: having selective etching property with respect to AlInP forming the etch stop layer 2). The etching stop layer 2 can be removed by etching using hydrofluoric acid for removing the Al oxide layer. Note that an AlAs release layer is formed instead of the etch stop layer 2 and is selectively etched to remove the GaAs single crystal substrate 1 in such a manner that the GaAs single crystal substrate 1 is peeled off from the device layer 50. It may be.

図6の状態Dに示すように、柱状半導体欠陥部5がGaAs単結晶基板(成長用単結晶基板)1側まで侵食する形で成長していると、上記のごとくGaAs単結晶基板1(及びエッチストップ層2)をエッチングにより除去した場合、柱状半導体欠陥部55の先端部が突起状露出部51となって、エピタキシャル成長された素子化対象層の第二主表面に突出する。   As shown in the state D of FIG. 6, when the columnar semiconductor defect portion 5 grows so as to erode to the GaAs single crystal substrate (growth single crystal substrate) 1 side, as described above, the GaAs single crystal substrate 1 (and When the etch stop layer 2) is removed by etching, the tip of the columnar semiconductor defect portion 55 becomes a protrusion-like exposed portion 51 and protrudes to the second main surface of the device layer to be epitaxially grown.

半導体ウェーハの製造工程にあっては、デバイス形成面へのパーティクル付着等を洗浄やエッチングにより除去することが一般的に行われている。しかし、こうしたパーティクルは異物(ゴミ等)がウェーハ主表面に付着して生ずるもなど、その発生原因は外的なものであって、多少強く付着したパーティクルも洗浄やエッチング条件の適正化により問題なく除去できるものであった。しかし、ここで除去の対象となる突起状露出部分51は、化合物半導体成長層中に基端部が埋没した柱状半導体欠陥部55の一部であり、単純な洗浄やエッチングにより脱落させる形での除去は期待できない。従って、該突起状露出部分51の除去には、洗浄やエッチング以外の次のような強制的な除去工程を考慮する必要がある。   In the manufacturing process of a semiconductor wafer, it is common practice to remove particles adhering to the device forming surface by cleaning or etching. However, such particles are caused by foreign matters (dust etc.) adhering to the main surface of the wafer, and the cause of the occurrence is external. It could be removed. However, the protrusion-like exposed portion 51 to be removed here is a part of the columnar semiconductor defect portion 55 whose base end portion is buried in the compound semiconductor growth layer, and is removed by simple cleaning or etching. Removal cannot be expected. Therefore, it is necessary to consider the following forced removal process other than cleaning and etching for the removal of the protruding exposed portion 51.

図8は、突起状露出部分51を、グラインダーG等による機械研削処理により切除する例である。図9は、突起状露出部分51を、ピンセットPなどの挟持治具により挟みつけた状態で折り取ることにより切除する例である。また、図10は、突起状露出部分51にレーザー光源Sからレーザ−ビームLBを照射して、これを焼き飛ばす形で(あるいは深さ方向にくりぬく形で)除去する例である。さらに、図13に示すように、水流噴射ノズルNZから高圧の水流WJを突起状露出部分51に噴射することにより、該突起状露出部分51を機械的に削るウォータージェット方式を採用することも可能である。いずれの方法においても、例えば素子化対象層50の第二主表面側を実体顕微鏡等の拡大鏡で観察しながら、手動により突起状露出部分を除去することもできるし、ロボットを用いてその作業を自動化することも可能である。特にGaP多結晶にて突起状露出部分51が形成される場合は、該突起状露出部分51が比較的柔らかいので、上記研削や折り取りによる除去が一層容易である。   FIG. 8 shows an example in which the protruding exposed portion 51 is excised by a mechanical grinding process using a grinder G or the like. FIG. 9 shows an example in which the protruding exposed portion 51 is cut off by being folded in a state of being sandwiched by a sandwiching jig such as tweezers P. FIG. 10 shows an example in which the projection-like exposed portion 51 is irradiated with the laser beam LB from the laser light source S and burned off (or hollowed out in the depth direction). Furthermore, as shown in FIG. 13, it is also possible to adopt a water jet system in which the protruding exposed portion 51 is mechanically scraped by jetting a high-pressure water flow WJ from the water jet nozzle NZ to the protruding exposed portion 51. It is. In any of the methods, for example, the projection-like exposed portion can be manually removed while observing the second main surface side of the elementization target layer 50 with a magnifying glass such as a stereomicroscope, or the operation can be performed using a robot. Can also be automated. In particular, when the protrusion-like exposed portion 51 is formed of GaP polycrystal, the protrusion-like exposed portion 51 is relatively soft, so that the removal by grinding and folding is easier.

なお、レーザーによって突起を除去する場合は、突起状露出部分51を除去した後のレーザー照射位置の周辺に、残渣が溶けて盛り上がることがある。レーザーパワーの調整及び照射範囲の絞り込み等の工夫が必要である。しかし、研削や折り取りあるいはウォータージェットなどの機械的な除去法によれば材料残渣が残留する心配はない。特にウォータージェットを用いた場合、破壊された突起状露出部分51の破片等を水流吹き飛ばすことができるので好都合である。   In addition, when removing a protrusion with a laser, a residue may melt | dissolve around the laser irradiation position after the protrusion-like exposed part 51 is removed. Devices such as adjustment of laser power and narrowing of the irradiation range are necessary. However, there is no concern that material residue will remain according to mechanical removal methods such as grinding, folding, or water jet. In particular, when a water jet is used, it is advantageous because the broken pieces of the protrusion-like exposed portion 51 that has been destroyed can be blown off.

なお、突起状露出部分51の除去は、エッチストップ層2をエッチング除去する前に行ってもよいし、エッチング除去後に行ってもよい。エッチストップ層2の除去前に突起状露出部分51を除去すると、飛び散った材料残渣がエッチストップ層除去と同時に取り除ける利点がある。この場合、エッチストップ層2は、エッチストップ層2がAlInPである場合は、例えば塩酸からなるエッチング液により除去するとよい。   The protrusion-like exposed portion 51 may be removed before the etch stop layer 2 is removed by etching, or after the etching removal. If the protruding exposed portion 51 is removed before the etch stop layer 2 is removed, there is an advantage that the scattered material residue can be removed simultaneously with the removal of the etch stop layer. In this case, when the etch stop layer 2 is AlInP, the etch stop layer 2 may be removed with an etchant made of hydrochloric acid, for example.

図5の工程6に示すように、上記の突起状露出部分51を除去すると、柱状半導体欠陥部55の先端面は素子化対象層50の第二主表面とほぼ面一となる。この状態で、工程7に示すようにn型GaP単結晶基板90(透明素子基板)を素子化対象層50の第二主表面に貼り合せる。具体的には、素子化対象層50の第二主表面に別途用意したn型GaP基板90の第一主表面を重ね合わせて圧迫し、さらに400℃以上700℃以下に昇温して貼り合わせ熱処理を行なう。図12に示すごとく、突起状露出部分51が残留していると、突起状露出部分51の周囲に空隙VOが生じるとともに貼り合せ加圧力も不足するから、その周囲の広い範囲に貼り合せ不良領域を生じやすい。また、突起状露出部分51の先端には、貼り合せ時の加圧により応力集中し、薄く脆い素子化対象層50にクラックが入りやすい。しかし、図11に示すように、突起状露出部分を予め除去してから貼り合せを行なうと、こうした不具合はことごとく解消できる。   As shown in Step 6 of FIG. 5, when the protruding exposed portion 51 is removed, the tip end surface of the columnar semiconductor defect portion 55 is substantially flush with the second main surface of the device layer 50. In this state, an n-type GaP single crystal substrate 90 (transparent element substrate) is bonded to the second main surface of the elementization target layer 50 as shown in Step 7. Specifically, the first main surface of the n-type GaP substrate 90 prepared separately is superimposed on the second main surface of the device target layer 50 and pressed, and further heated to 400 ° C. to 700 ° C. and bonded together. Heat treatment is performed. As shown in FIG. 12, if the protrusion-like exposed portion 51 remains, a void VO is generated around the protrusion-like exposed portion 51 and the bonding pressure is insufficient. It is easy to produce. Further, stress concentrates on the tip of the protruding exposed portion 51 due to the pressure applied at the time of bonding, and cracks tend to occur in the thin and brittle device layer 50. However, as shown in FIG. 11, if the protrusion-like exposed portion is removed in advance and then the bonding is performed, all of these problems can be solved.

以上の工程により、発光素子製造用半導体ウェーハが完成する。そして、この発光素子製造用半導体ウェーハの各チップ領域に真空蒸着法により光取出側電極9及び裏面電極20を形成し、さらに光取出側電極9上にボンディングパッド16を配置して、適当な温度で電極定着用のベーキングを施す。そして、このウェーハを各チップにダイシングし、裏面電極20をAgペースト等の導電性ペーストを用いて支持体を兼ねた図示しない端子電極に固着する一方、ボンディングパッド16と別の端子電極とにまたがる形態でAu製のワイヤ17をボンディングし、さらに樹脂モールドを形成することにより、発光素子100が得られる。なお、突起状露出部分を除去した後にもウェーハには柱状半導体欠陥部55が埋没残留する。この柱状半導体欠陥部55が存在しているチップは不良として除外することが可能である。しかし、不良はあくまで柱状半導体欠陥部55が残留しているチップに留まり、その周囲にクラックや貼り合せ不良領域が広がる事が無いので、チップ不良発生率を最小限に留めることが可能である。   Through the above steps, a semiconductor wafer for manufacturing a light emitting element is completed. Then, the light extraction side electrode 9 and the back electrode 20 are formed on each chip region of the semiconductor wafer for manufacturing the light emitting element by vacuum vapor deposition, and the bonding pad 16 is disposed on the light extraction side electrode 9 to obtain an appropriate temperature. Bake for electrode fixing. Then, the wafer is diced into chips, and the back electrode 20 is fixed to a terminal electrode (not shown) that also serves as a support using a conductive paste such as Ag paste, while straddling the bonding pad 16 and another terminal electrode. The light emitting element 100 is obtained by bonding the Au wire 17 in a form and further forming a resin mold. Even after the protrusion-like exposed portion is removed, the columnar semiconductor defect portion 55 remains buried in the wafer. A chip in which the columnar semiconductor defect 55 is present can be excluded as a defect. However, the defect remains only on the chip where the columnar semiconductor defect 55 remains, and no cracks or poor bonding areas are spread around it, so that the chip defect occurrence rate can be kept to a minimum.

本発明の適用対象となる発光素子の一例を積層構造にて示す模式図。The schematic diagram which shows an example of the light emitting element used as the application object of this invention by laminated structure. 図1の発光素子の製造工程を示す説明図。Explanatory drawing which shows the manufacturing process of the light emitting element of FIG. 図2に続く説明図。Explanatory drawing following FIG. 図3に続く説明図。Explanatory drawing following FIG. 図4に続く説明図。Explanatory drawing following FIG. 柱状半導体欠陥部の形成機構を模式的に示す説明図。Explanatory drawing which shows typically the formation mechanism of a columnar semiconductor defect part. 柱状半導体欠陥部の種々の形成形態を示す模式図。The schematic diagram which shows the various formation form of a columnar semiconductor defect part. 突起状突起状露出部分の除去方法の第一例を示す説明図。Explanatory drawing which shows the 1st example of the removal method of a protrusion-shaped protrusion-like exposed part. 同じく第二例を示す説明図。Explanatory drawing which similarly shows a 2nd example. 同じく第三例を示す説明図。Explanatory drawing which similarly shows a 3rd example. 本発明の発光素子製造用ウェーハの特徴部を拡大して示す模式図。The schematic diagram which expands and shows the characteristic part of the wafer for light emitting element manufacture of this invention. 従来の貼り合せ法の問題点を示す模式図。The schematic diagram which shows the problem of the conventional bonding method. 突起状突起状露出部分の除去方法の第四例を示す説明図。Explanatory drawing which shows the 4th example of the removal method of a protrusion-form protrusion-like exposed part.

符号の説明Explanation of symbols

1 n型GaAs単結晶基板 (成長用単結晶基板)
2 エッチストップ層
24 発光層部
7 電流拡散層
50 素子化対象層
51 突起状露出部分
55 柱状半導体欠陥部
60 化合物半導体成長層
70 非素子化部分
90 n型GaP単結晶基板(透明素子基板)
1 n-type GaAs single crystal substrate (single crystal substrate for growth)
DESCRIPTION OF SYMBOLS 2 Etch stop layer 24 Light emitting layer part 7 Current diffusion layer 50 Element-ization target layer 51 Projection-like exposed part 55 Columnar semiconductor defect part 60 Compound semiconductor growth layer 70 Non-element part 90 n-type GaP single crystal substrate (transparent element substrate)

Claims (13)

不透明の化合物半導体からなる成長用単結晶基板の第一主表面上に、発光層部を有する素子化対象層を含んだ化合物半導体成長層の少なくとも前記発光層部をMOVPE法によりエピタキシャル成長して中間積層体を得るMOVPE成長工程と、
前記中間積層体の、前記素子化対象層の第二主表面側に位置する前記成長用単結晶基板を含む非素子化部分を、少なくとも前記素子化対象層と接する部分を選択化学エッチングにより溶解する形で除去する基板除去工程と、
前記非素子化部分を除去後の前記素子化対象層の第二主表面に透明素子基板を貼り合わせ結合する貼り合わせ工程とがこの順序で実施されるとともに、
前記MOVPE成長工程において、前記素子化対象層と前記非素子化部分とに層厚方向にまたがる形で、前記素子化対象層の第二主表面を形成する化合物半導体とは異質の化合物半導体からなる柱状半導体欠陥部が形成されるとともに、前記基板除去工程後において前記素子化対象層の第二主表面に、前記選択化学エッチングにより溶解されずに残留した前記柱状半導体欠陥部の突起状露出部分を除去する突起除去工程を、前記貼り合わせ工程に先立って実施することを特徴とする発光素子の製造方法。
On the first main surface of the single crystal substrate for growth made of an opaque compound semiconductor, at least the light emitting layer portion of the compound semiconductor growth layer including the device target layer having the light emitting layer portion is epitaxially grown by the MOVPE method, and the intermediate lamination is performed. A MOVPE growth process to obtain a body;
The non-elementized portion including the single crystal substrate for growth located on the second main surface side of the elementization target layer of the intermediate laminate is dissolved by selective chemical etching at least a portion in contact with the elementization target layer. Removing the substrate in a form;
A bonding step of bonding and bonding a transparent element substrate to the second main surface of the elementization target layer after removing the non-elementized portion is performed in this order,
In the MOVPE growth step, the compound semiconductor that forms the second main surface of the elementalization target layer is formed of a different compound semiconductor so as to extend in the layer thickness direction between the elementalization target layer and the non-elementalization part. A columnar semiconductor defect portion is formed, and a protrusion-like exposed portion of the columnar semiconductor defect portion that remains after being dissolved by the selective chemical etching on the second main surface of the elementization target layer after the substrate removal step is formed. A method for manufacturing a light-emitting element, wherein a protrusion removing step to be removed is performed prior to the bonding step.
前記柱状半導体欠陥部は、前記化合物半導体成長層の原料有機金属ガスの分解により生じたIII族金属粒子が、成長中又は成長後の化合物半導体成長層上に落下して、当該化合物半導体成長層を合金化により溶解しつつ侵食し、その侵食孔内に生じた液相中に前記異質の化合物半導体を析出する形で形成されたものである請求項1記載の発光素子の製造方法。   In the columnar semiconductor defect portion, the group III metal particles generated by the decomposition of the source organic metal gas of the compound semiconductor growth layer fall on the compound semiconductor growth layer during or after the growth, and the compound semiconductor growth layer 2. The method for manufacturing a light-emitting element according to claim 1, wherein the light-emitting element is formed by eroding while being melted by alloying and depositing the foreign compound semiconductor in a liquid phase generated in the erosion hole. 前記成長用単結晶基板としてGaAs単結晶基板が使用され、前記発光層部を、組成式(AlGa1−xIn1−yP(ただし、0≦x≦1,0≦y≦1)にて表される化合物半導体のうち、GaAsと格子整合する組成を有する化合物半導体にて各々構成された第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有するものとして成長される請求項1又は請求項2に記載の発光素子の製造方法。 A GaAs single crystal substrate is used as the growth single crystal substrate, and the light emitting layer portion has a composition formula (Al x Ga 1-x ) y In 1-y P (where 0 ≦ x ≦ 1, 0 ≦ y ≦ Of the compound semiconductor represented by 1), the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer each composed of a compound semiconductor having a composition that lattice-matches with GaAs are stacked in this order. The method for manufacturing a light emitting device according to claim 1, wherein the light emitting device is grown as having a double hetero structure. 前記柱状半導体欠陥部をなす前記異質の化合物半導体は、前記発光層部よりもGa又はInの含有比率が高く、かつ、V族元素の主体がPからなる多結晶化合物半導体からなる請求項3記載の発光素子の製造方法。   4. The heterogeneous compound semiconductor forming the columnar semiconductor defect portion is made of a polycrystalline compound semiconductor having a Ga or In content ratio higher than that of the light emitting layer portion and having a group V element mainly composed of P. Of manufacturing the light-emitting device. 前記透明素子基板としてGaP単結晶が使用される請求項1ないし請求項4のいずれか1項に記載の発光素子の製造方法。   The method for manufacturing a light-emitting element according to claim 1, wherein a GaP single crystal is used as the transparent element substrate. 前記突起除去工程において前記突起状露出部分を機械研削処理により切除する請求項1ないし請求項5のいずれか1項に記載の発光素子の製造方法。   The method for manufacturing a light emitting element according to claim 1, wherein in the protrusion removal step, the protrusion-like exposed portion is cut out by a mechanical grinding process. 前記突起除去工程において前記突起状露出部分を、挟持治具により挟みつけた状態で折り取ることにより切除する請求項1ないし請求項5のいずれか1項に記載の発光素子の製造方法。   6. The method for manufacturing a light emitting element according to claim 1, wherein in the protrusion removing step, the protruding exposed portion is cut off by being folded in a state of being sandwiched by a sandwiching jig. 前記突起除去工程において前記突起状露出部分を、レーザー照射により焼き飛ばすことにより除去する請求項1ないし請求項5のいずれか1項に記載の発光素子の製造方法。   6. The method for manufacturing a light emitting element according to claim 1, wherein in the protrusion removing step, the protrusion-like exposed portion is removed by burning off by laser irradiation. 7. 前記突起除去工程において前記突起状露出部分を、ウォータージェットにより除去する請求項1ないし請求項5のいずれか1項に記載の発光素子の製造方法。   The method for manufacturing a light-emitting element according to claim 1, wherein the protrusion-like exposed portion is removed by a water jet in the protrusion removal step. 発光層部を有する化合物半導体からなる素子化対象層の第一主表面を部分的に覆う形で光取出側電極が形成される一方、該素子化対象層の第二主表面に透明素子基板が貼り合された構造を有するとともに、該素子化対象層の層厚方向途中位置から前記第二主表面に向けて、該素子化対象層の第二主表面を形成する化合物半導体とは異質の化合物半導体からなる柱状半導体欠陥部が、先端面が前記第二主表面と一致する形態にて形成され、前記透明素子基板の第一主表面が、前記柱状半導体欠陥部の先端面と前記第二主表面の当該先端面に連なる周縁領域との双方に接する形で密着結合されてなることを特徴とする発光素子製造用半導体ウェーハ。   While the light extraction side electrode is formed so as to partially cover the first main surface of the elementization target layer made of the compound semiconductor having the light emitting layer portion, the transparent element substrate is formed on the second main surface of the elementization target layer. A compound that has a bonded structure and is different from the compound semiconductor that forms the second main surface of the device target layer from the midpoint in the layer thickness direction of the device target layer toward the second main surface A columnar semiconductor defect portion made of a semiconductor is formed in a form in which a front end surface coincides with the second main surface, and a first main surface of the transparent element substrate is formed between the front end surface of the columnar semiconductor defect portion and the second main surface. A semiconductor wafer for manufacturing a light-emitting element, characterized in that the semiconductor wafer is tightly bonded so as to be in contact with both of the peripheral region connected to the tip surface of the surface. 前記発光層部が、組成式(AlGa1−xIn1−yP(ただし、0≦x≦1,0≦y≦1)にて表される化合物半導体のうち、GaAsと格子整合する組成を有する化合物半導体にて各々構成された第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有するものとして形成される請求項10記載の発光素子製造用半導体ウェーハ。 Among the compound semiconductors represented by the composition formula (Al x Ga 1-x ) y In 1-y P (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1), the light-emitting layer portion includes GaAs and a lattice. 11. The first conductive clad layer, the active layer, and the second conductive clad layer each formed of a compound semiconductor having a matching composition are formed as having a double heterostructure laminated in this order. The semiconductor wafer for light emitting element manufacture of description. 前記柱状半導体欠陥部をなす前記異質の化合物半導体は、前記発光層部よりもGa及びInの含有比率が高く、かつ、V族元素の主体がPからなる多結晶化合物半導体からなる請求項11記載の発光素子製造用半導体ウェーハ。   12. The heterogeneous compound semiconductor forming the columnar semiconductor defect portion is made of a polycrystalline compound semiconductor having a Ga and In content ratio higher than that of the light emitting layer portion and having a group V element mainly composed of P. Semiconductor wafer for manufacturing light emitting devices. 前記透明素子基板がGaP単結晶からなる請求項10ないし請求項12のいずれか1項に記載の発光素子製造用半導体ウェーハ。   The semiconductor wafer for manufacturing a light emitting element according to claim 10, wherein the transparent element substrate is made of a GaP single crystal.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010027913A (en) * 2008-07-22 2010-02-04 Shin Etsu Handotai Co Ltd Method for fabricating light emitting element and light emitting element
JP2011091103A (en) * 2009-10-20 2011-05-06 Shin Etsu Handotai Co Ltd Light-emitting element
JP2012080057A (en) * 2010-09-09 2012-04-19 Shin Etsu Handotai Co Ltd Light-emitting element and manufacturing method for light-emitting element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010027913A (en) * 2008-07-22 2010-02-04 Shin Etsu Handotai Co Ltd Method for fabricating light emitting element and light emitting element
JP2011091103A (en) * 2009-10-20 2011-05-06 Shin Etsu Handotai Co Ltd Light-emitting element
JP2012080057A (en) * 2010-09-09 2012-04-19 Shin Etsu Handotai Co Ltd Light-emitting element and manufacturing method for light-emitting element

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