CN1965407B - 图像传感器的金属互连 - Google Patents

图像传感器的金属互连 Download PDF

Info

Publication number
CN1965407B
CN1965407B CN2005800181947A CN200580018194A CN1965407B CN 1965407 B CN1965407 B CN 1965407B CN 2005800181947 A CN2005800181947 A CN 2005800181947A CN 200580018194 A CN200580018194 A CN 200580018194A CN 1965407 B CN1965407 B CN 1965407B
Authority
CN
China
Prior art keywords
metal
substrate
copper
conducting element
sealing ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2005800181947A
Other languages
English (en)
Other versions
CN1965407A (zh
Inventor
L·谭
H·J·埃尔哈德特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omnivision Technologies Inc
Original Assignee
Omnivision Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omnivision Technologies Inc filed Critical Omnivision Technologies Inc
Publication of CN1965407A publication Critical patent/CN1965407A/zh
Application granted granted Critical
Publication of CN1965407B publication Critical patent/CN1965407B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

一种集成电路包括:衬底;跨越形成衬底的保护边界的衬底外围的密封元件;在保护边界内含有的至少两个独立的层中的多条跨越衬底的铜线;置于密封元件外的第一导电元件,以及一个或多个第二导电元件,所述第二导电元件连接所述铜线中的至少两条并跨越密封元件;其中,所述导电元件是基本上无氧化的抗氧化金属且将所述金属线与第一导电元件相连接。

Description

图像传感器的金属互连
技术领域
本发明一般涉及图像传感器的金属互连领域,更具体地,涉及这样一种互连,其由铜制成并且经由抗蚀金属连接到密封圈外的电路。
背景技术
图像传感器包括具有多个像素的衬底。每个像素通常包括将入射光转变成电荷包的光敏区域。一个或多个晶体管连接到该光敏区域,以用于多种目的,例如,从中传送电荷、对可能在成像区域外的电荷包进行信号处理。这些晶体管中的每一个都连接到使其能够按需要工作的电压源。多条总线将这些晶体管连接到电压源。
这些总线通常彼此层叠,并且通过电连接、通路以及预接触连接到一起,并且它们最终穿过内部密封圈到达外部焊盘。晶片管芯上的这些外部焊盘最终连接到封装引线以形成电连接。
通常,总线由铝(Al)或铜(Cu)制成。然而,在密封圈外部延伸铜,会把铜暴露于空气等,这使得铜被氧化。铝暴露在空气中时,比较不容易氧化,然而,其导电性不如铜。
因此,需要这样一种图像传感器,其使用铜来实现电连接,但是也能够避免铜暴露于空气中时被氧化。
发明内容
本发明的目的是克服一个或多个上述问题。简而言之,根据本发明的一个方面,本发明提供了一种集成电路,其具有:衬底;密封元件,其跨越形成衬底边界的衬底外围;跨越衬底的两条金属线,位于至少两个包含在所述边界中的不同的层中;第一导电元件,置于密封元件外;以及一个或多个第二导电元件,用于连接所述两条金属线并且跨越所述密封元件;其中,所述导电元件是基本上无氧化的抗氧化金属,且将所述金属线连接到第一导电元件。
通过参考附图阅读以下对优选实施例以及所附权利要求的详细描述,本发明的这些和其它方面、目的、特征和优点将更容易理解和把握。
本发明的优点在于在密封圈内部使用铜,而不将其延伸到密封圈外。相反,在密封圈外使用通路或者预接触中的抗腐蚀金属,例如钨。
附图说明
图1是本发明的典型晶体管的横截面视图;
图2是将晶体管连接到外部电路的金属互连的侧视图。
具体实施方式
在论述本发明之前,有必要论述在此使用的一些术语。在这一点上,预接触是半导体衬底和紧接其上的金属层之间的电连接,金属1。通路是相邻金属线之间的电连接,例如金属1和金属2之间的电连接。应当进一步注意,源、栅和漏分别具有各自的预接触和各自的金属层。例如,源将具有其自己的预接触,金属1、金属2、金属3和金属4,栅将具有其自己的预接触,金属1、金属2、金属3和金属4。即使每一个都具有金属层1等,也应当注意,它们是彼此不同的,并且1表示其为紧接衬底上方的金属层。
参考图1和图2,示出了本发明的CMOS集成电路(IC)芯片5的截面侧视图。该CMOS(互补金属氧化物半导体)IC包括多个MOSFET晶体管,每一个具有栅极端子10、源极端子11和漏极端子12。(图2示出了可用于源极、漏极或栅极端子的接触13和金属层的说明)。为了完全起见,需要注意图像传感器IC也包括接收入射光的多个光电二极管3,入射光在光电二极管中表现为电荷包,这在现有技术中是已知的。
为了形成电连接,栅极10通过预接触13g连接到金属1(17g),同时半导体衬底14中剩余的重掺杂源区11和漏区12通过它们的预接触13s和13d连接到金属1(17s、17d)。栅电极10下的半导体中的沟道区15将源11和漏12分开。沟道15是轻掺杂的,掺杂类型与源11和漏12的掺杂类型相反。该半导体也通过栅极介电层16(例如SiO2/Si3N4)与栅电极10物理分开。为了增加信号和功率,路由金属层17、18、19和20对于使得在模块之间路由(尤其是自动路由)逻辑信号变得容易是重要的,并且改善了模块的功率和时钟分布。通过额外的金属层18、19和20实现改进的路由能力。对于所有CMOS IC,以及图像传感器(CMOS和CCD),多个互连金属17、18、19和20变得几乎是必需的了。
每个相邻的金属层17、18、19和20被中间隔离层21分开,并且它们的电连接通过通路22和预接触13实现。通路22和预接触13使用一些台阶覆盖较好的金属材料沉积,例如钨(W)等,其也是抗腐蚀的。为了提高高速性能,尤其是半导体尺寸减小到深亚微米(例如小于0.18微米的CMOS或其它CCD技术)时,铜(Cu)金属17、18、19由于其更高的电导率、更低的薄层电阻以及更低的成本,已经扮演了代替传统铝(Al)的重要角色。然而,缺点是Cu容易被氧化和侵蚀。
参考图2,为了使得基于Cu的IC产品适合晶片级芯片尺度封装(CSP),所有邻近管芯5的外围的非基于铜的金属层(例如金属层4(20)和通路22,以及预接触13)都伸长23、24、25、26和27,使得其形成延伸经过管芯5的外围(内部密封圈28)的壁状延伸物。这些伸长的金属层23,通路24、25、26,以及预接触27,允许导体电连接到焊盘29,而不将铜(Cu)金属17、18、19延伸经过管芯5的内部环28,铜(Cu)金属17、18、19延伸经过管芯5的内环28会将导体暴露于环境,尤其是空气,这可能引起腐蚀与/或容易被氧化。通路22、24、25、26和预接触13、27由抗腐蚀材料制成,例如抗腐蚀的钨。除了例如顶部金属层4(20)之外,互连金属层17、18、19通常由铜制成。本发明将提供引线和CSP焊盘29延伸金属之间的稳固连接。本发明也可应用于,例如在IC工业中可能使用晶片级CSP技术的、具有基于铜(Cu)的互连金属层17、18、19的所有CMOS IC和CCD图像传感器产品。
部件列表
10栅极
11源
12漏
13预接触
17金属层1
18金属层2
19金属层3
20金属层4
21隔离层

Claims (2)

1.一种晶片上集成电路管芯,该管芯包括:
(a)衬底;
(b)密封圈,垂直于衬底并跨过衬底的一部分放置,其中第一导电元件横向地置于该密封圈外部并在该密封圈的第一侧上;
(c)两条金属线,二者都平行于衬底放置在与所述第一侧相对的所述密封圈的第二侧上,其中这两条金属线在两个不同的层中跨过衬底;
(d)第二导电元件,由抗氧化并且放置在所述两条金属线的两个不同的层之间的金属形成,其中该第二导电元件跨过衬底的一部分并且延伸经过所述密封圈以将所述两条金属线连接到所述第一导电元件。
2.如权利要求1所述的管芯,其中所述金属是钨。
CN2005800181947A 2004-06-04 2005-06-02 图像传感器的金属互连 Active CN1965407B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US57703604P 2004-06-04 2004-06-04
US60/577,036 2004-06-04
US11/048,975 2005-02-02
US11/048,975 US8072066B2 (en) 2004-06-04 2005-02-02 Metal interconnects for integrated circuit die comprising non-oxidizing portions extending outside seal ring
PCT/US2005/019429 WO2005122255A1 (en) 2004-06-04 2005-06-02 Metal interconnects for image sensors

Publications (2)

Publication Number Publication Date
CN1965407A CN1965407A (zh) 2007-05-16
CN1965407B true CN1965407B (zh) 2011-11-30

Family

ID=35446790

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2005800181947A Active CN1965407B (zh) 2004-06-04 2005-06-02 图像传感器的金属互连

Country Status (8)

Country Link
US (1) US8072066B2 (zh)
EP (1) EP1751799B1 (zh)
JP (1) JP4856064B2 (zh)
KR (1) KR101210176B1 (zh)
CN (1) CN1965407B (zh)
DE (1) DE602005027688D1 (zh)
TW (1) TWI385756B (zh)
WO (1) WO2005122255A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10790272B2 (en) * 2017-08-02 2020-09-29 Qualcomm Incorporated Manufacturability (DFM) cells in extreme ultra violet (EUV) technology

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6300223B1 (en) * 1996-12-12 2001-10-09 Winbond Electronics Corp. Method of forming die seal structures having substrate trenches
US6365958B1 (en) * 1998-02-06 2002-04-02 Texas Instruments Incorporated Sacrificial structures for arresting insulator cracks in semiconductor devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617656A (ja) * 1984-06-22 1986-01-14 Toshiba Corp マルチチップパッケ−ジ
KR100205301B1 (ko) * 1995-12-26 1999-07-01 구본준 금속배선구조 및 형성방법
JP2000232104A (ja) * 1999-02-09 2000-08-22 Sanyo Electric Co Ltd チップサイズパッケージ
US6521975B1 (en) * 1999-05-20 2003-02-18 Texas Instruments Incorporated Scribe street seals in semiconductor devices and method of fabrication
TW517267B (en) * 2001-08-20 2003-01-11 Taiwan Semiconductor Mfg Manufacturing method of sealing ring having electrostatic discharge protection
US20030089997A1 (en) * 2001-11-09 2003-05-15 Egon Mergenthaler Tiedowns connected to kerf regions and edge seals
JP3865636B2 (ja) * 2002-01-09 2007-01-10 松下電器産業株式会社 半導体装置および半導体チップ
US6861754B2 (en) * 2003-07-25 2005-03-01 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device with anchor type seal ring
US7053453B2 (en) * 2004-04-27 2006-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate contact and method of forming the same
US7223673B2 (en) * 2004-07-15 2007-05-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing semiconductor device with crack prevention ring
US20060267154A1 (en) * 2005-05-11 2006-11-30 Pitts Robert L Scribe seal structure for improved noise isolation
US7224042B1 (en) * 2005-06-29 2007-05-29 Actel Corporation Integrated circuit wafer with inter-die metal interconnect lines traversing scribe-line boundaries

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6300223B1 (en) * 1996-12-12 2001-10-09 Winbond Electronics Corp. Method of forming die seal structures having substrate trenches
US6365958B1 (en) * 1998-02-06 2002-04-02 Texas Instruments Incorporated Sacrificial structures for arresting insulator cracks in semiconductor devices

Also Published As

Publication number Publication date
TW200614423A (en) 2006-05-01
TWI385756B (zh) 2013-02-11
EP1751799A1 (en) 2007-02-14
KR20070031320A (ko) 2007-03-19
JP2008502155A (ja) 2008-01-24
US20050269706A1 (en) 2005-12-08
DE602005027688D1 (de) 2011-06-09
WO2005122255A1 (en) 2005-12-22
JP4856064B2 (ja) 2012-01-18
EP1751799B1 (en) 2011-04-27
KR101210176B1 (ko) 2012-12-07
CN1965407A (zh) 2007-05-16
US8072066B2 (en) 2011-12-06

Similar Documents

Publication Publication Date Title
CN101221939B (zh) 光电装置封装结构及其制造方法
US8361898B2 (en) Bonding pad structure for back illuminated optoelectronic device and fabricating method thereof
US9472591B2 (en) Semiconductor image pickup device
US8564034B2 (en) Solid-state imaging device
US20130181349A1 (en) Semiconductor device having through-substrate via
US7372089B2 (en) Solid-state image sensing device
CN100463206C (zh) 固体摄像器件
CN103378113A (zh) 图像传感器的制造方法
CN1965407B (zh) 图像传感器的金属互连
CN102856329A (zh) 一种硅通孔封装方法
JP2903812B2 (ja) 固体撮像装置
US20090045502A1 (en) Chip scale package with through-vias that are selectively isolated or connected to the substrate
US20220310692A1 (en) Charge release layer to remove charge carriers from dielectric grid structures in image sensors
CN108183114A (zh) 背照式图像传感器及其形成方法
CN101814518B (zh) 固态成像元件及其驱动方法
JP2008193050A (ja) 固体撮像装置および撮像装置
KR100571948B1 (ko) 반도체 집적 장치 및 그 제조 방법
JP2003188368A (ja) 固体撮像装置の製造方法
JPH10335627A (ja) 固体撮像装置
JP2007214194A (ja) 固体撮像装置および固体撮像装置の製造方法
JP2007103852A (ja) 半導体装置およびその製造方法
JP2004158550A (ja) 半導体装置、及び半導体装置の製造方法
JPH0488676A (ja) 固体撮像素子

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: FULL VISION TECHNOLOGY CO., LTD.

Free format text: FORMER OWNER: EASTMAN KODAK COMPANY (US) 343 STATE STREET, ROCHESTER, NEW YORK

Effective date: 20110706

C41 Transfer of patent application or patent right or utility model
COR Change of bibliographic data

Free format text: CORRECT: ADDRESS; FROM: NEW YORK STATE, THE USA TO: CALIFORNIA STATE, THE USA

TA01 Transfer of patent application right

Effective date of registration: 20110706

Address after: California, USA

Applicant after: Full Vision Technology Co., Ltd.

Address before: American New York

Applicant before: Eastman Kodak Co.

C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: California, USA

Patentee after: OmniVision Technologies, Inc.

Address before: California, USA

Patentee before: Full Vision Technology Co., Ltd.

CP01 Change in the name or title of a patent holder