CN1948973A - Method and circuit of obtaining wave shape trigger signal of oscilloscope - Google Patents

Method and circuit of obtaining wave shape trigger signal of oscilloscope Download PDF

Info

Publication number
CN1948973A
CN1948973A CN 200610063314 CN200610063314A CN1948973A CN 1948973 A CN1948973 A CN 1948973A CN 200610063314 CN200610063314 CN 200610063314 CN 200610063314 A CN200610063314 A CN 200610063314A CN 1948973 A CN1948973 A CN 1948973A
Authority
CN
China
Prior art keywords
signal
triggering level
wave shape
latch
digital comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200610063314
Other languages
Chinese (zh)
Other versions
CN100578232C (en
Inventor
史松涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN200610063314A priority Critical patent/CN100578232C/en
Publication of CN1948973A publication Critical patent/CN1948973A/en
Application granted granted Critical
Publication of CN100578232C publication Critical patent/CN100578232C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses oscilloscope obtaining waveform trigger signal method and circuit. The method includes the following steps: real time sampling for the trigger source signal to gain waveform digital signal; setting trigger level and storing it in trigger level register; using digital comparator to compare waveform digital signal with trigger level to gain compared impulse; using latch to store rising edge or falling edge of the compared impulse to gain waveform trigger signal. It has the advantages of simple circuit, precise and reliable gained waveform trigger signal, low circuit cost etc.

Description

The Method and circuits of obtaining wave shape trigger signal of oscilloscope
Technical field
The present invention relates to the oscillograph technology, relate in particular to the method and a kind of circuit that produces wave shape trigger signal that obtain wave shape trigger signal in the oscillograph.
Background technology
Oscillograph is widely used in each technical field, and develops to the digital circuit direction gradually from original mimic channel mode, and the volume that has of digital circuit urinates in carrying, and the circuit performance excellence more and more wins people's favor.No matter and be analog oscilloscope or digital oscilloscope circuit, obtain wave shape trigger signal and be necessary means and process that oscillograph realizes showing synchronously and stably tested waveform.
The oscillograph of prior art adopts Method and circuits as shown in Figure 1 to obtain wave shape trigger signal.At first adopt mechanical switch or electronic switch to switch and select the triggering source, promptly selecting A channel or the measured signal of B passage as required still is the triggering source of external signal as wave shape trigger signal, and adopt mechanical switch or electronic switch switching signal coupling channel, select triggering source coupling scheme; Because the trigger signal source difference of selecting for use; its signal amplitude, frequency, input impedance are also different, therefore need to use the amplifier that has than high input impedance and input protection circuit, strong overload capacity and enough bandwidth that trigger source signal is amplified to certain amplitude.In order to obtain wave shape trigger signal, also adjustable triggering level to be arranged, prior art is generally produced different data and sends digital to analog converter (D/A converter) to by data line according to user demand control by CPU, exports corresponding different DC level as triggering comparative level by D/A converter; At last, trigger source signal and triggering comparative level produce the square wave trigger pip with certain amplitude by a comparer and shaping circuit.
As can be seen from the above description, select triggering source and the source of triggering coupling scheme owing to will adopt mechanical switch or electronic switch to switch, and signaling switch must satisfy the bandwidth and the amplitude requirement of signal, therefore the device that uses is many and to the requirement on devices height; Because comparer produces wave shape trigger signal by two simulating signals are compared, the circuit devcie that trigger source signal is handled is to work under emulation mode always, therefore to the requirement height of device, be difficult to guarantee the consistance of device performance, cause the circuit consistance poor; And, be easy to occur the problem of phase mutual interference between the signal source owing to the flow process complexity of signal.
Summary of the invention
Technical matters to be solved by this invention is: a kind of Method and circuits that obtains wave shape trigger signal is provided, uses this Method and circuits on oscillograph, can obtain wave shape trigger signal simple and direct, reliably, and circuit cost is low.
The present invention solves the problems of the technologies described above the technical scheme that is adopted to be:
A kind of method of obtaining wave shape trigger signal may further comprise the steps:
A, at least one trigger source signal is set;
B, one trigger source signal is carried out real-time sampling, obtain waveform digital signal with A/D converter; Set triggering level, and triggering level is deposited with in the triggering level register;
C, employing digital comparator compare in real time to described waveform digital signal and triggering level, obtain relatively pulse in real time;
D, utilize latch that the rising edge or the negative edge of described relatively pulse are latched, obtain wave shape trigger signal;
E, before new round sampling beginning, remove described latch by a control signal, make latch put 0.
Described method, wherein: described step C comprises following processing: it is identical with the figure place of described A/D converter and triggering level register that described digital comparator is set, when the waveform digital signal of A/D converter output during more than or equal to triggering level, digital comparator is output as high level, when the waveform digital signal of A/D converter output during less than triggering level, digital comparator is output as low level, obtains relatively pulse in real time.
Described method, wherein: described triggering level is set according to user demand by the CPU of system of Oscillograph.
Described method, wherein: described system CPU is regulated triggering level by the data content of rewriting the triggering level register; Described control signal is produced by system CPU.
Described method, wherein: when trigger source signal when being a plurality of, described method is obtained the wave shape trigger signal of the different trigger source signal of a plurality of correspondences according to step B, C, D, E, and selects wherein a wave shape trigger signal as the wave shape trigger signal of current use by system CPU control.
A kind of wave shape trigger signal circuit that obtains comprises system CPU, and system's A/D converter, and described system A/D converter is used for trigger source signal is carried out real-time sampling, obtains waveform digital signal; Also comprise
One is used to deposit the triggering level register of triggering level, and this register is connected with described system CPU, and described system CPU changes triggering level by the content of rewriting the triggering level register;
A digital comparator that is connected with the triggering level register with described A/D converter respectively, described digital comparator is used for waveform digital signal and triggering level are compared, and obtains the comparison pulse;
A latch that is connected with described digital comparator, described latch latchs the rising or the negative edge of relatively pulse, obtains wave shape trigger signal.
Described circuit, wherein: described latch is connected with system CPU, before new sampling begins, sends a control signal by system CPU and removes described latch, makes latch output zero setting.
Described circuit, wherein: described digital comparator is identical with the figure place of described A/D converter and triggering level register.
Described circuit, wherein: described digital comparator links to each other with the global clock signal of system, and described global clock signal is used for the output signal of real-time sampling digital comparator.
Described circuit, wherein: described triggering level register, digital comparator and latch are arranged in the fpga chip, and described global clock signal is produced by the phase locked-loop unit in the fpga chip.
Beneficial effect of the present invention is: because the present invention adopts the digital processing mode to obtain wave shape trigger signal, its method is simple and direct, has simplified circuit structure, has the wave shape trigger signal of obtaining simultaneously accurately, reliably, the advantage that circuit cost is low; And realize because the adjusting of triggering level changes the triggering level content of registers by system CPU, thus the selection of trigger pip and control procedure is simple, easily.
Description of drawings
Fig. 1 obtains the circuit block diagram of wave shape trigger signal for prior art;
Fig. 2 obtains the circuit block diagram of wave shape trigger signal for the present invention;
Fig. 3 is a comparer course of work synoptic diagram of the present invention.
Embodiment
With embodiment the present invention is described in further detail with reference to the accompanying drawings below:
Main thought of the present invention is with the digital mode processing signals, all converts oscillograph trigger source signal and triggering level to digital signal, and by digital comparator they is compared, and produces real-time digital trigger signal.
The circuit that obtains wave shape trigger signal as shown in Figure 2, CPU and A/D converter are the intrinsic circuit of digital oscilloscope system among the figure, A/D converter is used for trigger source signal is carried out real-time sampling, obtain waveform digital signal, trigger source signal can have a plurality of in the oscillograph, as trigger source signal, or external signal is as trigger source signal as the measured signal of A channel or B passage, and A/D converter only carries out real-time sampling to one of them trigger source signal.With the exception of this, obtain the wave shape trigger signal circuit and also comprise a triggering level register, this register is used to deposit triggering level, and register is connected with system CPU, the size of triggering level is controlled by system CPU, system CPU changes the triggering level value according to user demand by the content of rewriting the triggering level register, this shows, the control of triggering level is become very easy.A digital comparator that is connected with the triggering level register with A/D converter respectively, digital comparator is identical with the figure place of A/D converter and triggering level register, the port of digital comparator delivered to waveform digital signal and triggering level respectively by A/D converter and triggering level register, in digital comparator, compare, thereby obtain a string relatively pulse.Can be well understood to very much the course of work of digital comparator from Fig. 3, the figure place of supposing digital comparator, A/D converter, triggering level register three all is 4, and the triggering level data are set is 2, according to the digital comparator principle as can be known, when the waveform digital signal of A/D converter output during less than triggering level 2, digital comparator is output as low level " 0 ", when the waveform digital signal of A/D converter output during more than or equal to triggering level 2, digital comparator is output as high level " 1 ", obtains a string relatively pulse thus.For the output noise of filtering digital comparator, also adopt the output signal of the global clock signal real-time sampling digital comparator of system of Oscillograph.
Obtain the wave shape trigger signal circuit and also comprise a latch that is connected with digital comparator, latch latchs the rising or the negative edge of relatively pulse, promptly when rising edge that compares pulse or decline arrival, latches high level ' 1 ' signal finally obtains the wave shape trigger signal with a rising edge (or negative edge).Simultaneously, latch is controlled by system CPU, before new sampling begins, sends a control signal by system CPU and removes described latch, makes latch output put 0, so that wait for new trigger pip.Preferred implementation of the present invention is that latch latchs the rising edge of relatively pulse, finally obtains the wave shape trigger signal with a rising edge.The principle of work of latch and circuit structure are those skilled in the art to be known, and does not repeat them here.
In order to satisfy the demand on using, oscillograph need switch the wave shape trigger signal that obtains to derive from different trigger source signal.For the present invention, a plurality of trigger source signal that the corresponding oscillograph of the present invention is provided with are provided with multichannel and obtain the wave shape trigger signal circuit, every road obtain the wave shape trigger signal circuit to the trigger source signal of correspondence carry out real-time sampling, waveform digital signal that sampling is obtained compares and latchs with triggering level, obtain wave shape trigger signal that should trigger source signal, system CPU respectively obtains the wave shape trigger signal circuit by control, selects and switch to obtain required trigger pip.Therefore this shows that the present invention no longer needs electronics or mechanical switch to switch and selects the triggering source, the selection of trigger pip and control procedure are become very simple, easily, and be easy to integratedly, help reducing system cost, reduced volume.
Because what circuit of the present invention adopted all is digital units, the programmable logic device (PLD) that can utilize digital oscilloscope is integrated into triggering level register, digital comparator and the latch on each road in the programmable logic device (PLD), as be arranged in the fpga chip, the clock signal is produced by the phase locked-loop unit in the fpga chip, the content of its triggering level register by system CPU by reading and writing with the data communication bus of FPGA, so, reduce cost significantly, also improved reliability of products simultaneously.
Should be understood that, for those of ordinary skills, can be equal to replacement or change according to technical scheme of the present invention and design thereof, and all these changes or replacement all should belong to the protection domain of the appended claim of the present invention.

Claims (10)

1, a kind of method of obtaining wave shape trigger signal may further comprise the steps:
A, at least one trigger source signal is set;
B, one trigger source signal is carried out real-time sampling, obtain waveform digital signal with A/D converter; Set triggering level, and triggering level is deposited with in the triggering level register;
C, employing digital comparator compare in real time to described waveform digital signal and triggering level, obtain relatively pulse in real time;
D, utilize latch that the rising edge or the negative edge of described relatively pulse are latched, obtain wave shape trigger signal;
E, before new round sampling beginning, remove described latch by a control signal, make latch put 0.
2, method according to claim 1, it is characterized in that: described step C comprises following processing: it is identical with the figure place of described A/D converter and triggering level register that described digital comparator is set, when the waveform digital signal of A/D converter output during more than or equal to triggering level, digital comparator is output as high level, when the waveform digital signal of A/D converter output during less than triggering level, digital comparator is output as low level, obtains relatively pulse in real time.
3, method according to claim 2 is characterized in that: described triggering level is set according to user demand by the CPU of system of Oscillograph.
4, method according to claim 3 is characterized in that: described system CPU is regulated triggering level by the data content of rewriting the triggering level register; Described control signal is produced by system CPU.
5, method according to claim 2, it is characterized in that: when trigger source signal when being a plurality of, described method is obtained the wave shape trigger signal of the different trigger source signal of a plurality of correspondences according to step B, C, D, E, and selects wherein a wave shape trigger signal as the wave shape trigger signal of current use by system CPU control.
6, a kind of wave shape trigger signal circuit that obtains comprises system CPU, and system's A/D converter, and described system A/D converter is used for trigger source signal is carried out real-time sampling, obtains waveform digital signal; It is characterized in that: also comprise
One is used to deposit the triggering level register of triggering level, and this register is connected with described system CPU, and described system CPU changes triggering level by the content of rewriting the triggering level register;
A digital comparator that is connected with the triggering level register with described A/D converter respectively, described digital comparator is used for waveform digital signal and triggering level are compared, and obtains the comparison pulse;
A latch that is connected with described digital comparator, described latch latchs the rising or the negative edge of relatively pulse, obtains wave shape trigger signal.
7, circuit according to claim 6 is characterized in that: described latch is connected with system CPU, before new sampling begins, sends a control signal by system CPU and removes described latch, makes latch output zero setting.
8, circuit according to claim 7 is characterized in that: described digital comparator is identical with the figure place of described A/D converter and triggering level register.
9, circuit according to claim 8 is characterized in that: described digital comparator links to each other with the global clock signal of system, and described global clock signal is used for the output signal of real-time sampling digital comparator.
10, according to the described circuit of the arbitrary claim of claim 6 to 9, it is characterized in that: described triggering level register, digital comparator and latch are arranged in the fpga chip, and described global clock signal is produced by the phase locked-loop unit in the fpga chip.
CN200610063314A 2006-10-26 2006-10-26 Method and circuit of obtaining wave shape trigger signal of oscilloscope Expired - Fee Related CN100578232C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200610063314A CN100578232C (en) 2006-10-26 2006-10-26 Method and circuit of obtaining wave shape trigger signal of oscilloscope

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200610063314A CN100578232C (en) 2006-10-26 2006-10-26 Method and circuit of obtaining wave shape trigger signal of oscilloscope

Publications (2)

Publication Number Publication Date
CN1948973A true CN1948973A (en) 2007-04-18
CN100578232C CN100578232C (en) 2010-01-06

Family

ID=38018549

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200610063314A Expired - Fee Related CN100578232C (en) 2006-10-26 2006-10-26 Method and circuit of obtaining wave shape trigger signal of oscilloscope

Country Status (1)

Country Link
CN (1) CN100578232C (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100504400C (en) * 2007-09-11 2009-06-24 电子科技大学 Oscilloscope high speed signal reconstruction method
CN101068264B (en) * 2007-07-20 2011-02-16 北京中星微电子有限公司 Signal collecting device in USB test and USB signal testing method
CN102147426A (en) * 2010-11-18 2011-08-10 电子科技大学 Broadband triggering circuit of digital oscilloscope
CN103439648A (en) * 2013-08-08 2013-12-11 北京华大信安科技有限公司 Validation method, validation device and chip
CN105548641A (en) * 2015-12-15 2016-05-04 大豪信息技术(威海)有限公司 Waveform triggering device and method and oscilloscope for waveform triggering
CN106053908A (en) * 2016-07-06 2016-10-26 电子科技大学 Analog-to-digital signal conversion device of digital oscilloscope
CN106568996A (en) * 2016-11-17 2017-04-19 中国电子科技集团公司第四十研究所 High-efficiency low-distortion digital oscilloscope training signal generation circuit and method
CN110446936A (en) * 2018-03-05 2019-11-12 深圳市汇顶科技股份有限公司 Waveform signal detection method and device
CN110501546A (en) * 2019-07-31 2019-11-26 苏州浪潮智能科技有限公司 A kind of oscillograph
CN111487447A (en) * 2020-05-09 2020-08-04 深圳市鼎阳科技股份有限公司 Digital oscilloscope for realizing rapid measurement
CN113777376A (en) * 2021-09-27 2021-12-10 广东工业大学 Oscilloscope triggering system and oscilloscope triggering method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103901243B (en) * 2012-12-25 2018-09-25 北京普源精电科技有限公司 A kind of oscillograph with high triggering precision

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101068264B (en) * 2007-07-20 2011-02-16 北京中星微电子有限公司 Signal collecting device in USB test and USB signal testing method
CN100504400C (en) * 2007-09-11 2009-06-24 电子科技大学 Oscilloscope high speed signal reconstruction method
CN102147426A (en) * 2010-11-18 2011-08-10 电子科技大学 Broadband triggering circuit of digital oscilloscope
CN102147426B (en) * 2010-11-18 2013-01-16 电子科技大学 Broadband triggering circuit of digital oscilloscope
CN103439648A (en) * 2013-08-08 2013-12-11 北京华大信安科技有限公司 Validation method, validation device and chip
CN103439648B (en) * 2013-08-08 2016-05-04 北京华大信安科技有限公司 A kind of verification method, device and chip
CN105548641A (en) * 2015-12-15 2016-05-04 大豪信息技术(威海)有限公司 Waveform triggering device and method and oscilloscope for waveform triggering
CN106053908A (en) * 2016-07-06 2016-10-26 电子科技大学 Analog-to-digital signal conversion device of digital oscilloscope
CN106568996A (en) * 2016-11-17 2017-04-19 中国电子科技集团公司第四十研究所 High-efficiency low-distortion digital oscilloscope training signal generation circuit and method
CN106568996B (en) * 2016-11-17 2019-03-05 中国电子科技集团公司第四十一研究所 A kind of efficient low distortion digital oscilloscope training signal generating circuit and method
CN110446936A (en) * 2018-03-05 2019-11-12 深圳市汇顶科技股份有限公司 Waveform signal detection method and device
CN110501546A (en) * 2019-07-31 2019-11-26 苏州浪潮智能科技有限公司 A kind of oscillograph
CN111487447A (en) * 2020-05-09 2020-08-04 深圳市鼎阳科技股份有限公司 Digital oscilloscope for realizing rapid measurement
CN113777376A (en) * 2021-09-27 2021-12-10 广东工业大学 Oscilloscope triggering system and oscilloscope triggering method
CN113777376B (en) * 2021-09-27 2024-03-22 广东工业大学 Triggering system and triggering method of oscilloscope

Also Published As

Publication number Publication date
CN100578232C (en) 2010-01-06

Similar Documents

Publication Publication Date Title
CN1948973A (en) Method and circuit of obtaining wave shape trigger signal of oscilloscope
CN2896368Y (en) Multi-channel data synchronous collecting card based on PXI/compactPCI
CN1682203A (en) Flexible interface for universal bus test instrument
CN101009487A (en) Cross-clock domain asynchronous data processing, cross-clock domain method of the asynchronous data, and its device
CN103018512B (en) A kind of oscillograph with external trigger function
US20050122169A1 (en) Class D amplifier
WO2018120612A1 (en) Data sampling method, chip and computer storage medium
CN103592881A (en) Multi-path signal synchronous sampling control circuit based on FPGA
CN100527267C (en) Method and apparatus for reading and sampling data of DDR and DDR2 memory controller
CN114128146A (en) Circuit and method for calibrating circuit in integrated circuit device
CN101030783A (en) Duty-ratio calibrating circuit for flow-line modulus converter
CN102480296B (en) Analog-to-digital converter, sound processing device, and analog-to-digital conversion method
CN104518755A (en) Digital circuit noise filter and digital filtering method
US7183831B2 (en) Clock switching circuit
CN1175575C (en) Method and device for reducing digital switching noise in mixed isgnal IC's
CN112017702A (en) Memory interface circuit, PHY chip and processor
CN111007770A (en) Waveform generation and recovery system
CN1767390A (en) Multipath clock detecting device
CN204086871U (en) A kind of multiple signals synchronous sampling control circuit based on FPGA
CN111211774A (en) Bounce removing circuit
CN101063893A (en) Early hss rx data sampling
CN102420664B (en) Simulation system of noise signal for carrier test of low-voltage power line
US12028232B2 (en) Systems and methods for timing a signal
CN208092129U (en) A kind of amplitude versus frequency characte tester based on FPGA and ARM
CN103618552B (en) A kind of system and method that analog signal sampling is realized based on high-speed bus

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
DD01 Delivery of document by public notice

Addressee: Shi Songtao

Document name: Notification of Passing Examination on Formalities

DD01 Delivery of document by public notice

Addressee: Shi Songtao

Document name: Notification to Pay the Fees

DD01 Delivery of document by public notice

Addressee: Shi Songtao

Document name: Notification of Termination of Patent Right

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100106

Termination date: 20121026