CN208092129U - A kind of amplitude versus frequency characte tester based on FPGA and ARM - Google Patents

Abstract

The utility model is related to a kind of amplitude versus frequency characte testers based on FPGA and ARM, belong to digital frequency response fields of measurement.The tester includes FPGA, D/A converter, low-pass filter, tested network, programme-controlled gain amplifying circuit, A/D converter, processor module and human-computer interaction module, wherein：FPGA, D/A converter, low-pass filter and tested network are linked in sequence, and FPGA, A/D converter, programme-controlled gain amplifying circuit and tested network are linked in sequence, and processor module is connected with human-computer interaction module, and processor module and FPGA are bi-directionally connected.The tester is at low cost, it is easy realize, scalability it is strong, can be used for student experimenting.

Description

A kind of amplitude versus frequency characte tester based on FPGA and ARM

Technical field

The utility model is related to one kind being based on FPGA（Field programmable gate array）And ARM（Advanced RISC processor）Width Frequency characteristic tester belongs to digital frequency response fields of measurement.

Background technology

Frequency characteristic is one of important performance indexes of Linear Network.If the amplitude-frequency of a certain linear amplifier can be obtained Characteristic can determine the passband of the amplifier, if the frequency content of input signal is only distributed only in the passband, amplification Device is likely to have relatively uniform voltage gain and is distorted relatively small group delay characteristic to each frequency component of input signal.

Frequency-characteristic measuring-testing instrument（It is commonly called as sweep generator）It is the key instrument effectively measured circuit network frequency domain characteristic, it can To measure such as voltage amplifier frequency characteristic, all kinds of active or passive filter filtering characteristic, intermediate frequency amplifier tuning characteristic Deng.

As digital frequency synthesis technology and integrated circuit technique develop, the discrete component in frequency-characteristic measuring-testing instrument tends to Integrated, circuit mode tends to digitize.Most significant technological improvement is swept signal generator, this has benefited from Direct Digital Frequency synthesizer（DDFS：Direct Digital Frequency Synthesizer）The day of technology and its related integrated chip Attain perfect.But because of some limitations of current DDFS technologies, the highest output frequency of inexpensive DDFS Sweep Sources is still limited.

Swept frequency is not very high the Frequency Characteristic Instrument, and main body circuit is mostly by microcontroller, FPGA, DDFS Special integrated chip is formed by combining, and be added to tested network input terminal is the step-type swept-frequency signal of frequency.In microcontroller Under control, on the discrete frequency point of each frequency sweep, peak envelop detection, detection output voltage are carried out to tested network output voltage It is acquired by A/D, is sent into microcontroller and carries out gain calculating.Equally, on the discrete frequency point of each frequency sweep, tested network is inputted, Output signal progress compares phase in real time（Phase demodulation）, the phase-frequency characteristic of tested network can be obtained.The Frequency Characteristic Instrument can be square Just LCD is used（Liquid crystal display）Number/symbol of display frequency characteristic curve and mark.

Utility model content

The utility model proposes a kind of amplitude versus frequency characte tester based on FPGA and ARM, the tester is at low cost, Yi Shi Now, scalability is strong, can be used for student experimenting.

The utility model is to solve its technical problem to adopt the following technical scheme that：

A kind of amplitude versus frequency characte tester based on FPGA and ARM, including it is FPGA, D/A converter, low-pass filter, tested Network, programme-controlled gain amplifying circuit, A/D converter, processor module and human-computer interaction module, wherein：FPGA, D/A converter, Low-pass filter and tested network are linked in sequence, and FPGA, A/D converter, programme-controlled gain amplifying circuit and tested network sequence connect It connects, processor module is connected with human-computer interaction module, and processor module and FPGA are bi-directionally connected.

The FPGA202 uses Xilinx Artix-7 series of X C7A35T-1CSG324C chips.

The low-pass filter uses Butterworth filter.

The programme-controlled gain amplifying circuit uses PGA204 programmable gain amplifiers.

The human-computer interaction module includes 4*4 matrix keyboards and LCD12864 liquid crystal displays.

The D/A converter uses DAC900 high-speed digital-analog conversion chips, rate to be up to 165MSPS, and digital bit wide reaches 10bits。

The A/D converter uses ADC10080 high speed analog-to-digital conversion chips, rate to be up to 80MSPS, and digital bit wide reaches 10bits。

The processor module uses ARM-TM4C1294 Launchpad development boards.

The beneficial effects of the utility model are as follows：

It can be achieved to measure the amplitude versus frequency characte within the scope of 0 ~ 10MHz of tested network, the real-time display tested network on LCD Amplitude-versus-frequency curve, at low cost, modularized design are easily achieved, Student oriented experiment, good hardware structure and Reprogrammable Ability makes it can be applied to the occasion of other high-speed data acquisitions and generation, is with good expansibility.

Description of the drawings

Fig. 1 is the structure chart of the amplitude versus frequency characte tester described in the utility model based on FPGA and ARM.

Fig. 2 is the DDS signal datas output basic block diagram described in the utility model based on FPGA.

Fig. 3 is the input signal amplitude detection principle diagram described in the utility model based on FPGA.

Fig. 4 is ARM-TM4C1294 software instructures figure described in the utility model.

Specific implementation mode

The utility model is described in detail below in conjunction with the accompanying drawings.

As shown in Figure 1, a kind of amplitude versus frequency characte tester based on FPGA and ARM includes FPGA, D/A converter, low pass filtered Wave device, tested network, programme-controlled gain amplifying circuit, A/D converter, processor module and human-computer interaction module.

FPGA202 uses Xilinx Artix-7 series of X C7A35T-1CSG324C chips, completes DDS（Direct Digital frequency Rate synthesizes）Signal data exports and input signal amplitude detection；

Low-pass filter is designed using passive low ventilating filter, selects Butterworth filter；

Programme-controlled gain amplifying circuit uses PGA204 programmable gain amplifiers；

Processor module uses ARM-TM4C1294 Launchpad development boards, is communicated with FPGA202, completes DDS frequency sweeps Signal frequency controls and amplitude versus frequency characte calculates, and realizes the control to human-computer interaction module；

Human-computer interaction module includes 4*4 matrix keyboards and LCD12864 liquid crystal displays；

D/A converter uses DAC900 high-speed digital-analog conversion chips, rate to be up to 165MSPS, and digital bit wide reaches 10bits；

A/D converter uses ADC10080 high speed analog-to-digital conversion chips, rate to be up to 80MSPS, and digital bit wide reaches 10bits；

DAC900 and ADC10080 is integrated in Digital Analog Hybrid Circuits module with XC7A35T-1CSG324C fpga chips On, ADC10080 has two-way, only supports single-ended signal input, does not support differential signal.

As shown in Fig. 2, DDS is mainly made of phase accumulator, Wave data table and D/A converter.Phase accumulator is by N Position adder is constituted with N-bit register.As soon as often coming a clock, the phase that adder exports frequency control word with accumulator register Position data are added, and the result of addition feeds back to the data input pin of accumulator register again, so that adder is in next clock arteries and veins Continue to be added with frequency control word under the action of punching.The data exported with phase accumulator, the phase as Wave data table are adopted Sample address is found out the waveform sampling being stored in Wave data table through tabling look-up, and conversion of the phase to amplitude is completed.Wave data The output data of table is sent to D/A converter, and analog signal output is converted digital signals by D/A converter.TM4C1294 is logical Cross the size of the frequency control word K of control DDS, you can generate the sine wave of frequency consecutive variations.

As shown in figure 3, acquiring measured signal peak value using 10 parallel-by-bit output devices of A/D, 10bit Parallel transformations are exported Signal is to FPGA input terminals, and when A/D conversion signals are more than the count value of counter, the output of digital comparator is high level, with Door conducting, clock are sent to the input end of clock of counter, and counter starts counting up, when the count value of counter turns more than A/D Signal value is changed, digital comparator output is low level, block and door, and counter stops counting, and exports the peak value of measured signal.

As shown in figure 4, ARM-TM4C1294 Software for Design is by control program module, algorithm routine module and driver mould Block three parts form.Core of the program module as whole system is controlled, the work of total system is coordinated, controls driver mould Block and algorithm routine module.Algorithm routine module reads response letter for calculating amplitude versus frequency characte, TM4C1294 by controlling bus Amplitude number with pumping signal, and consider the gain of signal conditioning circuit, find out Amplitude Ration, you can calculate the width of tested network Frequency characteristic.Driver module includes that driving, display driving and analog circuit control driving are communicated with FPGA.Communication driving is realized TM4C1294 passes through EPI（External Peripheral Interface piece inner peripheral interfaces）Parallel bus and FPGA's is logical Letter；The control to liquid crystal display LCD12864 is realized in display driving；Analog circuit control driving is realized to programmable amplifying circuit Gain control.

Embodiment 1：

The sine wave swept-frequency signal data that 0--10 MHz swept frequency ranges are generated by the DDS built inside FPGA, through high speed D/A converter is converted to sinusoidal signal, by low-pass filter smothing filtering, the pumping signal as tested network.By survey grid Network response signal passes through programme-controlled gain amplifying circuit, inputs FPGA after being acquired by A/D converter, obtains pumping signal through by survey grid Network amplitude.Pumping signal generate and input signal amplitude detection via TM4C1294 handle control, can on LCD real-time display The amplitude-versus-frequency curve of tested network.

Claims (8)

1. a kind of amplitude versus frequency characte tester based on FPGA and ARM, it is characterised in that：Including FPGA, D/A converter, low pass filtered Wave device, tested network, programme-controlled gain amplifying circuit, A/D converter, processor module and human-computer interaction module, wherein：FPGA, D/A converter, low-pass filter and tested network are linked in sequence, FPGA, A/D converter, programme-controlled gain amplifying circuit and tested Network-order connects, and processor module is connected with human-computer interaction module, and processor module and FPGA are bi-directionally connected.

2. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that described FPGA uses Xilinx Artix-7 series of X C7A35T-1CSG324C chips.

3. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that described low Bandpass filter uses Butterworth filter.

4. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that the journey It controls gain amplifying circuit and uses PGA204 programmable gain amplifiers.

5. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that the people Machine interactive module includes 4*4 matrix keyboards and LCD12864 liquid crystal displays.

6. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that the D/A Converter uses DAC900 high-speed digital-analog conversion chips, rate to be up to 165MSPS, and digital bit wide reaches 10bits.

7. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that the A/D Converter uses ADC10080 high speed analog-to-digital conversion chips, rate to be up to 80MSPS, and digital bit wide reaches 10bits.

8. a kind of amplitude versus frequency characte tester based on FPGA and ARM according to claim 1, which is characterized in that the place It manages device module and uses ARM-TM4C1294 Launchpad development boards.