CN1819239A - Cmos图像传感器的光电二极管及其制造方法 - Google Patents
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Abstract
本发明公开了一种CMOS图像传感器的光电二极管及其制造方法,其中,可以防止注入在器件隔离膜附近的离子扩散到光电二极管区,以减少暗电流。CMOS图像传感器的光电二极管包括:重掺杂P型半导体衬底;形成在半导体衬底上的轻掺杂P型外延层;形成在外延层上的栅电极;形成在外延层中的器件隔离膜和N型光电二极管区;形成在外延层上以敞开器件隔离膜和光电二极管区之间的部分的隔离膜;以及形成在外延层中的器件隔离膜和光电二极管区之间的重掺杂P型扩散区。
Description
本申请要求在2004年12月30日提交的韩国专利申请第10-2004-0116422号的优先权,其全部内容结合于此作为参考。
技术领域
本发明涉及互补金属氧化物半导体(CMOS)图像传感器及其制造方法,更特别地,涉及一种CMOS图像传感器及其制造方法,其中,可以防止在器件隔离膜附近注入的离子扩散到光电二极管区以减少暗电流。
背景技术
图像传感器是用于将光学图像转换成电信号的半导体器件。图像传感器分为电荷耦合器件(CCD)和CMOS图像传感器。CCD在MOS电容器中存储载荷子并将载荷子传递到MOS电容器。MOS电容器彼此大致相等。CMOS图像传感器采用了转换模式,即,通过使用CMOS技术形成对应单位像素数量的MOS晶体管,顺序地检测使用MOS晶体管的单位像素的输出,其中CMOS技术使用控制电路和信号处理电路作为外围电路。
将目标数据转换为电信号的CMOS图像传感器包括具有光电二极管的信号处理芯片。每个信号处理芯片包括放大器、模数转换器、内电压发生器、定时发生器、以及数字逻辑电路。在该种情况下,从空间、功耗和成本的角度考虑是经济的。CCD的制造需要多个技术工艺步骤。然而,可以通过比CCD的蚀刻处理更便宜的硅片的简单蚀刻处理来批量生产CMOS图像传感器。CMOS图像传感器还在其组装密度上具有优点。
为了显示图像,CMOS图像传感器通过在单位像素中形成光电二极管和晶体管来以转换模式顺序地检测信号。同样,因为CMOS图像传感器使用CMOS技术,所以需要低功耗并且所需掩模的数量比CCD所需的30到40个掩模少20个。以该种方式,在CMOS图像传感器中,简化了工艺步骤并且可以将各种信号处理电路集成在一个芯片中。因此,作为下一代图像传感器的CMOS图像传感器受到了极大关注。
如图1所示,示出了相关技术的CMOS图像传感器的单位电路,根据相关技术的CMOS图像传感器的单位电路包括一个光电二极管和三个MOS晶体管。即,CMOS图像传感器的单位电路包括:光电二极管1,用于使用接收的光产生光电荷;复位二极管2,用于复位由光电晶体管1产生的光电荷;激励晶体管3,作为源跟随缓冲放大器;以及选择晶体管4,用于寻址。
如图2所示,P型外延层(P-EPI)11生长在重掺杂P型衬底10上,以及器件隔离膜12形成在外延层11中。器件隔离膜12用于将轻掺杂N型光电二极管区16与器件隔离。传递晶体管的栅极绝缘膜14和栅电极15形成在外延层11上。重掺杂P型扩散区13形成在器件隔离膜12的两侧,以防止产生暗电流。
然而,在如上所述制造的CMOS图像传感器中,产生了使图像传感器的性能和电荷恶化的暗电流。即使在没有光的情况下,由从光电二极管移向浮动扩散区(floating diffusion region)的电子也可以产生暗电流。暗电流是由发生在半导体衬底表面附近、器件隔离膜和外延层之间、器件隔离膜和光电二极管之间、或P型区和N型区中的各种缺陷造成的,例如线缺陷、点缺陷以及不饱和键。在低照明条件下,暗电流可以导致严重的问题。
为了减少发生在半导体衬底表面附近的暗电流,在轻掺杂P型外延层、轻掺杂N型区、重掺杂P型衬底和器件隔离膜中进行倾斜离子注入。然而,在该种情况下,由于在形成阱时所执行的额外的热扩散,杂质离子过度地扩散到光电二极管区。
发明内容
因此,本发明旨在提供一种CMOS图像传感器的光电二极管及其制造方法,其能够大体上消除由于相关技术的局限和缺点而造成的一个或多个问题。
本发明的目的是提供一种CMOS图像传感器的光电二极管及其制造方法,其通过防止注入在器件隔离膜附近的离子扩散到光电二极管区来减少暗电流。
本发明的其他优点、目的和特征将作为说明书的一部分随后阐述,在本领域技术人员分析以下内容的基础上变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书、以及附图中所特别指出的结构来实现和获得。
为了实现这些目标和其它优点,并根据本发明的目的,如本文中所体现和概括描述的,提供了一种CMOS图像传感器的光电二极管,包括:重掺杂P型半导体衬底;形成在半导体衬底上的轻掺杂P型外延层;形成在外延层上的栅电极;形成在外延层中的器件隔离膜和N型光电二极管区;形成在外延层上以敞开器件隔离膜和光电二极管区之间的区域的绝缘膜;以及在外延层中的器件隔离膜和光电二极管区之间形成的重掺杂P型扩散区。
在本发明的另一方面中,提供了一种用于制造CMOS图像传感器的光电二极管的方法。该方法包括:在半导体衬底上形成器件隔离膜;在半导体衬底上形成光电二极管区;在包括光电二极管区的半导体衬底上形成第一绝缘膜;图样化第一绝缘膜以敞开器件隔离膜和光电二极管区之间的部分以及用于栅电极的区域;在器件隔离膜和光电二极管区之间的半导体衬底上形成扩散区;以及在半导体衬底上形成栅电极。
在本发明的其它方面中,提供了一种用于制造CMOS图像传感器的光电二极管的方法。该方法包括:在重掺杂P型半导体衬底上形成轻掺杂P型外延层;在外延层中形成器件隔离膜和N型光电二极管区;在包括光电二极管区的半导体衬底上形成第一绝缘膜;图样化第一绝缘膜以敞开器件隔离膜和光电二极管区之间的部分以及用于栅电极的区域;在外延层中的器件隔离膜和光电二极管区之间形成重掺杂P型扩散区;以及在外延层上形成栅电极。
应该理解,本发明的先前的概述和随后的详述都是示例性的和说明性的,目的在于提供对所要求的本发明的进一步说明。
附图说明
附图提供了对本发明的进一步理解,其被并入并且构成本申请的一部分。图解实施例与说明书一起解释本发明的原理。在附图中:
图1是现有CMOS图像传感器的单位电路的平面图;
图2是沿图1中的线II-II’的截面图;以及
图3-10是根据本发明的CMOS图像传感器的光电二极管的截面图,示出了制造该种光电二极管的方法。
具体实施方式
以下将详细描述附图所描述的本发明的优选实施例。在任何可能的情况下,附图中将使用相同的附图标号来表示相同或相似的部件。
参考图3,P型外延层111生长在重掺杂P型衬底110上,以及器件隔离膜113形成在外延层111中。器件隔离膜113用于将轻掺杂N型光电二极管区112与器件隔离。在包括器件隔离膜113和光电二极管区112的外延层111上形成第一绝缘膜114。
参考图4,第一光刻胶膜沉积在第一绝缘膜114上,然后经过曝光和显影处理以形成第一光刻胶膜图样115。第一光刻胶膜图样115用于敞开器件隔离膜113和光电二极管区112之间的部分。使用第一光刻胶膜图样115作为掩模有选择地蚀刻第一绝缘膜114。
参考图5,去除第一光刻胶膜图样115,并在第一绝缘膜114上沉积第二光刻胶膜。第二光刻胶膜经过曝光和显影处理以形成覆盖栅极形成区的第二光刻胶膜图样116。
参考图6,使用第二光刻胶膜图样116作为掩模,通过将诸如B或BF2的P型离子注入器件隔离膜113和光电二极管区112之间的部分来形成重掺杂P型扩散区117。
参考图7,去除第二光刻胶膜图样116,在包括第一绝缘膜114的外延层111上形成第二绝缘膜118。
参考图8,通过各向异性蚀刻来蚀刻第二绝缘膜118,直到第一绝缘膜114的上表面被暴露。然后,通过深蚀刻第二绝缘膜118形成的隔离物119形成在栅极形成区的内侧,其中栅极形成区比器件隔离膜113和光电二极管区112之间的区域宽,并且内嵌层120在隔离膜和光电二极管区之间形成。
如图9所示,多晶硅层121沉积在包括第一绝缘膜114的外延层111上。
如图10所示,通过化学机械抛光处理来抛光多晶硅层121,直到第一绝缘膜114的表面被暴露。因此,形成栅电极122。
在如上所述制造的CMOS图像传感器中,仅将重掺杂P型离子注入器件隔离膜和光电二极管区之间的区域,因此,通过防止由于在形成阱的处理期间的额外热扩散导致的杂质离子扩散到光电二极管区,来减少暗电流。由于这样减少的暗电流,可以均匀地获得像素之间的器件特性,以改进图像传感器的特性。同样,因为热扩散被最小化,可以密集地控制像素间的间隔,因此改进了组装密度。此外,在相关技术中,在光电二极管区和由隔离物119掩盖的区域上存在广泛的等离子损害,本发明通过使用绝缘膜114而解决了该问题。
对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (3)
1.一种CMOS图像传感器的光电二极管,包括:
重掺杂P型半导体衬底;
轻掺杂P型外延层,形成在所述半导体衬底上;
栅电极,形成在所述外延层上;
器件隔离膜和N型光电二极管区,形成在所述外延层上;
绝缘膜,形成在所述外延层上,以敞开所述器件隔离膜和所述光电二极管区之间的部分;以及
重掺杂P型扩散区,形成在所述外延层中的所述器件隔离膜和所述光电二极管区之间。
2.一种用于制造CMOS图像传感器的光电二极管的方法,包括:
在半导体衬底上形成器件隔离膜;
在所述半导体衬底上形成光电二极管区;
在包括所述光电二极管区的所述半导体衬底上形成第一绝缘膜;
图样化所述第一绝缘膜,以敞开所述器件隔离膜和所述光电二极管区之间的部分以及用于栅电极的区域;
在所述器件隔离膜和所述光电二极管区之间的所述半导体衬底上形成扩散区;以及
在所述半导体衬底上形成所述栅电极。
3.一种用于制造CMOS图像传感器的光电二极管的方法,包括:
在重掺杂P型半导体衬底上形成轻掺杂P型外延层;
在所述外延层中形成器件隔离膜和N型光电二极管区;
在包括所述光电二极管区的所述半导体衬底上形成第一绝缘膜;
图样化所述第一绝缘膜以敞开所述器件隔离膜和所述光电二极管区之间的部分以及用于栅电极的区域;
在所述器件隔离膜和所述光电二极管区之间的外延层上形成重掺杂P型扩散区;以及
在所述外延层上形成所述栅电极。
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KR1020040116422A KR100649009B1 (ko) | 2004-12-30 | 2004-12-30 | 시모스 이미지 센서의 광감지 소자 및 그의 제조방법 |
KR10-2004-0116422 | 2004-12-30 | ||
KR1020040116422 | 2004-12-30 |
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CN101630658B (zh) * | 2008-07-15 | 2011-05-11 | 中芯国际集成电路制造(上海)有限公司 | 图像传感器的互连方法 |
CN102110697A (zh) * | 2009-12-03 | 2011-06-29 | 索尼公司 | 成像元件和相机系统 |
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KR100710207B1 (ko) * | 2005-09-22 | 2007-04-20 | 동부일렉트로닉스 주식회사 | 씨모스 이미지 센서의 제조방법 |
KR100769143B1 (ko) * | 2006-11-29 | 2007-10-22 | 동부일렉트로닉스 주식회사 | 이미지 센서의 제조 방법 |
WO2018140858A1 (en) | 2017-01-30 | 2018-08-02 | Western New England University | Thiol isomerases inhibitors and use thereof |
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2004
- 2004-12-30 KR KR1020040116422A patent/KR100649009B1/ko not_active IP Right Cessation
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2005
- 2005-12-29 CN CNB2005101359953A patent/CN100428487C/zh not_active Expired - Fee Related
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101630658B (zh) * | 2008-07-15 | 2011-05-11 | 中芯国际集成电路制造(上海)有限公司 | 图像传感器的互连方法 |
US8247258B2 (en) | 2008-07-15 | 2012-08-21 | Semiconductor Manufacturing International (Shanghai) Corporation | Method of interconnect for image sensor |
CN102110697A (zh) * | 2009-12-03 | 2011-06-29 | 索尼公司 | 成像元件和相机系统 |
CN103094294A (zh) * | 2009-12-03 | 2013-05-08 | 索尼公司 | 成像元件和相机系统 |
Also Published As
Publication number | Publication date |
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US7732245B2 (en) | 2010-06-08 |
KR20060077532A (ko) | 2006-07-05 |
US20060145209A1 (en) | 2006-07-06 |
CN100428487C (zh) | 2008-10-22 |
KR100649009B1 (ko) | 2006-11-27 |
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