CN1801486A - 用于电子封装的直通晶片连接的大表面积铝焊接垫 - Google Patents

用于电子封装的直通晶片连接的大表面积铝焊接垫 Download PDF

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CN1801486A
CN1801486A CNA2005101247661A CN200510124766A CN1801486A CN 1801486 A CN1801486 A CN 1801486A CN A2005101247661 A CNA2005101247661 A CN A2005101247661A CN 200510124766 A CN200510124766 A CN 200510124766A CN 1801486 A CN1801486 A CN 1801486A
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杰弗里·P·甘比诺
马克·D·贾菲
理查德·J·拉塞尔
詹姆斯·W·阿基森
埃蒙德·J·斯普罗吉斯
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Abstract

本发明公开了一种实现与集成电路或电子封装的直通晶片连接的焊接垫及其制造方法。所述焊接垫包括大表面积的铝焊接垫，以实现焊接垫与电引线之间高可靠、低电阻的连接。

Description

用于电子封装的直通晶片连接的大表面积铝焊接垫
技术领域
本发明涉及提供一种实现与集成电路或电子封装的直通晶片连接的焊接垫，且该垫包括大表面积的铝焊接垫，以便获得焊接垫与电引线之间高度可靠的低电阻连接。
背景技术
在当前的技术状态下，形成先进类型的电子封装，例如但不限于，3D封装、MEMS封装或CMOS成像器封装时，频繁采用直通晶片连接(through-wafer connection)。具体来说，用于这些连接的工艺被设计蚀刻出穿过晶片背面且穿过焊接垫的通孔，从而露出各焊接垫的边缘。接着形成引线以将焊接垫的边缘连接至焊料凸点，所述焊料凸点布置在电子封装的背面。于是，对于多层铝(Al)布线，采用多层以形成引线与焊接垫间的连接，从而能够得到低阻的电连接。然而，当采用铜(Cu)布线时，使用多个铜层来形成焊接垫与引线间的连接，由于铜材料的氧化和腐蚀，这种特定方法的可靠度差或相对低。单一铝垫通常用作Cu互连工艺中的最终金属层。然而，使用这种单一铝焊接垫实现与引线的连接会导致形成高阻连接，这对可靠性造成不利的影响并且可能产生大量的热，缩短了安装有这种焊接垫的电子封装的工作寿命。
已经发展了各种方案的可应用技术，且存在现有技术的出版物，它们属于在焊接垫下采用通孔以提供直通晶片连接或提供对下面电介质的保护的构思。然而，这些结构或者需要额外的掩模，例如，用于直通晶片连接，或者需要在通孔的下面设置金属层用于保护下面的电介质。
Chisholm等人的美国专利第6,586,839 B2号公开了在焊接垫的下面提供通孔，该通孔用于保护低k电介质免受任何损伤。这些通孔位于下面的金属上，且需要采用这种结构以在机械上加强后者。然而，这需要在通孔下面提供配置金属，由于这种金属必须是铜且会暴露于环境条件下，从而易于腐蚀。相比较于显然用于焊接垫下面的低k电介质的机械或结构完整性的此现有技术，本发明的方法希望提高电特性和增加在晶片背面上从垫到引线的接触的横截面面积。
Rolfson的美国专利第6,060,378号公开了一种厚焊接垫的形成，这通过增加电介质和掩模，并且在标准焊接垫的上面形成厚的镶嵌金属垫。尽管这与本发明的总体方案有些类似，但本发明使用遮蔽掩模或选择性镀敷在焊接垫的上面增加金属，相比较于现有技术，本发明的方法消除了在芯片剩余物的上方淀积任何附加层，因为这些附加层会损坏微透镜，或类似MEMS结构。
至于Siniaguine的美国专利第6,639,303 B2号、Cheng等人的美国专利公开第2004/0141421 A1号以及Pogge等人的美国专利公开第2004/0097002A1号的公开内容，它们全都需要应用额外的掩模，以产生焊接垫下面的直通晶片通孔。这些通孔一直延伸穿过硅晶片，而相对比，按照本发明，通孔仅延伸穿过硅(Si)上的电介质，从而从结构上区别于这些专利公开物。
发明内容
与之相反，为了提供相比于当前技术状态的明显区别和优点，按照本发明，采用在铝焊接垫下面的通孔或通孔条以增加金属的横截面接触面积，例如在提供了穿过用于电子封装的焊接垫的切口时。按照本发明，提供了以下相比于现有技术的优点，即，消除了对用于形成通孔或通孔条的额外掩模的需要，而且，不再于通孔条下面布置金属线，这是现有技术中并不存在的所想到的方面，因为这些金属线通常由铜构成且在封装形成过程中会暴露在周围环境中，因此受到潜在的腐蚀条件影响。
因此，本发明的目的在于利用各种新颖和独特的方面，按照第一实施例在焊接垫下提供通孔条，在替代方式中，按照另一实施例在焊接垫的上面增加金属以提供延伸或附加的接触面积，从而制造出用于形成至电子封装的直通晶片连接的大表面积铝焊接垫。
附图说明
结合附图，现在参照下面本发明优选实施例的详细说明；其中：
图1A至1C说明按照现有技术在电子封装的背面通孔蚀刻形成的顺序步骤，接着形成将焊接垫的边缘连接至焊料凸点的引线；
图2A和2B分别示出按照现有技术在离解后焊接垫和引线的透视图和放大剖面图；
图3示出按照现有技术焊接垫和引线连接部分的放大示意性详图；
图4A至4C示出按照本发明形成利用焊接垫下面通孔条的结构的第一
实施例的顺序步骤；
图5A和5B示出按照本发明分别于封装通孔蚀刻前后在焊接垫上面增加金属的顺序步骤的另一实施例；以及
图6A和6B概略地示出在其下具有槽形通孔的典型波纹铝垫的平面视图和端视图。
具体实施方式
参照附图中的图1A至图1C，列举了现有技术中制造电子封装的例子，它涉及一种形成直通晶片式连接的工艺，其通过蚀刻出穿过晶片背面且穿过焊接垫的通孔，从而露出垫的边缘。
因此，如附图中的图1A所示，前玻璃板10具有贴装于其上的多个间隔凸缘12，设置芯片14以在前玻璃板10的背面18与硅垫20之间形成腔16，从芯片的背面实施蚀刻22以形成至芯片的I/O(输入/输出)。然后，如附图中的图1B所示，采用胶层24贴装后玻璃板26，和实施与法线成角度的刻槽，形成在(通过划片)离解之前的初始结构30。
之后，如附图中的图1C所示，BGA焊料凸点32适当地固定到后板和引线34，引线34沿着刻槽表面36延伸连接，从而与形成在间隔凸缘部分12下面的焊接垫38连接。接着，沿着线A实施最终的划片，以提供离解和形成分立结构，如附图中的图2A和2B所示。在本例中，如图所示，环氧40将硅20贴装到后玻璃板26，还为BGA焊料凸点32和后玻璃板的背面提供贴装表面。
如上所述，间隔凸缘区域包括焊接垫38，该焊接垫38通过沿着该结构体成角度的刻槽侧面延伸的引线34连接至BGA焊料凸点32。在前玻璃板10的背面下方形成腔44，该腔提供了光学或机械的灵应区，如本领域所公知的。
如图3的放大详图所示，该结构50公开了现有技术中带多层焊接垫54的多层铝钨通孔52，以形成引线56与焊接垫54之间的连接。这基本上提供了至铝和钨通孔结构的低阻连接；然而，由于使用了铜布线，通常采用焊接垫与引线之间的多层直通连接，由于铜的氧化和腐蚀可能出现较差的可靠性。而且，在铜互连工艺中常常采用单一铝垫作为最终的金属层，并且如果与引线连接，可能产生高阻连接，出现附带的缺点。
本发明可以使用单一铝垫，但通过在垫的下面形成W(通孔条的宽度小于W的厚度的两倍)或者W+Al(通孔条的宽度大于W的厚度的两倍)的通孔条，或者通过在垫上增加金属，增加了该垫的表面积。
通孔条可以使用标准的通孔掩模或者通过使用附加掩模形成。通孔条的深度可以通过两种方法提高：(1)使用RIE(反应离子蚀刻)滞后(lag)以使通孔条相比于通孔获得大得多的蚀刻深度，或(2)在形成通孔之前使用附加掩模来形成通孔条。因此，表面积也可利用电介质的各向同性蚀刻得以增加，该蚀刻相对于金属是选择性的(稀释HF用于SiO2电介质，O2等离子体用于有机电介质)，从而使封装通孔的边缘相对于金属凹陷。
附图中的图4A至4C示出了这些发明实施例(W+Al通孔条，没有附加掩模)中的第一个。
更具体地参照附图，尤其参照图4A至4C示出的第一实施例，图4A示意性地示出了电子封装60的侧视图，已形成了露出焊接垫的槽，提供了一玻璃板62，其背面包括聚合物层64，沿着一侧的边缘包括二氧化硅或硝酸硅，其背面接触铝焊接垫66。在焊接垫66的下面提供通孔68。钨(W)通孔条68提供在焊接垫66的一端，以提供与电路的连接。钨(W)通孔条70提供在焊接垫66的下面，在其下面利用环氧粘接另一玻璃板，且其构成了将BGA焊料凸点(未示出)贴装在其上的背面。如附图中的图4B所示，其是对电子封装60实施通孔蚀刻后的侧视图，图中示出在其结构中，可以提供横过一个边缘斜延伸的可选各向同性蚀刻76，从而增加焊接垫66的表面积。通孔条也可由金属形成，例如钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB。
如图4B中箭头A的方向示出电子封装的边缘视图，图4C中示出了铝焊接垫66下面的各个钨和铝通孔条80，这提供了增加的表面积，用于低阻电连接。
如前所述，可以与法线成一角度地切割电子封装60的边缘82，用于互连焊接垫的引线的定位。这消除了现有技术中应用附加掩模的需要。
如上所述，可使用RIE滞后使得通孔条70处于比通孔68大的深度，可提供与所用金属类型相关的各向同性蚀刻，其对于电介质是可选的，稀释HF用于SiO2电介质，O2等离子体用于有机电介质，用于使封装边缘相对于金属凹陷或倾斜成角。相比于现有技术，这还消除了对附加掩模的要求，如图4A至4C中的发明所示意的。
如图5A和5B的实施例所示，其中与前一实施例相同或类似的元件使用相同的附图标记，在本例中，在形成端部通孔后，可在焊接垫的上面增加附加的金属层，例如铝、金、银、硅基焊料、铅基焊料、钯、铂、铬、镍、铜或它们的合金。通过使用遮蔽掩模淀积金属形成附加金属，如图5A所示，其中铝被蒸发，并且如果需要，存在阻挡层，例如钛、钽、钨、硝酸钽、硝酸钨或钨化钛。这些材料没有在图中示出。
可采用适当的电镀或者无电镀来增加金属层，由此无电镀不需要附加掩模。另一方面，电镀需要一个或者两个附加掩模，其定义用于电镀金属的籽晶层，如本领域公知的那样。
此后，与前一实施例相同，可在电子封装蚀刻后施加可选的各向同性蚀刻，如图5B的侧视图所示，以便增加相对于法线基本上成角度关系的焊接垫表面。
根据上面的叙述，在图6A和6B中还示出，每一铝垫80可具有在各自焊接垫下提供的槽形通孔82，钨通孔条84可嵌入其中，且通过引线86连接至电子封装结构88，如图6A及图6B的剖面图所示。
从上面的叙述，通过本发明清楚知道，制造出了高度可靠的连接，这避免使用铜来连接焊接垫和引线，从而减小了任何腐蚀的可能，并且由于大的横截面表面积还提供了在焊接垫与引线间的低阻连接，也提供了利用单层铝焊接垫的可能。
也可确定本发明的特定用途在于，它可用于芯片尺度封装(CSP)，得到更小的集成电路封装尺寸。而且，在本发明的另一用途中，可用于图像传感器，其受益于所获得的更小的封装，因为图像传感器尺寸的减小使得它能够安装和用在移动电话摄像机中。按照本发明的又一用途，可用于MEMS传感器，其受益于获得的更小的封装，因为MEMS传感器封装尺寸的减小使得它能够安装和用在消费类便携电子装置(GPS装置等)中。
尽管结合本发明的优选实施例对其进行了具体图示和说明，本领域技术人员会了解，可做出前述和其它形式和细节的变化，而不脱离本发明的精神和范围。因此不希望将本发明局限于所描述和图示的确切形式和细节，而落在权利要求的精神和范围内。

Claims (24)

1.一种实现与集成电路芯片或电子封装的直通晶片连接的包括焊接垫的配置，所述焊接垫包括在该焊接垫与所述集成电路或电子封装的电引线之间形成低电阻连接的大表面接触面积。
2.如权利要求1所述的包括焊接垫的配置，其中所述大表面接触面积包括在所述焊接垫的底面形成的用于增加该焊接垫的接触面积的通孔条。
3.如权利要求2所述的包括焊接垫的配置，其中所述焊接垫由铝构成，所述通孔条由耐受可应用环境条件的腐蚀的材料构成，所述材料选自由钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组。
4.如权利要求2所述的包括焊接垫的配置，其中多个所述焊接垫均连接至电引线，多个槽形的所述通孔布置在每一所述焊接垫的下面，所述通孔条由耐受可应用环境条件的腐蚀的材料构成，所述材料选自由钨或钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组，所述通孔条位于每一所述通孔中用于增加所述焊接垫的接触面积。
5.如权利要求1所述的包括焊接垫的配置，其中实施与所述焊接垫成角度关系的各向同性蚀刻，以增加所述焊接垫的电性侧接触表面。
6.如权利要求1所述的包括焊接垫的配置，其中在所述焊接垫的表面上提供一金属掩模形成层，且所述焊接垫的表面积增加。
7.如权利要求6所述的包括焊接垫的配置，其中遮蔽掩模提供待淀积在所述焊接垫的表面的被蒸发金属的所述金属掩模形成层，或者所述金属通过选择性镀敷工艺淀积，例如电镀或无电镀。
8.如权利要求6所述的包括焊接垫的配置，其中实施与所述焊接垫成角度关系的各向同性蚀刻，以增加所述焊接垫的电性侧接触表面。
9.如权利要求6所述的包括焊接垫的配置，其中所述掩模形成层选自由铝、金、银、硅基焊料、铅基焊料、钯、铂、铬、镍、铜构成的材料或所述材料的合金的组的金属组成。
10.一种产生与焊接垫的低电阻连接的方法，包括提供实现与集成电路芯片或者电子封装的直通晶片连接的铝焊接垫，以及赋予所述焊接垫大的表面接触面积，以在所述焊接垫与所述集成电路或电子封装的电引线之间形成所述低电阻连接。
11.如权利要求10所述的方法，其中所述大的表面接触面积包括在所述焊接垫的底面形成通孔条用于增加所述焊接垫的接触面积。
12.如权利要求11所述的方法，其中所述通孔条由耐受可应用环境条件的腐蚀的材料构成，所述材料选自由钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组。
13.如权利要求11所述的方法，其中多个所述焊接垫每个均连接至电引线，多个槽形的所述通孔布置在每一所述焊接垫的下面，且所述通孔条由耐受可应用环境条件腐蚀的材料构成，所述材料选自由钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组，所述通孔条位于每一所述通孔中用于增加所述焊接垫的接触面积。
14.如权利要求10所述的方法，其中实施与所述焊接垫成角度关系的各向同性蚀刻，以增加所述焊接垫的电性侧接触表面。
15.如权利要求10所述的方法，其中在所述焊接垫的表面上提供金属掩模形成层，且所述焊接垫的表面积增加。
16.如权利要求15所述的方法，其中遮蔽掩模提供待淀积在所述焊接垫的表面的被蒸发金属的所述金属掩模形成层，或者所述金属通过选择性镀敷工艺淀积，例如电镀或无电镀。
17.如权利要求15所述的方法，其中实施与所述焊接垫成角度关系的各向同性蚀刻，以增加所述焊接垫的电侧接触表面。
18.如权利要求15所述的方法，其中所述掩模形成层由从铝、金、银、硅基焊料、铅基焊料、钯、铂、铬、镍、铜构成的材料或者所述材料的合金的组中的金属构成。
19.一种集成电路芯片，包括侧芯片表面，具有与所述侧芯片表面共面延伸的第一表面的焊接垫；邻近所述焊接垫延伸的电引线，所述电引线包括与所述侧芯片表面共面延伸的表面从而增加电耦合至所述焊接垫的接触表面积，在所述电引线与所述焊接垫之间形成低电阻连接。
20.如权利要求19所述的集成电路芯片，其中所述增加的表面接触面积包括在所述焊接垫的底面形成的用于增加所述焊接垫的接触面积的通孔条。
21.如权利要求20所述的集成电路芯片，其中所述焊接垫由铝构成，所述通孔条由耐受可应用环境条件的腐蚀的材料构成，所述材料选自由钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组。
22.如权利要求20所述的集成电路芯片，其中多个所述焊接垫每个均连接至电引线，多个槽形的所述通孔布置在每一所述焊接垫的下面，且所述通孔条由耐受可应用环境条件的腐蚀的材料构成，所述材料选自由钨、钨和铝的组合、Cr、Au、Ni、NiMoP、Co、CoWP或CoWB构成的金属组，所述通孔条位于每一所述通孔中用于增加所述焊接垫的接触面积。
23.如权利要求20所述的集成电路芯片，其中实施与所述焊接垫成角度关系的各向同性蚀刻，以增加所述焊接垫的电侧接触表面。
24.如权利要求20所述的集成电路芯片，其中在所述焊接垫的表面上提供金属掩模形成层，且通过经由遮蔽掩模蒸发金属，或者通过选择性镀敷工艺，例如电镀或无电镀，来增加所述焊接垫的表面积。
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