CN1779999A - 整合型发光二极管及其制造方法 - Google Patents

整合型发光二极管及其制造方法 Download PDF

Info

Publication number
CN1779999A
CN1779999A CNA2004100844919A CN200410084491A CN1779999A CN 1779999 A CN1779999 A CN 1779999A CN A2004100844919 A CNA2004100844919 A CN A2004100844919A CN 200410084491 A CN200410084491 A CN 200410084491A CN 1779999 A CN1779999 A CN 1779999A
Authority
CN
China
Prior art keywords
substrate
led wafer
circuit
look
led
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004100844919A
Other languages
English (en)
Other versions
CN100468792C (zh
Inventor
杨秋忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CNB2004100844919A priority Critical patent/CN100468792C/zh
Priority to JP2007541646A priority patent/JP2008521222A/ja
Priority to DE112005002855T priority patent/DE112005002855B4/de
Priority to KR1020077011742A priority patent/KR100882995B1/ko
Priority to PCT/CN2005/001766 priority patent/WO2006056121A1/zh
Priority to US11/791,159 priority patent/US8143641B2/en
Publication of CN1779999A publication Critical patent/CN1779999A/zh
Application granted granted Critical
Publication of CN100468792C publication Critical patent/CN100468792C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)

Abstract

本发明提供了一种整合型发光二极管及其制造方法,该整合型发光二极管包括有一预设有电路的基板和一个或一个以上的发光二极管晶片,该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上;其制造方法为a)在基板上制设电路,b)将一个或一个以上的发光二极管晶片置于该基板上,该发光二极管晶片的P、N电极对齐该基板上对应的电路,c)直接将该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。本发明具有散热佳、成本低、寿命高及发光率高等优点。

Description

整合型发光二极管及其制造方法
技术领域
本发明涉及一种整合型发光二极管及其制造方法。
背景技术
请参阅图3所示,其为各种形式LED(发光二极管,也叫发光二极体)制作过程的比较图,现举三种最常见的LED制作过程说明如下:
第一种制作过程为LED LAMP(灯)的制作过程,其为将晶片10先固定在支架11,再打线12,以封胶13进行封装,再在使用时在电路基板14上设孔以供LED灯穿组并焊接固定,从而完成其LED灯的制作过程。
第二种制程为SMD(表面粘贴)LED的制程,其是将晶片20先固定到细小的基板21,再打线22,以封胶23封装,再在使用时将该封装后的产品焊设在电路基板24上。
第三种制程为覆晶LED的制程,现举申请号为092217642的专利进行说明,其制程为准备晶片30和覆晶基板31,将晶片30与覆晶基板31采用高周波32方式进行焊接,再在晶片30上用封胶33封装,所得的成品再焊设于电路基板34上使用。
由上述三种常见的制程,其共同的缺是制程多又繁琐、封装设备昂贵、封装后的LED散热效果不佳,所制得的LED的光照亮度常会因封装材料受热产生变形及其他种种原因的阻挡而减低。
发明内容
本发明目的是为了解决上述问题,提供一种整合型发光二极管。
本发明的又一目的是提供一种整合型发光二极管的制造方法。
该整合型发光二极管包括有一预设有电路的基板和一个或一个以上的发光二极管晶片,该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。
其中,该一个以上的发光二极管晶片的P、N电极以串、并联连接方式紧凑地连结、导通、固定于该基板的电路上。
该发光二极管晶片分别为R(红)色、B(蓝)色和G(绿)色的发光二极管晶片,该基板为多层基板,该分别为R色、B色和G色的发光二极管晶片层叠地连结、导通、固定于该多层基板的电路上。
该发光二极管晶片的P、N电极采用锡膏、导电胶、金球、锡球或银球焊接连结、导通、固定于该基板的电路上。
该发光二极管还设有封装层,该发光二极管晶片封装于该封装层内。
上述另一目的是通过下列技术方案实现的:
该整合型发光二极管的制造方法步骤如下:
a)基板上制设电路;
b)将一个或一个以上的发光二极管晶片置于该基板上,该发光二极管晶片的P、N电极对齐该基板上对应的电路;
c)直接将该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。
其中,该一个以上的发光二极管晶片的P、N电极以串、并联连接方式紧凑地连结、导通、固定于该基板的电路上。
该发光二极管晶片分别为R色、B色和G色的发光二极管晶片,该基板为多层基板,该分别为R色、B色和G色的发光二极管晶片层叠地连结、导通、固定于该多层基板的电路上。
该发光二极管晶片的P、N电极采用锡膏、导电胶、金球、锡球或银球焊接连结、导通、固定于该基板的电路上。
本发明的制造方法还包括将步骤c)得到的发光二极管封装的步骤。
现将本发明的整合型LED与常见的LED的不同点列举如下:
1结构:
常见的覆晶LED:为LED晶片加上覆晶基板制成。
本发明整合型LED:直接将LED晶片电极制成SMD模式,所以可将晶片视为已封装好的SMD(虽结构相同但未封装)。
2焊接材料:
常见的覆晶基板LED:只能采用高周波结合,生产成本相当高。
本发明整合型LED:以金球、锡球、导电胶或锡膏,并可直接由传统锡炉焊接,成本相当低。
3机械加工:
常见的覆晶LED:采用特殊高周波这一机械加工制成覆晶,并经封装后才能用传统锡炉或导电胶加工在电路基板。
本发明整合型LED:不须封装LED,使用传统锡炉即可结合于电路基板上。
本发明的积极进步效果在于:本发明的LED晶片直接连结、导通、固定于基板预设的电路上,这样方法完成的LED,可谓相当地简易快速、且散热佳、成本低、发光率高、寿命高的多重功效;该若干的LED晶片直接连结、导通、固定在基板上,可利用串、并联的连结方式把这些LED晶片紧凑地连结、导通、固定在基板上,可减少电路基板空间,或可装设更多的LED晶片的功效,并可以任意组合方式调节电压和电流;该LED晶片直接连结、导通、固定在基板电路上,更可将R色、G色和B色三种晶片以层叠方式连结、导通、固定在基板电路上,如此达到三种颜色混合成为白光的功效。
附图说明
图1是LED晶片俯视图;
图2是LED晶片侧剖示图;
图3是各种形式LED制程的比较图;
图4A是常用的LED的发光面积图;
图4B是本发明的整合型LED的发光面积图;
图5是本发明的一较佳实施例组装示意图;
图6是本发明的另一较佳实施例组装示意图。
具体实施方式
为了进一步了解本发明的结构设计及技术,现配合附图说明如下:
请参阅图1、2所示,其为LED晶片的示意图,该LED晶片(发光二极管,也称发光二极体)的核心部分是由P型半导体和N型半导体组成的晶片,在P型半导体和N型半导体之间有一个过渡层,称为P-N结。在某些半导体材料的P-N结中,注入的少数载流子与多数载流子复合时会把多余的能量以光的形式释放出来,从而把电能直接转换为光能。P-N结加反向电压,少数载流子难以注入,故不发光。利用这种注入方式致电发光原理制作的二极体叫发光二极体(发光二极管),通称LED。当它处于正向工作状态时(即两瑞加上正向电压),电流从LED阳极流向阴极,半导体晶体就发出从紫外到红外不同颜色的光线,光的强弱与电流强度有关。
参阅图3所示,其为各种形式LED制程的比较图,为了更好地说明本发明的技术方案,现举三种最常见LED的制程与本发明整合型LED的制程比较说明如下:现用表格形式来说明四种制程的差异:第一种制程为LEDLAMP(灯)的制程,其为将晶片10先固定在支架11,再打线12,以封胶13进行封装,在其使用时,在基板14上设孔以供LED灯穿组并焊接固定,从而完成LED灯的制程;第二种制程为SMD(表面粘贴)LED,其制程为将晶片20先固定到细小的基板21,打线22,再用封胶23封装,再在使用时将该封装后的产品焊设于电路基板24上;其第三种制程为覆晶LED的制程,现举申请号为092217642的专利申请为例,其制程为准备晶片30、覆晶基板31,晶片30与覆晶基板31采用高周波32方式焊接,再在晶片30上封胶33封装,所制得的成品再焊设在电路基板34上。
本发明的制程为:
a)基板上制设电路;
b)将1个或1个以上的发光二极管晶片置于该基板上,该发光二极管晶片的P、N电极对齐该基板上对应的电路;
c)直接将该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。其直接将晶片的P、N电极连结、导通、固定于电路基板,达到直接连结、导通、固定的功效,且散热佳、因制程简省而使成本降低,又因没阻挡使其发光率高的优点。本发明的晶片40是未封装的,也不须要小基板,直接取晶片40连结、导通、固定在电路基板41上使用,大量减少制程又降低制造成本,且散热效果好。
参阅图4A和4B所示,首先需了解到LED晶片的特性,其正面与背面都可以发光。本发明的LED晶片50采用高透光性且具保护晶片的材质作为背面51,背面51全面发光而完全没有阻挡,正面52则朝向电路基板,正面表面作防焊及抗氧化处理及适当的电极设计。而常见的LED 60采用正面63发光,背面64作为固定面,其至少会被P、N电极61、62的焊接位置阻挡。故而本发明的LED 50比常用的LED有较多的发光面积。
参阅图5所示,一基板70上预设有电路,该基板70上可以连结、导通、固定若干晶片80,P电极与电源正极相连,N电极与电源负极相连,其P电极与N电极串接。即多片LED晶片以串、并联的连结方式紧凑地连结、导通、固定,以减少电路基板空间或装设更多的LED晶片,并可任意组合上述串或并联可调节电压和电流,而串、并联的晶片均可作电压、电流和亮度的组合。
参阅图6所示,其中该分别为R色LED晶片90、B色LED晶片91、G色LED晶片92,将三种不同色的LED晶片以层叠方式连结、导通和固定,且其P、N电极以导体93直接焊接至多层基板94上,据此将RBG三色混合成发出白光的LED和发出全彩光线的LED的功效。
上述LED也可封装,以达聚光的效果。

Claims (10)

1、一种整合型发光二极管,其包括有一预设有电路的基板和1个或1个以上的发光二极管晶片,其特征在于,该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。
2、根据权利要求1所述的整合型发光二极管,其特征在于该1个以上的发光二极管晶片的P、N电极以串、并联连接方式紧凑地连结、导通、固定于该基板的电路上。
3、根据权利要求1所述的整合型发光二极管,其特征在于该发光二极管晶片分别为R色、B色和G色的发光二极管晶片,该基板为多层基板,该分别为R色、B色和G色的发光二极管晶片层叠地连结、导通、固定于该多层基板的电路上。
4、根据权利要求1所述的整合型发光二极管,其特征在于该发光二极管晶片的P、N电极通过锡膏、导电胶、金球、锡球或银球焊接连结、导通、固定于该基板的电路上。
5、根据权利要求1-4任一权利要求所述的整合型发光二极管,其特征在于该发光二极管还设有封装层,该发光二极管晶片封装于该封装层内。
6、一种权利要求1所述的整合型发光二极管的制造方法,其特征在于:其包括下列步骤:
a)基板上制设电路;
b)将一个或一个以上的发光二极管晶片置于该基板上,该发光二极管晶片的P、N电极对齐该基板上对应的电路;
c)直接将该发光二极管晶片的P、N电极连结、导通、固定于该基板的电路上。
7、根据权利要求6所述的整合型发光二极管的制造方法,其特征在于该1个以上的发光二极管晶片的P、N电极以串、并联连接方式紧凑地连结、导通、固定于该基板的电路上。
8、根据权利要求6所述的整合型发光二极管的制造方法,其特征在于该发光二极管晶片分别为R色、B色和G色的发光二极管晶片,该基板为多层基板,该分别为R色、B色和G色的发光二极管晶片层叠地连结、导通、固定于该多层基板的电路上。
9、根据权利要求6所述的整合型发光二极管的制造方法,其特征在于该发光二极管晶片的P、N电极采用锡膏、导电胶、金球、锡球或银球焊接连结、导通、固定于该基板的电路上。
10、根据权利要求6-9任一权利要求所述的整合型发光二极管的制造方法,其特征在于其还包括将步骤c)得到的发光二极管封装的步骤。
CNB2004100844919A 2004-11-24 2004-11-24 整合型发光二极管及其制造方法 Expired - Fee Related CN100468792C (zh)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CNB2004100844919A CN100468792C (zh) 2004-11-24 2004-11-24 整合型发光二极管及其制造方法
JP2007541646A JP2008521222A (ja) 2004-11-24 2005-10-26 整合型発光ダイオードおよびその製造方法
DE112005002855T DE112005002855B4 (de) 2004-11-24 2005-10-26 LED vom integrierten Typ und Herstellungsverfahren derselben
KR1020077011742A KR100882995B1 (ko) 2004-11-24 2005-10-26 패키지 하지 않고 사용할 수 있는 정합형 발광 다이오드 및 그 제조방법
PCT/CN2005/001766 WO2006056121A1 (en) 2004-11-24 2005-10-26 The integrated-type led and manufacturing method thereof
US11/791,159 US8143641B2 (en) 2004-11-24 2005-10-26 Integrated-type LED and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2004100844919A CN100468792C (zh) 2004-11-24 2004-11-24 整合型发光二极管及其制造方法

Publications (2)

Publication Number Publication Date
CN1779999A true CN1779999A (zh) 2006-05-31
CN100468792C CN100468792C (zh) 2009-03-11

Family

ID=36497736

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100844919A Expired - Fee Related CN100468792C (zh) 2004-11-24 2004-11-24 整合型发光二极管及其制造方法

Country Status (6)

Country Link
US (1) US8143641B2 (zh)
JP (1) JP2008521222A (zh)
KR (1) KR100882995B1 (zh)
CN (1) CN100468792C (zh)
DE (1) DE112005002855B4 (zh)
WO (1) WO2006056121A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101752320B (zh) * 2008-12-19 2011-12-07 杨秋忠 半导体芯片结构
CN106129212A (zh) * 2016-08-24 2016-11-16 厦门忠信达工贸有限公司 正装覆晶led芯片封装体、封装方法及其应用

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007021009A1 (de) * 2006-09-27 2008-04-10 Osram Opto Semiconductors Gmbh Leuchtdiodenanordnung und Verfahren zur Herstellung einer solchen
WO2008060615A1 (en) * 2006-11-15 2008-05-22 The Regents Of The University Of California Transparent mirrorless light emitting diode
TWI460881B (zh) 2006-12-11 2014-11-11 Univ California 透明發光二極體
US7791084B2 (en) * 2008-01-09 2010-09-07 Fairchild Semiconductor Corporation Package with overlapping devices
US7973393B2 (en) * 2009-02-04 2011-07-05 Fairchild Semiconductor Corporation Stacked micro optocouplers and methods of making the same
DE202009016477U1 (de) 2009-11-25 2010-06-17 Hidde, Axel R., Dr. Elektrische Kontaktierungseinrichtung für Leitung und Abschirmung
JP6450923B2 (ja) * 2013-12-20 2019-01-16 パナソニックIpマネジメント株式会社 電子部品実装システムおよび電子部品実装方法ならびに電子部品実装装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05326834A (ja) * 1992-05-20 1993-12-10 Sumitomo Electric Ind Ltd 集積回路チップの高密度実装方法
US5655830A (en) * 1993-12-01 1997-08-12 General Signal Corporation Lighting device
US6903376B2 (en) * 1999-12-22 2005-06-07 Lumileds Lighting U.S., Llc Selective placement of quantum wells in flipchip light emitting diodes for improved light extraction
US6885035B2 (en) * 1999-12-22 2005-04-26 Lumileds Lighting U.S., Llc Multi-chip semiconductor LED assembly
US6357893B1 (en) * 2000-03-15 2002-03-19 Richard S. Belliveau Lighting devices using a plurality of light sources
TWI243644B (en) * 2000-04-21 2005-11-21 Labosphere Inst Scaring device
CN1464953A (zh) * 2001-08-09 2003-12-31 松下电器产业株式会社 Led照明装置和卡型led照明光源
DE10221857A1 (de) * 2002-05-16 2003-11-27 Osram Opto Semiconductors Gmbh Verfahren zum Befestigen eines Halbleiterchips in einem Kunststoffgehäusekörper, optoelektronisches Halbleiterbauelement und Verfahren zu dessen Herstellung
US6985229B2 (en) * 2002-05-30 2006-01-10 Agere Systems, Inc. Overlay metrology using scatterometry profiling
US6773938B2 (en) * 2002-08-29 2004-08-10 Micron Technology, Inc. Probe card, e.g., for testing microelectronic components, and methods for making same
CN2599702Y (zh) * 2003-01-30 2004-01-14 李心宁 发光二极管印刷电路板及显示装置
JP4317697B2 (ja) * 2003-01-30 2009-08-19 パナソニック株式会社 光半導体ベアチップ、プリント配線板、照明ユニットおよび照明装置
JP4307094B2 (ja) * 2003-02-04 2009-08-05 パナソニック株式会社 Led光源、led照明装置、およびled表示装置
US6977396B2 (en) * 2003-02-19 2005-12-20 Lumileds Lighting U.S., Llc High-powered light emitting device with improved thermal properties
CN2620878Y (zh) * 2003-05-16 2004-06-16 三和企业股份有限公司 光源基板结构改良
CN2655429Y (zh) * 2003-09-22 2004-11-10 福建省苍乐电子企业有限公司 一种发光二极管结构
US20060038542A1 (en) * 2003-12-23 2006-02-23 Tessera, Inc. Solid state lighting device
US7468545B2 (en) * 2005-05-06 2008-12-23 Megica Corporation Post passivation structure for a semiconductor device and packaging process for same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101752320B (zh) * 2008-12-19 2011-12-07 杨秋忠 半导体芯片结构
CN106129212A (zh) * 2016-08-24 2016-11-16 厦门忠信达工贸有限公司 正装覆晶led芯片封装体、封装方法及其应用

Also Published As

Publication number Publication date
WO2006056121A1 (en) 2006-06-01
CN100468792C (zh) 2009-03-11
DE112005002855B4 (de) 2012-12-20
US20080087900A1 (en) 2008-04-17
US8143641B2 (en) 2012-03-27
KR20070070237A (ko) 2007-07-03
KR100882995B1 (ko) 2009-02-12
JP2008521222A (ja) 2008-06-19
DE112005002855T5 (de) 2008-01-10

Similar Documents

Publication Publication Date Title
US8492777B2 (en) Light emitting diode package, lighting device and light emitting diode package substrate
CN1227738C (zh) 包括led和荧光led的混合白光源
CN1233045C (zh) 发光器件
KR100928259B1 (ko) 발광 장치 및 그 제조방법
CN1275337C (zh) 高效高亮度多有源区隧道再生白光发光二极管
CN1706043A (zh) Ac下工作的led光引擎及其制作方法
WO2006098561A1 (en) Light emitting apparatus
US8143641B2 (en) Integrated-type LED and manufacturing method thereof
CN101839403A (zh) 用于交流驱动的发光装置
CN1577901A (zh) 多色发光二极管封装
CN103545431B (zh) 发光装置
CN102231378A (zh) 一种led封装结构及其制备方法
CN100590869C (zh) 大功率led封装结构
CN101619814B (zh) 直嵌式大功率led照明模块
CN102214652B (zh) 一种led封装结构及其制备方法
CN101043061A (zh) 可防止静电破坏的发光器封装结构及其制造方法
CN203787420U (zh) 可变换连接的阵列式cob光源
CN213124439U (zh) 一种多色温cob光源
CN1612365A (zh) 具有宽频谱的氮化铝铟镓发光二极管及固态白光器件
CN114784040A (zh) 一种显示面板及显示装置
KR101537798B1 (ko) 백색 발광 다이오드 패키지
CN2852395Y (zh) 一种集成于红绿蓝三芯片的硅芯片
CN102226995A (zh) 一种led封装结构及其制备方法
CN201373280Y (zh) 一种led照明装饰灯泡
CN1527410A (zh) 混色发光二极管

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090311

Termination date: 20191124