CN1765005A - Wafer carrier having improved processing characteristics - Google Patents
Wafer carrier having improved processing characteristics Download PDFInfo
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- CN1765005A CN1765005A CNA2004800081624A CN200480008162A CN1765005A CN 1765005 A CN1765005 A CN 1765005A CN A2004800081624 A CNA2004800081624 A CN A2004800081624A CN 200480008162 A CN200480008162 A CN 200480008162A CN 1765005 A CN1765005 A CN 1765005A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67326—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls
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Abstract
A wafer carrier for supporting a plurality of wafers, including a plurality of slots provided in a cradle, the cradle being formed of silicon carbide and having an oxide layer overlying the silicon carbide.
Description
Background
Invention field
The present invention relates generally to kiln furniture, more particularly, relate to and be used for the wafer carrier that supporting wafers is processed that this processing is such as being the manufacturing procedure that is exposed to high temperature.In addition, the present invention relates generally to use this wafer carrier processed wafer.
Description of Related Art
Be known in the art, semiconductor machining will use workpiece to support and/or transmit semiconductor wafer in each procedure of processing usually, comprises annealing, chemical vapour deposition (CVD), oxidation and other high-temperature process operation.Therefore, use the level and the vertical wafer supporter that are also referred to as brilliant boat in the art to support many (aplurality of) wafer, the common each other equi-spaced apart of these wafers forms the wafer array.So, wafer carrying out processed be commonly called " batch processing ", many wafers are processed simultaneously in this processing procedure.
Along with dwindling of transistor critical dimension, die-size and integrated circuit size, the actual size of processed wafer continues to increase.Such as, industrially develop into 6 inches wafers from 4 inches wafers, generally use 8 inches wafers at present.And 12 inches (300 millimeters) semiconductor manufacturing factories are about to build up production line.Along with the increase of wafer size, in many stages of manufacture process new engineering problem has appearred.
In addition, mainly the semiconductor wafer of being made up of silicon not only is used to make the traditional integrated circuit structure that comprises logic and memory spare, also is used to make opto-electronic device, such as waveguide multiplier and microelectromechanical-systems (MEMS).Therefore, device manufacturing processes sometimes utilizes long-time oxidation step, in this step semiconductor wafer is carried out oxidation, and sometimes the used time of this oxidation step surpasses the time of using usually in the conventional semiconductors processing.Such as, the processing of wafer being carried out several days time is not rare, such as about five to ten days.
As mentioned above, this manufacturing procedure generally includes the oxidation of wafer.
Consider to prolong process time, and wafer size increases, the technical problem of device strength and quality occurred influencing.Therefore, the inventor finds that wafer some defectives occurring through after these manufacturing procedures, local even catastrophic fracture occur such as wafer.Other defect comprises the peripheral distortion of wafer and breach occurs, particularly on those sites of contact wafer supporter, such as being the bottom support part of wafer carrier under the brilliant boat situation of level.
Therefore, there is the demand of improving wafer carrier or brilliant boat, particularly horizontal wafer carrier in this area, and improves manufacturing procedure, increase device yield and the demand that reduces ratio of defects.
Summary of the invention
One aspect of the present invention provides the wafer carrier that is used to support many wafers, and this supporter comprises the many slots that are arranged in pallet, and pallet comprises carborundum and has the oxide skin(coating) that covers carborundum.One aspect of the present invention provides the wafer carrier that is used to support many wafers, and this supporter comprises the many slots that are arranged in pallet, and pallet comprises carborundum and has the oxide skin(coating) that covers carborundum.
The present invention provides a kind of wafer carrier on the other hand, and this supporter contains many slots with specific width.Specifically, the part of each slot has width w
s, w wherein
sBe not less than 1.30t
w, t
wIt is wafer thickness.
According to another feature of the present invention, the wafer carrier that is used to support many wafers is provided, these wafers have radius r
w, and this wafer carrier comprises the many slots that are used for supporting wafers, wherein at least a portion of each slot has radius of curvature r
s, r
sBe not less than about 1.15r
wThis respect distortion according to the present invention, r
sCan have negative value, and r
wHave on the occasion of.
The present invention provides the method for processing many wafers on the other hand, and wherein many wafers are carried on the wafer carrier, and this supporter has above-mentioned any one or whole features, and the wafer of wafer carrier carrying is processed.This manufacturing procedure can be that these wafers are exposed in the oxidation environment with the oxidation wafer.
Brief Description Of Drawings
Can understand the present invention better with reference to the accompanying drawings, each purpose of the present invention, feature and advantage also will become apparent to those skilled in the art.
Fig. 1 is the perspective view of horizontal wafer carrier in one embodiment of the present invention.
Fig. 2 is the sectional view of horizontal wafer carrier in one embodiment of the present invention, carries silicon wafer.
Figure 3 shows that the growth curve of oxide on the silicon carbide wafer supporter.
Fig. 4 represents in one embodiment of the present invention, carries the slot radius of curvature of semiconductor wafer.
Fig. 5 represents in the another embodiment of the present invention, carries the slot radius of curvature of semiconductor wafer.
Fig. 6 represents in the another embodiment of the present invention, carries the slot radius of curvature of semiconductor wafer.
Fig. 7 represents in one embodiment of the present invention, when wafer is carried in the slot, on cross-wise direction with respect to the wafer thickness of slot width.
Use in the different accompanying drawings same reference numerals representation class like or identical items.
The preferred implementation explanation
According to the embodiment of the present invention, provide the particular wafer carrier that is used to support many wafers.Therefore, referring to the wafer carrier in the embodiment of the present invention shown in the accompanying drawing 1.As shown in the figure, wafer carrier 1 comprises carriage 2, and this carriage has basic open design and comprises many trailing arms 3, and it is arc that these trailing arms are substantially, and combining with many supporting members is used to support these wafers.Specifically, have first, second and the 3rd supporting member 10,12 and 14, they are all side-prominent with radial inward, have many slot 16s along these members.The position of each slot 16 and orientation all make it distribute along the identical radian measure of determining radius, are used to support single particular wafer.Each slot all is made up of first, second and the 3rd slot segment 18,20 and 22 respectively, and each fragment all distributes along first, second and the 3rd supporting member 10,12 and 14 respectively.
As shown in accompanying drawing 2, the orientation when being engaged and being carried on the wafer carrier 1 with sectional view explanation wafer 30.The general orientation of wafer carrier shown in attached Fig. 1 and 2 is a level, and the wafer carrier orientation in being to use specifically, is the orientation in semiconductor fabrication environment.As shown in the figure, supporter is generally with the upright position supporting wafers that makes progress.
Clearly show in the accompanying drawing 1, slot 16 is arranged with linear array, and equi-spaced apart each other.Such as, shown in second slot segment 20 equi-spaced apart each other, and with array format.Equally, supporter forms the stack of wafers of level with the linear mode fixed wafer.Slot pitch, and associated wafer pitch has nothing in common with each other according to application-specific, but usually in about 2 to 4 millimeters scope, generally be about 2.38 millimeters.
As shown in accompanying drawing 2, first, second and the 3rd supporting member 10,12 and 14 distribute along radian 32, and the radius of this radian equals wafer radius r
w, so first, second and the 3rd supporting member distribute along radian 32 orders, second supporting member is on the circumference between the first and the 3rd supporting member 10,14.Because second supporting member is positioned at bottommost, i.e. six-o ' clock position place is so second supporting member supports the wafer weight than many parts usually.Radian 32 inswept angles are no more than 180 degree, thereby are convenient to the carrying of wafer.Usually, the determined radian 32 in the position of support section is no more than about 150 degree, perhaps is no more than about 130 degree usually.
Though expressed three supporting members among attached Fig. 1 and 2, wafer carrier can have the supporting member of varying number.Such as, second supporting member can be a bifurcated, forms two independent support members with independent slot segment.At this moment, these supporting members can be equidistant with the six-o ' clock position of bottommost.
As mentioned above, wafer carrier has basic design of opening wide, and this design provides some advantages, and literary composition specific as follows is described.Usually, formed window provides along the open region in the bracket portion cylindrical surface outside 40% at least between trailing arm 3 and the supporting member.This open region is not less than about 50% usually.The advantage of this open design of wafer carrier is, improves the air-flow around the wafer carrier in the pre-oxidation step, forms consistent, uniform oxide layer relatively.
About the material of wafer carrier, as mentioned above, carriage is made up of carborundum.According to a kind of execution mode, carborundum comprises recrystallized silicon carbide, and this is a material known in the art.Usually, the green compact that will contain the semiconductor grade silicon carbide powder mix with sintering aid and binding agent, are cast into the shape of requirement, drying, and heating is up to burning organic binder bond, and heat-treats, and makes the green compact densification and makes the green compact recrystallization.After the densification, can utilize procedure of processing to make wafer carrier reach final size.
Can be used in combination with other forms of carborundum replacement or with recrystallized silicon carbide.Such as, can form silicon carbide substrate by conversion process, by gas phase or liquid technology the carbon precast body is changed into carborundum in this process.At this moment, precast body is formed by carbonaceous material usually, such as semiconductor-grade graphite.And, using under the situation of porous silicon carbide as the wafer carrier basic material, can be embedded with silicon in the supporter.This composition characteristic is called as Si-SiC or siliconized silicon carbide.Therefore, form after the silicon carbide substrate that compares porous, in substrate, embed molten silicon, thereby make this compact structureization to the degree that is fit to refractory applications, such as being used for the semiconductor machining environment.Can be coated with another layer carborundum on the siliconized silicon carbide, such as the carborundum of chemical vapour desposition (CVD).
In addition, wafer carrier can be formed by the independent SiC that forms by CVD.At this moment, form wafer carrier itself by the CVD process that prolongs.
Carborundum with oxide skin(coating) cover wafers supporter.This oxide skin(coating) can form by oxidation supporter in oxidation environment, such as in aerobic environment under elevated temperature the oxidation supporter, this temperature is such as arriving in about 1300 degrees centigrade of scopes 950, and more common is in about 1000 to 1250 degrees centigrade of scopes.Oxidation can be carried out in drying or humid atmosphere, normally under atmospheric pressure carries out.Can produce wet environment by introducing steam, play the effect that increases oxidation rate and improve oxide skin(coating) density.Therefore, carry out wet oxidation at 1150 ℃ and can in about 12 to 48 hours, form firm thick (such as about 2-3 micron) oxide skin(coating).On the other hand, forming this layer by dry oxidation process may need about 5 days, such as 10-20 days.Though this oxide layer is normally formed by oxidation, also can be that deposition forms, such as forming by the TEOS source of the gas is reacted.But, consider durability and robustness, hot grown layer may be preferred.
Oxide skin(coating) is silica normally, generally is SiO
2Silicon oxide layer can directly contact with the carborundum of wafer carrier.Perhaps, can there be the intermediate layer between the oxide skin(coating) of carborundum and covering, such as silicon, just as the situation of embedding silicon-carbon-silicon carbide.
On the accompanying drawing 3 expression silicon carbide wafer supporters as the oxide layer grows curve of the function of time.As shown in the figure, oxide skin(coating) is followed and totally is parabolical growth curve.Owing to reason discussed below, according to one embodiment of the present invention, the thickness of oxide skin(coating) surpasses this curve ratio growth part faster.Can be such as, the thickness of oxide skin(coating) greater than about 0.5 micron, perhaps particularly greater than about 0.75 micron, such as greater than about 1.0 microns, even 1.5 microns.According to specific implementations more of the present invention, the thickness of oxide is 2 microns at least, such as about about 2 to 3 microns.The oxide skin(coating) of noticing embodiment of the present invention is the layer that is positioned on the wafer carrier, rather than the less any native oxide of thickness on the wafer carrier.And, though above-mentioned oxide skin(coating) is normally formed by thermal oxidation technique, can also use other technologies, such as the direct deposition of oxide skin(coating).
Have been found that the formation oxide skin(coating),, can in semiconductor fabrication environment, improve process control such as by hot pre-oxidation step.Specifically, the inventor recognizes, forms in the conventional oxidation treatment of thicker oxide skin(coating) on wafer, and wafer tends to by the growth of oxide skin(coating) on the growth of oxide skin(coating) on the wafer and/or the wafer carrier bonding with wafer carrier.It is believed that in the cooling of wafer/wafer carrier assembly subsequently, by wafer with the different of supporter thermal coefficient of expansion and contraction difference that cause causes occurring in the wafer heat brings out stress.The difference of these thermal expansion/contraction properties can finally can cause wafer damage owing to the difference of The Nomenclature Composition and Structure of Complexes.Under extreme case, bust may take place because of rupture mechanism in wafer.By introducing pre-oxidation step, on supporter, form oxide skin(coating), can suppress the growth of oxide skin(coating) on the supporter in the wafer hot working, alleviate the bonding tendency of generation between wafer and the supporter, thus intensifies process control and raising wafer yield.
Another feature according to the present invention, the slot in the wafer carrier has specific radius of curvature r
s, further intensifies process is controlled and is improved wafer yield, particularly in above-mentioned high temperature process.
As shown in Figure 2, wafer has nominal radius r
wThe wafer manufactory of prior art uses 8 inches, uses 12 inches (300 mm dia) wafers more and more.Therefore, newer manufactory may use radius r
wThe wafer that is about 150 millimeter, but older manufactory may use less wafer, and the manufactory of a new generation uses bigger wafer.According to a kind of feature of execution mode, the radius of curvature r of slot
sBe not less than about 1.15r
wIn other words, be used for the radius of curvature of slot of supporting wafers than wafer radius big at least 15%.Usually, r
sBe not less than about 1.25r
w, such as 1.35r
wAnd 1.50r
wReferring to accompanying drawing 4, shown in r
sBe approximately r
wTwice.In addition, the radius of curvature of slot can approach straight line (r
s=infinity).This specific implementations as shown in Figure 5.At this moment, the part slot of contact wafer is along straight-line extension.
In addition, the radius of curvature of slot can have opposite orientation, that is, have and wafer radius r
wBe in a ratio of negative radius of curvature.As shown in Figure 6, slot has the shape of basic protrusion among the figure, and the radius of this slot extends with the direction opposite with wafer radius from the contact point between wafer and the slot.
In the above-described embodiment, do not require that each slot segment has identical radius of curvature.But, usually have above-mentioned radial features along part second slot segment of second supporting member at least.
Has above-mentioned radius of curvature r by providing
sSocket portion, can make the oxidation adhesion area minimum that may occur between wafer and the supporter.Equally, for the degree of the oxide-bound that forms between wafer and the supporter, minimized adhesive interface a little less than, easier fracture when processing (such as cooling), thus suppress thermal stress in the wafer, this thermal stress can cause occurring above-mentioned fracture phenomena.
According to another embodiment of the invention, to the width w of small part wafer carrier slot
sGreater than wafer thickness t
wSpecifically, width w
sUsually be not less than about 1.30t
wAccording to another kind of execution mode, w
sBe not less than about 1.35t
w, can be at about 1.35t
wTo 1.50t
wScope in.Therefore, accompanying drawing 7 has been represented with respect to wafer thickness t
wSlot width w
s(being not expression in proportion).Notice the actual (real) thickness t of wafer
wCan form factors such as (such as silicon on insulator (SOI)) according to wafer brand, desired use, wafer diameter changes.But in about 0.45 to 0.80 millimeter scope, more common be in about 0.50 to 0.765 millimeter scope to wafer thickness usually.By making slot have above relative width, than narrower width such as being 1.10t
wTo 1.25t
wAbout, make to have exceptional space in the slot and help forming thicker oxide skin(coating).In addition, the affined degree of the slotting wafer of institute in the slot when alleviating oxide growth can reduce the problem of wafer creep.Therefore, use conventional art, the suffered restraining force of the wafer in the slot tends to cause wafer that creep at high temperature takes place, thereby causes occurring breach.Form breach in the wafer periphery and tend to form the mechanical interlocking structure, this is disadvantageous.Specifically, during cooling, breach tends to engage slots, causes the situation that makes generation mechanical stress in the wafer because of the different thermal contraction features of wafer and wafer carrier when cooling.
Except the feature of above-mentioned wafer carrier execution mode, the present invention also provides the method for processing many wafers, is called as batch processing.Therefore, wafer carrier carries many wafers, and these wafers are usually equidistantly to be arranged in linear array.Subsequently, the wafer/wafer carrier assembly is placed in the smelting furnace, such as processing tube, carries out high temperature process.As mentioned above, a kind of desirable manufacturing procedure is to form thicker oxide skin(coating) on wafer, is particularly suitable for MEMS and optoelectronic applications.
Though above embodiments of the present invention are being specified, should be appreciated that the scope that to carry out various improvement and not exceed this claim.
Claims (34)
1. be used to support the wafer carrier of many wafers, comprise:
Be arranged in many slots of carriage, this carriage comprises carborundum and has the oxide skin(coating) that covers carborundum.
2. wafer carrier as claimed in claim 1 is characterized in that carriage comprises recrystallized silicon carbide.
3. wafer carrier as claimed in claim 1 is characterized in that carriage comprises the carborundum of embedding silicon.
4. wafer carrier as claimed in claim 1 is characterized in that carriage comprises the carborundum of conversion.
5. wafer carrier as claimed in claim 1 is characterized in that carriage comprises independently CVD SiC.
6. wafer carrier as claimed in claim 1 is characterized in that oxide skin(coating) comprises silica.
7. wafer carrier as claimed in claim 6 is characterized in that silica has greater than about 0.5 micron thickness.
8. wafer carrier as claimed in claim 6 is characterized in that silica has greater than about 0.75 micron thickness.
9. wafer carrier as claimed in claim 6 is characterized in that silica has greater than about 1.0 microns thickness.
10. wafer carrier as claimed in claim 6 is characterized in that silica has greater than about 1.5 microns thickness.
11. wafer carrier as claimed in claim 1 is characterized in that oxide skin(coating) is the heat growth.
12. wafer carrier as claimed in claim 1 is characterized in that oxide skin(coating) deposits.
13. wafer carrier as claimed in claim 1 is characterized in that wafer carrier is a horizontal wafer carrier, is used for the position supporting wafers to make progress vertical substantially.
14. wafer carrier as claimed in claim 1 is characterized in that slot arranges with linear array, and equi-spaced apart each other.
15. be used to support the wafer carrier of many wafers, these wafers have thickness t
w, wafer carrier comprises the many slots that are used for the supporting wafers array, has slot width w to the single slot of small part
s, wherein, w
sBe not less than about 1.30t
w
16. wafer carrier as claimed in claim 15 is characterized in that w
sBe not less than about 1.35t
w
17. wafer carrier as claimed in claim 15 is characterized in that w
sAt about 1.35t
wTo 1.50t
wScope in.
18. wafer carrier as claimed in claim 1, it is characterized in that carriage comprises first, second and the 3rd supporting member at least, each member supports and contact wafer, each slot have first, second and the 3rd slot segment that extends along first, second and the 3rd supporting member respectively.
19. wafer carrier as claimed in claim 18, it is characterized in that first, second and the 3rd slot segment distribute along the radian that radius equals wafer radius, and first, second and the 3rd supporting member distribute in proper order along this radian, make second supporting member on the circumference between the first and the 3rd supporting member.
20. wafer carrier as claimed in claim 19 is characterized in that the described slot width w that has
sThe single slot of part comprise to small part second slot segment.
21. wafer carrier as claimed in claim 19 is characterized in that first, second and the 3rd slot segment along described radian at interval, this radian is no more than 180 degree.
22. wafer carrier as claimed in claim 19 is characterized in that first, second and the 3rd slot segment along described radian at interval, this radian is no more than 150 degree.
23. be used to support the wafer carrier of many wafers, these wafers have radius r
w, wafer carrier comprises the many slots that are used to support many wafers, has radius of curvature r to the single slot of small part
s, wherein, r
sBe not less than about 1.15r
w
24. wafer carrier as claimed in claim 23 is characterized in that r
sBe not less than about 1.25r
w
25. wafer carrier as claimed in claim 23 is characterized in that r
sBe not less than about 1.35r
w
26. wafer carrier as claimed in claim 23 is characterized in that r
sBe not less than about 1.50r
w
27. wafer carrier as claimed in claim 23 is characterized in that r
sBe infinitely great, described to the single slot of small part along straight-line extension.
28. be used to support the wafer carrier of many wafers, these wafers have radius r
w, wafer carrier comprises the many slots that are used for the supporting wafers array, has radius of curvature r to the single slot of small part
s, wherein, r
sHas negative value and r
wHave on the occasion of.
29. process the method for many wafers, comprising:
In wafer carrier, wafer carrier comprises the many slots that are arranged in carriage with many crystal chip bearings, and carriage comprises carborundum and has the oxide skin(coating) that covers carborundum; With
These wafers are processed.
30. method as claimed in claim 29 is characterized in that manufacturing procedure comprises these wafers are exposed in the oxidation environment with these wafers of oxidation.
31. method as claimed in claim 29 is characterized in that oxide skin(coating) is by carrying out oxidation under the temperature of manufacturing procedure and form being higher than.
32. process the method for many wafers, comprising:
In wafer carrier, these wafers have radius r with many crystal chip bearings
w, wafer carrier comprises the many slots that are used to support many wafers, has radius of curvature r to the single slot of small part
s, wherein, r
sBe not less than about 1.15r
wWith
These wafers are processed.
33. process the method for many wafers, comprising:
In wafer carrier, these wafers have thickness t with many crystal chip bearings
w, wafer carrier comprises the many slots that are used for the supporting wafers array, has slot width w to the single slot of small part
s, wherein, w
sBe not less than about 1.30t
wWith
These wafers are processed.
34. be used to support the wafer carrier of many wafers, these wafers have thickness t
wAnd radius r
w, wafer carrier comprises the many slots that are used to support many wafers, has slot width w to the single slot of small part
sWith radius of curvature r
s, it is characterized in that w
sBe not less than about 1.30t
wAnd r
sBe not less than 1.15r
w, wafer carrier further comprises carborundum and covers the oxide skin(coating) of carborundum.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/402,915 US20040188319A1 (en) | 2003-03-28 | 2003-03-28 | Wafer carrier having improved processing characteristics |
| US10/402,915 | 2003-03-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1765005A true CN1765005A (en) | 2006-04-26 |
| CN100390927C CN100390927C (en) | 2008-05-28 |
Family
ID=32989844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004800081624A Expired - Fee Related CN100390927C (en) | 2003-03-28 | 2004-03-05 | Wafer carrier having improved processing characteristics |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20040188319A1 (en) |
| EP (1) | EP1609171A2 (en) |
| JP (2) | JP2006521689A (en) |
| KR (1) | KR100755196B1 (en) |
| CN (1) | CN100390927C (en) |
| HK (1) | HK1089561A1 (en) |
| TW (1) | TWI288454B (en) |
| WO (1) | WO2004095545A2 (en) |
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| CN103681416A (en) * | 2013-11-29 | 2014-03-26 | 上海华力微电子有限公司 | Method for monitoring thickness of polycrystalline silicon furnace tube wafers |
| CN104269351A (en) * | 2014-09-30 | 2015-01-07 | 上海华力微电子有限公司 | Method for overcoming stress defect of HCD silicon nitride sedimentation technology |
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| CN101146742B (en) * | 2005-03-30 | 2013-05-01 | 揖斐电株式会社 | Silicon carbide-containing particle, method of manufacturing a silicon carbide-based sintered object, silicon carbide-based sintered object, and filter |
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| JPH06302532A (en) * | 1993-04-13 | 1994-10-28 | Japan Energy Corp | Method of heat-treating compound semiconductor single-crystal wafer and wafer supporter used for the method |
| US5417767A (en) * | 1993-12-28 | 1995-05-23 | Stinson; Mark G. | Wafer carrier |
| US5538230A (en) * | 1994-08-08 | 1996-07-23 | Sibley; Thomas | Silicon carbide carrier for wafer processing |
| JP3285723B2 (en) * | 1994-11-17 | 2002-05-27 | 信越半導体株式会社 | Semiconductor heat treatment jig and surface treatment method thereof |
| US5443649A (en) * | 1994-11-22 | 1995-08-22 | Sibley; Thomas | Silicon carbide carrier for wafer processing in vertical furnaces |
| US5702997A (en) * | 1996-10-04 | 1997-12-30 | Saint-Gobain/Norton Industrial Ceramics Corp. | Process for making crack-free silicon carbide diffusion components |
| JPH10242254A (en) * | 1997-02-21 | 1998-09-11 | Ado Matsupu:Kk | Jig for manufacture of semiconductor |
| JP3362113B2 (en) * | 1997-07-15 | 2003-01-07 | 日本碍子株式会社 | Corrosion-resistant member, wafer mounting member, and method of manufacturing corrosion-resistant member |
| US6171400B1 (en) * | 1998-10-02 | 2001-01-09 | Union Oil Company Of California | Vertical semiconductor wafer carrier |
| US6162543A (en) * | 1998-12-11 | 2000-12-19 | Saint-Gobain Industrial Ceramics, Inc. | High purity siliconized silicon carbide having high thermal shock resistance |
| US20030196588A1 (en) * | 2000-02-10 | 2003-10-23 | Norihiro Kobayashi | Silicon boat with protective film, method of manufacture thereof, and silicon wafer heat-treated using silicon boat |
| WO2001060764A1 (en) * | 2000-02-15 | 2001-08-23 | Toshiba Ceramics Co., Ltd. | METHOD FOR MANUFACTURING Si-SiC MEMBER FOR SEMICONDUCTOR HEAT TREATMENT |
| US7055702B1 (en) * | 2000-06-06 | 2006-06-06 | Saint-Gobain Ceramics & Plastics, Inc. | Slip resistant horizontal semiconductor wafer boat |
| US6488497B1 (en) * | 2001-07-12 | 2002-12-03 | Saint-Gobain Ceramics & Plastics, Inc. | Wafer boat with arcuate wafer support arms |
| JP3535853B2 (en) * | 2001-09-18 | 2004-06-07 | エム・エフエスアイ株式会社 | Substrate support fixture and method for drying substrate surface using the same |
-
2003
- 2003-03-28 US US10/402,915 patent/US20040188319A1/en not_active Abandoned
-
2004
- 2004-03-05 WO PCT/US2004/006847 patent/WO2004095545A2/en active Application Filing
- 2004-03-05 JP JP2005518892A patent/JP2006521689A/en active Pending
- 2004-03-05 CN CNB2004800081624A patent/CN100390927C/en not_active Expired - Fee Related
- 2004-03-05 EP EP04718089A patent/EP1609171A2/en not_active Withdrawn
- 2004-03-05 KR KR1020057018160A patent/KR100755196B1/en not_active IP Right Cessation
- 2004-03-16 TW TW093106956A patent/TWI288454B/en not_active IP Right Cessation
-
2006
- 2006-09-07 HK HK06109939A patent/HK1089561A1/en not_active IP Right Cessation
-
2009
- 2009-12-25 JP JP2009295992A patent/JP2010103554A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101928934B (en) * | 2009-06-18 | 2012-11-28 | 中芯国际集成电路制造(上海)有限公司 | Method for improving uniformity of high-temperature oxide of wafer |
| CN103151289A (en) * | 2011-12-07 | 2013-06-12 | 无锡华润华晶微电子有限公司 | Crystal boat and crystal boat transfer device and wafer transfer system containing crystal boat and crystal boat transfer device |
| CN103151289B (en) * | 2011-12-07 | 2015-11-25 | 无锡华润华晶微电子有限公司 | Brilliant boat, brilliant boat transfer device and comprise its wafer transfer system |
| CN103681416A (en) * | 2013-11-29 | 2014-03-26 | 上海华力微电子有限公司 | Method for monitoring thickness of polycrystalline silicon furnace tube wafers |
| CN104269351A (en) * | 2014-09-30 | 2015-01-07 | 上海华力微电子有限公司 | Method for overcoming stress defect of HCD silicon nitride sedimentation technology |
| CN104269351B (en) * | 2014-09-30 | 2017-02-22 | 上海华力微电子有限公司 | Method for overcoming stress defect of HCD silicon nitride sedimentation technology |
| CN107750282A (en) * | 2015-04-13 | 2018-03-02 | 科恩迈尔特种石墨集团有限责任公司 | PECVD boats |
| CN107750282B (en) * | 2015-04-13 | 2019-11-08 | 科恩迈尔特种石墨集团有限责任公司 | PECVD boat |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100390927C (en) | 2008-05-28 |
| TWI288454B (en) | 2007-10-11 |
| KR20060002875A (en) | 2006-01-09 |
| WO2004095545A8 (en) | 2005-12-08 |
| US20040188319A1 (en) | 2004-09-30 |
| TW200425384A (en) | 2004-11-16 |
| HK1089561A1 (en) | 2006-12-01 |
| JP2010103554A (en) | 2010-05-06 |
| JP2006521689A (en) | 2006-09-21 |
| KR100755196B1 (en) | 2007-09-05 |
| EP1609171A2 (en) | 2005-12-28 |
| WO2004095545A2 (en) | 2004-11-04 |
| WO2004095545A3 (en) | 2005-05-12 |
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