CN1599041A - 具高崩溃电压及低逆向漏电流的萧特基二极管及制造方法 - Google Patents
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Abstract
本发明是一种具高崩溃电压及低逆向漏电流的萧特基二极管及制造方法。所述制造方法包含以下步骤：提供一n+重掺杂半导体基板，该半导体基板上具有一n－外延层形成于其上。一第一氧化层形成于n－外延层上。一图案化制程随即图案化第一氧化层以定义护环区域。除去光阻图案层后，沉积一多晶硅层，再进行硼或BF2 +的离子布植。进行高温退火活化离子并形成p+区于n－外延层中。一热氧化制程氧化多晶硅层并扩大p+区而形成护环。进行一第二光罩及蚀刻过程，以定义出主动区。一阻障金属层沉积于主动区上并施以金属硅化程序。未反应的金属层移除后，沉积一阳极金属导电层，再施以第三光罩并图案化以定义阳极区域。另以金属导电层形成于基板背面以作为阴极。
Description
技术领域
本发明是有关于一种萧特基半导二极管元件，尤指一种具有漏电流小及高场崩溃电压的萧特基二极管结构及制造方法。
背景技术
萧特基二极管是一种广泛应用于功率整流元件的整流应用，例如于电源供应器的开关、马达控制、电信开关、工厂自动化、电子自动化等等及许多高速电力开关应用。虽然萧特基二极管具有高速开关特性，然而高逆向漏电流及低崩溃电压大大的限制其在高逆向电压及高温环境下的应用。
习知技术美国专利第3,541,403号揭示应用p+型护环扩散区包围萧特基接触区可以增加逆向崩溃电压。p型护环扩散区是由硼-氮为扩散源或由硼或BF2 +离子布植所产生。然而，过高剂量的硼离子植入会造成表面损伤以及高漏电流。除此之外，p-n接面曲率效应也会严重影响逆向漏电流以及崩溃电压(请参考S.M.Sze所著“Physics of SemiconductorDevices”第二版第二章)。为使植入的硼离子扩散至硅基板深处，在高温长时间的热处理为必须过程。经过这样的处理后，可以获得较大的p-n接面曲率，以减低逆向漏电流及获取较大的崩溃电压。
发明内容
本发明的目的之一即为提出一新方法以制造具有高崩溃电压、低漏电流且可高速切换的萧特基二极管。
本发明揭露一种萧特基二极管结构及其制造方法，包含以下步骤：首先，提供一n+重掺杂半导体基板，该半导体基板上具有一n-外延层形成于其上。随后，一第一氧化层形成于n-外延层上。一图案化制程随即图案化第一氧化层以定义护环区域(guard ring，GR)。在除去光阻图案层之后，一多晶硅层利用LPCVD或APCVD法沉积于所有区域。随后，进行硼或BF2 +的离子布植程序。随后，进行高温退火以驱使多晶硅层内的硼离子扩散而进入n-外延层中。接下来，一热氧化制程接着进行以完全氧化多晶硅层而形成热氧化层，同时更驱使硼离子更深入硅基板。一第二光罩及蚀刻过程随后进行，以定义出主动区。紧接着，一阻障金属(barriermetal)层沉积于主动区上并施以金属硅化程序。在未反应的金属层移除后，最后再沉积一阳极金属导电层，再施以第三光罩并图案化以定义阳极区域。另以金属导电层则形成于基板背面以作为阴极。
附图说明
图1A至图1C显示传统萧特基二极管具有p+护环结构的制造方法的横截面示意图；
图2显示根据本发明的方法，以光阻图案定义护环的横截面示意图；
图3显示根据本发明的方法，形成一多晶硅层于所有区域后，再施以B+ or BF2 +离子布植的横截面示意图；
图4显示根据本发明的方法，以多晶硅层为杂质来源，施以退火制程使杂质扩散进入n-外延层以形成p+区的横截面示意图；
图5显示根据本发明的方法，施以热氧化制程以形成第二氧化层，同时使p+掺杂区扩大的横截面示意图；
图6显示根据本发明的方法，再涂布一第二光阻图案于第二氧化层上，以定义主动区的横截面示意图；
图7显示根据本发明的方法，以第二光阻图案为罩幕，除去裸露的第二氧化层后，再形成萧特基金属硅化层于主动区上，最后再形成一阳极金属层，基板背面形成阴极金属层的横截面示意图；
图8A及图8B显示根据本发明的方法，元件的概要布局示意图；
图9显示根据本发明的方法，示萧特基二极管横截面示意图。
符号说明：
10：n+型半导体基板
20：n-型外延层
20A：外延层表面
25：第一氧化层
30：氧化层
35：护环(p型离子掺杂区)
40：光阻图案
50：阳极金属层
100：半导体基板
101：n+型半导体基板
102：n-型外延层
110：第一氧化层
140：多晶硅层
140A：第二氧化层
150：p+型护环区
160：光阻图案
165：p+型护环区
170：萧特基金属硅化层
180：阳极金属层(也称顶部金属层)
190：阴极
具体实施方式
本发明揭露一萧特基二极管结构及其制造方法。请参照图2的横截面示意图，显示一半导体基板100包含一n+重掺杂基板101和n-轻掺杂外延层102。一厚约100nm至2000nm的氧化层110，接着以热氧化或CVD法形成于n-外延层上。一包含开口115A的光阻图案115接着形成在氧化层110上以定义护环区。
仍请参考图2，一蚀刻步骤以光阻图案115为罩幕接着实施以蚀刻裸露的氧化层。随后移除光阻图案115。
继续请参照图3，一多晶硅层140厚约20nm至1000nm接着以低压气相沉积法(low pressure chemical vapor deposition，LPCVD)沉积于全部区域上。继之高剂量的BF2 +或硼离子全面布植于n-外延层上。布植剂量与布植能量分别约为1E11至5E16/cm2与10至400KeV。
参照图4，接着高温退火(thermal anneal)制程进行，以活化离子，并驱使动离子进入基板形成p+区域150。以多晶硅层140为杂质的扩散源。
接下来，参照图5，高温氧化制程接着进行以氧化多晶硅层140以形成第二氧化层140A。同时p+区150的杂质进一步纵向及横向扩散开来而形成护环区165。
随后，参照图6，一定义主动区的光阻图案160接着形成于第二氧化层140A上。主动区的范围包含由一终止区(termination region)200a上的部分护环与终止区另一端200b的部分护环所包含的范围间，请同时参考图9。
在主动区被定义后，一湿式蚀刻以光阻图案160为罩幕接着将所有暴露出的氧化层区域140A、110除去。
请见图7，在除去光阻图案160后，萧特基金属层(Schottky barriermetal layer)紧接着覆盖在全部区域之上。萧特基金属层可选自Ti、TiN、Ni、Cr、Pd、Pt、W、Mo等。随后再施以约200℃～850℃退火制程以形成金属硅化层170。
在氧化层140A之上未与硅反应的金属紧接着被除去，随后一厚金属层180覆盖于全部区域之上。此金属层再被图案化以形成阳极区域，最后的阳极金属层区域将覆盖所有主动区以及一部分在终止区的蚀刻平台。此金属层可选自TiNi/Ag双金属层的堆栈结构或Al单一金属层其中一种。
一研磨制程随后进行以除去在前述制程中形成于基板背面上的各层材料，最后，再使用溅镀一金属层190以作为阴极。
图8A及图8B为依据本发明的方法的一概略布局示意图，图标包含多个正方形护环区165或长方形护环区165。
图9为一根据本发明方法所制造的萧特基二极管的横截面示意图，具有两个护环在终止区及两个护环在主动区。
本发明具有以下优点：
2、在终止区的护环区165既宽且又平坦，因此，空乏区的弯折区可预期要比传统的元件更远离主动区。
3、高剂量布植所导致的离子损伤可以忽略，这是因本发明是借由多晶硅层来做为杂质扩散源，这部分可以参考作者的另一篇美国专利第5,347,161号。基于上述的好处，可预期本发明所制造的萧特基二极管将有高的崩溃电压与低的逆向漏电流。
Claims (9)
1.一种具高崩溃电压及低逆向漏电流的萧特基二极管的制造方法，至少包含以下步骤：
提供一半导体基板，该基板含有一第一导体层及一外延层，该两层具有相同导电型杂质掺杂，且该外延层掺杂浓度低于该第一导体层；
形成一第一氧化层于该外延层上；
形成一第一光阻图案于该氧化层上以定义护环区域；
进行一第一蚀刻制程蚀刻该第一氧化层，以该光阻图案为罩幕；
除去该第一光阻图案；
形成一多晶硅层于所有裸露的表面；
全面进行离子布植，以布植p型杂质于多晶硅层中；
施以一退火制程，活化该p型杂质，同时以该多晶硅层为p型杂质的来源向该多晶硅层下的该外延层扩散，以形成p型区域；
施以高温氧化制程，用以将该多晶硅层氧化成为第二氧化层，同时使p型区域扩大而形成护环区；
形成第二光阻图案于该第二氧化层上，以定义出主动区；
施以蚀刻制程，蚀刻该第二氧化层，以该第二光阻图案为罩幕；
除去该第二光阻图案；
形成一萧特基阻障金属层于所有裸露的表面；
进行一退火制程，以使该萧特基阻障金属层与硅反应，因此形成一金属硅化物层；
除去未反应的萧特基阻障金属层；
形成一顶部金属层于裸露的表面；
图案化该顶部金属层以定义阳极区域；
施以研磨制程，以研磨该半导体基板背面，至裸露该第一导体层；及
形成一金属层于该半导体基板背面以作为阴极。
2、根据权利要求1所述萧特基二极管的制造方法，其中上述的BF2 +及/或硼离子植入剂量与能量分别为1E11至5E16/cm2，及10至400KeV。
3、根据权利要求1所述的方法，其中上述的多晶硅层厚度为10nm至1000nm。
4、根据权利要求1所述萧特基二极管的制造方法，其中上述的退火制程在200℃至850℃下进行。
5、根据权利要求1所述萧特基二极管的制造方法，其中上述的萧特基阻障金属层是选自于Ti、TiN、Ni、Cr、Mo、Pt、Zr、W及其组合的其中的一种与硅反应产生的金属硅化层构成，而顶部金属层是选自TiNi及Ag堆栈层或Al单层的其中一种构成。
6、根据权利要求1所述萧特基二极管的制造方法，其中上述的第二光阻图案覆盖住部分该护环区域，所以该主动区位在两个护环间并且包含部分的护环。
7、一种具高崩溃电压及低逆向漏电流的萧特基二极管，其特征在于所述萧特基二极管至少包含以下部分：
一半导体基板，包含一第一导电层及一外延层形成于其上，其中该第一导电层及该外延层掺杂有第一型导电性杂质，且该外延层掺杂浓度较低；
一阴极金属层形成于该第一导电层背面上；
四个护环线状排列于该外延层内，且掺杂有第二型导电型杂质，其中，最外侧的两个护环部分被一氧化层覆盖，并作为终止区；
一萧特基硅化层于该外延层上，且位于分开的该氧化层之间；及
一阳极金属层形成于该萧特基硅化层上并延伸以覆盖该氧化层上。
8、根据权利要求7所述的萧特基二极管，其特征在于：该护环区由两种第二型导电型杂质扩散所形成。
9、根据权利要求7所述的萧特基二极管，其特征在于：该萧特基硅化层是选自Ti、TiN、Ni、Cr、Mo、Pt、Zr及W及其组合的其中的一种与硅反应产生的金属硅化层构成，而其中该阳极金属层是由TiNi及Ag堆栈层或Al单层的其中一种构成。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/663,666 | 2003-09-17 | ||
| US10/663,666 US6825073B1 (en) | 2003-09-17 | 2003-09-17 | Schottky diode with high field breakdown and low reverse leakage current |
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| Publication Number | Publication Date |
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| CN1599041A true CN1599041A (zh) | 2005-03-23 |
| CN1305121C CN1305121C (zh) | 2007-03-14 |
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| CNB200410038164XA Expired - Fee Related CN1305121C (zh) | 2003-09-17 | 2004-05-11 | 具高崩溃电压及低逆向漏电流的萧特基二极管及制造方法 |
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| Country | Link |
|---|---|
| US (1) | US6825073B1 (zh) |
| CN (1) | CN1305121C (zh) |
| TW (1) | TWI234289B (zh) |
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- 2004-05-11 CN CNB200410038164XA patent/CN1305121C/zh not_active Expired - Fee Related
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Also Published As
| Publication number | Publication date |
|---|---|
| CN1305121C (zh) | 2007-03-14 |
| TWI234289B (en) | 2005-06-11 |
| TW200512942A (en) | 2005-04-01 |
| US6825073B1 (en) | 2004-11-30 |
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