CN1595671A - 半导体封装 - Google Patents

半导体封装 Download PDF

Info

Publication number
CN1595671A
CN1595671A CNA2004100768313A CN200410076831A CN1595671A CN 1595671 A CN1595671 A CN 1595671A CN A2004100768313 A CNA2004100768313 A CN A2004100768313A CN 200410076831 A CN200410076831 A CN 200410076831A CN 1595671 A CN1595671 A CN 1595671A
Authority
CN
China
Prior art keywords
chip
base material
semiconductor packages
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004100768313A
Other languages
English (en)
Other versions
CN100426536C (zh
Inventor
流石雅年
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Electronics Co Ltd
Original Assignee
Citizen Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Electronics Co Ltd filed Critical Citizen Electronics Co Ltd
Publication of CN1595671A publication Critical patent/CN1595671A/zh
Application granted granted Critical
Publication of CN100426536C publication Critical patent/CN100426536C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0064—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a polymeric substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81208—Compression bonding applying unidirectional static pressure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8121—Applying energy for connecting using a reflow oven
    • H01L2224/81211—Applying energy for connecting using a reflow oven with a graded temperature profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
    • H01L2924/15157—Top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10106—Light emitting diode [LED]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

一种半导体封装，包括基底材料、经由粘合剂或粘合板的干预被结合在基底材料上的柔性印刷线路衬底、以及安装在所述柔性印刷线路衬底上的半导体芯片，半导体芯片通过倒装晶片结合被安装在柔性印刷线路衬底上，基底材料由树脂形成，基底材料具有凹入部分或孔，并且半导体芯片在基底材料的凹入部分或孔内被安装在柔性印刷线路衬底上。

Description

半导体封装
相关申请的交叉引用
本申请要求2003年9月9日提交的日本专利申请2003-317570的优先权，其全部内容以引用方式结合在本文中。
技术领域
本发明涉及一种半导体封装，更具体地，涉及对热冲击具有足够强度的半导体封装。
背景技术
通常，需要通过倒装晶片(以下称作FC)结合，将诸如集成电路芯片(以下称作IC芯片)或光发射二极管芯片(以下称作LED芯片)的半导体芯片安装在诸如PCB衬底或MID(模制互连器件)衬底等的基底材料上，以使半导体封装小型化。然而，由于诸如IC芯片的半导体芯片材料和PCB衬底材料的热膨胀系数、或者IC芯片材料和MID衬底材料的热膨胀系数有很大的差异，存在着各衬底上的IC芯片和布线的连接部分由于IC芯片与PCB衬底或MID衬底之间在工作时产生的热应力而易于断裂的问题。
更具体地，如果在其端子(未示出)上形成有突起10的IC芯片12通过FC结合安装在PCB衬底14上，如图2A所示，则IC芯片和PCB衬底经由突起10的连接部分易于由于热冲击而断裂，因为IC芯片12的主要材料硅的热膨胀系数为大约3ppm/℃，而PCB衬底主要材料玻璃环氧树脂或BT树脂的热膨胀系数为大约12-17ppm/℃。
并且，如果通过在制作成模制树脂制品的MID衬底16上镀覆，形成铜布线或铜图案18，并且其中在其端子上形成突起10的IC芯片12通过EC结合被安装在MID衬底16上，如图2B所示，则由于MID衬底主要材料树脂的热膨胀系数为大约40ppm/℃，图2B所示的封装抵抗热冲击的强度的减少甚至比图2A所示的封装更在厉害。
为了解决上述半导体封装中抗热冲击的问题，如图2C所示，已经使用了一种用于通过FC结合将提供有突起10的IC芯片12安装到提供有铜图案的陶瓷衬底8的方法。陶瓷衬底8的热膨胀系数为大约7ppm/℃，大致上与硅相同，从而获得高强度。然而，存在着半导体封装的制造成本变得很高以及使用该方法的产品受限制的问题。
为了解决这一问题，已经提出了一种建议，通过使用具有高温熔点的焊接突起，以及对焊接突起的焊料使用具有小杨氏模量的材料，减少由IC芯片和基底材料的热膨胀系数之间不同而产生的热应力(作为参考，见日本专利特许公开H8-64717)。
然而，对焊接突起的杨氏模量可以降低的程度存在着限制，从而即使使用上述手段，仍然难以在IC芯片中得到足够的强度等。
也已经公开了一种建议，其中在制造半导体封装时通过将IC芯片和衬底保持在制造半导体时的高温下，减少了应力的产生(作为参考，见日本专利特许公开H11-126796)。然而，即使采用这种方法制造半导体封装，在开始制造时可以制成小应力的半导体封装，但在已经制造半导体封装之后，在热历史中由IC芯片和基底材料的热膨胀系数之间的不同还是产生了应力。
并且，已经公开了一种建议，其中通过FC结合将IC芯片安装在柔性印刷线路(以下称作FPC)衬底上，并且FPC衬底的电极和PCB衬底的电极通过各向异性导电弹性体板连接，结果由IC芯片和PCB衬底的热膨胀系数之间的差异产生的任何应力都由于各向异性导电弹性体板的弹性功能而减少(作为参考，见日本专利特许公开2001-203237)。
这种方法对于热应力减少效果更明显。然而，通过各向异性导电弹性体板连接FPC衬底和PCB衬底的电极是一种在用于具有大量数目的插脚的半导体封装时产生有利效果的技术。如果用于具有少量数目的插脚的半导体封装，存在着具有少量数目的插脚的半导体封装比其中使用陶瓷衬底的情形更昂贵的问题。
此外，已经要求在半导体封装的基底材料中提供用于设置光发射部件的凹入部分或孔，以及在凹入部分等中提供反射膜，以提高诸如LED芯片的光发射部件的发光效率(作为参考，见日本专利特许公开2003-163378)。然而，由于具有这种凹入部分的基底材料出于成本原因由高热膨胀系数的树脂制成，因此导致与由光发射部件和基底材料的热膨胀系数不同而产生热应力有关的问题，该问题与上述情形同样严重。
发明内容
因此，本发明的目的是提供一种廉价的半导体封装，该半导体封装具有简单的结构，并被配置成改善半导体芯片和基底材料上的铜图案的连接部分由于温度改变而易于断裂的问题，因为基底材料和安装在基底材料上的半导体芯片的热膨胀系数不同。
为了实现上述目的，本发明一方面的半导体封装包括基底材料、通过本发明的粘合剂或粘合板结合在基底材料上的FPC衬底、以及安装在FPC衬底上的半导体芯片。
这里，在一个实施方式中，半导体芯片通过FC结合被安装在FPC衬底上。
并且，该基底材料通过模制树脂而形成。
附图说明
图1A、1B和1C是根据本发明的半导体封装的实施方式的截面图，图1D是该半导体封装的透视图。
图2A、2B和2C是用于解释传统半导体封装的截面图。
具体实施方式
在下文中，将参照附图1A至1D解释根据本发明的半导体封装的实施方式。
[第一实施方式]
在图1A中，在诸如IC芯片或LED芯片的半导体芯片12的端子上形成金突起。其中在由聚酰亚胺或聚酯制成的FPC衬底上形成铜图案18的FPC衬底被结合在类似于基底材料20的平板上，该平板经由例如具有小杨氏模量的丙烯酸粘合剂24通过模制树脂而制作成衬底。在其上形成金突起10的半导体芯片12被设置在FPC衬底22上，在半导体芯片12和FPC衬底22之间的间隙中填充热硬化树脂。半导体芯片12上的金突起10和FPC衬底22上的铜图案18在有压力的情形下通过焊接连接，该压力产生于加热时产生的热硬化树脂的硬化和收缩。
在半导体封装采用这种方式构造时，由半导体芯片12和模制基底材料20的热膨胀系数之间差异产生的任何热应力经由FPC衬底22被吸收，使得机械载荷不作用到半导体芯片12和基底材料20上。
也即，在其中半导体芯片12为IC芯片的情形下，FPC衬底22按照IC芯片12的基底材料硅的热膨胀系数延伸和收缩，不会产生任何特殊的热应力，因为聚酰亚胺和聚酯材料的FPC衬底22上的铜图案18的热膨胀系数为大约16ppm/℃，该热膨胀系数比硅大，同时其厚度为10-20μm。IC芯片12和基底材料20的热膨胀系数分别为大约3ppm/℃和大约40ppm/℃，相差很大，但是因为各自具有小杨氏模量的由聚酰亚胺或聚酯制成的FPC衬底22和丙烯酸粘合剂24设置在IC芯片12和基底材料20之间，FPC衬底22和丙烯酸粘合剂24作为阻尼器，使得热应力减少很多。
因此，根据本发明的半导体封装能够充分减少热冲击。
并且，因为使用丙烯酸树脂，所以可以制造与使用陶瓷或各向异性导电弹性板的半导体封装相比廉价得多的半导体封装。
同时，尽管通过对FC结合使用焊接压力方法而连接IC芯片12上的金突起10和FPC衬底22上的铜图案18，当然可以将其它的FC结合方法用于该实施方式中，如通过使用例如回流而连接焊接突起和FPC衬底22上的铜图案18。
并且，FPC衬底22经由具有小杨氏模量的丙烯酸粘合剂的干预而被结合在基底材料20上，当然可以通过其它的粘合手段结合在衬底上，例如，使用具有小杨氏模量的粘合板。
[第二实施方式]
图1B说明使用具有凹入部分30的基底材料28代替图1A中使用的平板状基底材料20的半导体封装的例子。IC芯片12被安装在凹入部分30内在FPC衬底22上形成的铜图案18上。铜图案18部分地延伸到基底材料28的下表面。
同时，在图1B至1D中，相同的数字附属于与图1A中相似的部分。如图1B所示，具有如下有利的效果：凹入部分30在使用包括模制制品的基底材料时易于形成。
图1C说明使用具有孔31的基底材料29代替图1A中的平板状基底材料20的半导体封装的例子。IC芯片12被安装在孔31内在FPC衬底22上形成的铜图案18上。
孔31被构造成按照如下的方式穿过基底材料29：在孔的底部没有基底材料29，与图1B中的凹入部分30相反。在基底材料29中形成孔31的情形下，在孔的底部孔也没有用于粘接的材料，例如可以使用具有与孔31几乎相同尺寸的孔的粘合板。采用这种结构，具有如下有利的效果：半导体封装可以进一步变薄，半导体封装的热释放效率提高，并且包括模制制品的基底材料上的热应力减少。
并且，半导体芯片12的周边完全由透明的环氧树脂或硅27保护，如图1所示。通过这种保护，半导体封装的可靠性增强，并且实现了其处理的简化。因为用于保护的部件27是透明的，所以就没有与半导体封装的光学特性相关的问题。当然，上述的保护结构可应用到图1B的封装中。也可以按照FC结合方法和透明环氧树脂的特性标准化热硬化树脂26和透明环氧树脂或硅27。
如图1C所示，当使用包括模制制品的衬底时，具有如下有利的效果：可以容易地形成孔31。
图1D是图1B和1C所示的半导体封装的透视图。
如果形成基底材料28或29的模制树脂保留在衬底的凹陷部分40的底部，则凹陷部分40形成凹入部分30，如果模制树脂没有保留在凹陷部分并且凹陷部分穿过衬底，则凹陷部分形成孔31。
如果在凹入部分30或孔31的底部和侧表面上提供反射膜，则在半导体12是诸如LED芯片的光发射部件时可以形成具有高光发射效率的半导体封装。
根据本发明，如上所述，因为在半导体和基底材料之间提供FPC衬底，所以可以提供充分减少热应力、其结构简单、并且可以廉价制造的半导体封装。
尽管已经描述了优选的实施方式，但应当注意，本发明不限于这些实施方式，而是可以对这些实施方式进行各种改变和修改。

Claims (9)

1.一种半导体封装，包括：
基底材料；
柔性印刷线路衬底，该衬底经由粘合剂或粘合板的干预被结合在基底材料上；以及
半导体芯片，该半导体芯片被安装在所述柔性印刷线路衬底上。
2.根据权利要求1的半导体封装，其中所述半导体芯片通过倒装晶片结合被安装在柔性印刷线路衬底上。
3.根据权利要求1的半导体封装，其中所述基底材料由树脂形成。
4.根据权利要求1的半导体封装，其中所述基底材料具有凹入部分或孔，并且所述半导体芯片在基底材料的所述凹入部分或孔内被安装在柔性印刷线路衬底上。
5.根据权利要求1的半导体封装，其中所述柔性印刷线路衬底由聚酰亚胺或聚酯形成，并且在所述柔性印刷线路衬底的表面上形成铜图案。
6.根据权利要求1的半导体封装，其中所述粘合剂或粘合板由丙烯酸系统的材料制成。
7.根据权利要求1的半导体封装，其中所述半导体芯片包括IC芯片。
8.根据权利要求1的半导体封装，其中所述半导体芯片包括LED芯片。
9.根据权利要求1的半导体封装，其中在所述半导体芯片和所述柔性印刷线路衬底之间或所述半导体芯片的整个周边上提供环氧树脂或硅，以保护所述半导体芯片和所述柔性印刷线路衬底。
CNB2004100768313A 2003-09-09 2004-09-08 半导体封装 Expired - Fee Related CN100426536C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003317570A JP2005086044A (ja) 2003-09-09 2003-09-09 高信頼性パッケージ
JP2003317570 2003-09-09
JP2003-317570 2003-09-09

Publications (2)

Publication Number Publication Date
CN1595671A true CN1595671A (zh) 2005-03-16
CN100426536C CN100426536C (zh) 2008-10-15

Family

ID=34225289

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100768313A Expired - Fee Related CN100426536C (zh) 2003-09-09 2004-09-08 半导体封装

Country Status (4)

Country Link
US (1) US7199400B2 (zh)
JP (1) JP2005086044A (zh)
CN (1) CN100426536C (zh)
DE (1) DE102004043473A1 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100539219C (zh) * 2005-04-28 2009-09-09 皇家飞利浦电子股份有限公司 包括设置在凹部中的led的光源
CN102956761A (zh) * 2011-08-25 2013-03-06 展晶科技(深圳)有限公司 发光二极管的封装方法
CN102983125A (zh) * 2012-11-27 2013-03-20 北京半导体照明科技促进中心 Led封装、其制作方法及包含其的led系统
CN103282820A (zh) * 2010-12-29 2013-09-04 3M创新有限公司 Led合色器
CN103296188A (zh) * 2013-05-27 2013-09-11 北京半导体照明科技促进中心 Led封装结构及其制作方法
CN106206908A (zh) * 2015-05-26 2016-12-07 科锐 具有应力减轻措施的表面安装器件

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100625600B1 (ko) * 2005-05-30 2006-09-20 엘지전자 주식회사 측면형 발광 다이오드의 패키지 구조 및 이에 대한제작방법
CN100517738C (zh) * 2005-07-15 2009-07-22 鸿富锦精密工业（深圳）有限公司 影像感测芯片的封装结构
KR101240650B1 (ko) * 2006-01-18 2013-03-08 삼성디스플레이 주식회사 발광 다이오드 모듈, 이를 구비한 백라이트 어셈블리 및이를 구비한 표시 장치
US8044412B2 (en) 2006-01-20 2011-10-25 Taiwan Semiconductor Manufacturing Company, Ltd Package for a light emitting element
EP1848042A1 (en) * 2006-04-21 2007-10-24 LEXEDIS Lighting GmbH LED package with submount
TWI296037B (en) * 2006-04-28 2008-04-21 Delta Electronics Inc Light emitting apparatus
US20080035942A1 (en) * 2006-08-08 2008-02-14 Lg Electronics Inc. Light emitting device package and method for manufacturing the same
KR100851183B1 (ko) * 2006-12-27 2008-08-08 엘지이노텍 주식회사 반도체 발광소자 패키지
JP2010114427A (ja) * 2008-10-08 2010-05-20 Sumitomo Chemical Co Ltd チップ型ｌｅｄパッケージ用基板
US20120263200A1 (en) * 2009-12-18 2012-10-18 Mitsubishi Electric Corporation Laser module
US20110170303A1 (en) * 2010-01-14 2011-07-14 Shang-Yi Wu Chip package and fabrication method thereof
KR101114719B1 (ko) * 2010-08-09 2012-02-29 엘지이노텍 주식회사 발광 소자 및 이를 구비한 조명 시스템
WO2012061183A2 (en) 2010-11-03 2012-05-10 3M Innovative Properties Company Flexible led device for thermal management and method of making
US9179543B2 (en) 2010-11-03 2015-11-03 3M Innovative Properties Company Flexible LED device with wire bond free die
US9698563B2 (en) 2010-11-03 2017-07-04 3M Innovative Properties Company Flexible LED device and method of making
US9716061B2 (en) 2011-02-18 2017-07-25 3M Innovative Properties Company Flexible light emitting semiconductor device
JP6060578B2 (ja) 2012-09-14 2017-01-18 日亜化学工業株式会社 発光装置
JP2017199803A (ja) * 2016-04-27 2017-11-02 日立マクセル株式会社 三次元成形回路部品
CN105870297A (zh) * 2016-05-27 2016-08-17 福建鸿博光电科技有限公司 一种led光源及其封装方法
US20210391226A1 (en) * 2020-06-15 2021-12-16 Stmicroelectronics, Inc. Semiconductor device packages having cap with integrated electrical leads
CN114187850B (zh) * 2021-12-17 2022-09-20 合肥达视光电科技有限公司 一种透性强的贴膜显示屏及生产工艺

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455518A (en) * 1993-11-23 1995-10-03 Hughes Aircraft Company Test apparatus for integrated circuit die
JPH0864717A (ja) 1994-08-24 1996-03-08 Matsushita Electric Ind Co Ltd 回路部品の実装方法
US5729896A (en) * 1996-10-31 1998-03-24 International Business Machines Corporation Method for attaching a flip chip on flexible circuit carrier using chip with metallic cap on solder
JP3037229B2 (ja) 1997-10-23 2000-04-24 新潟日本電気株式会社 ベアチップ実装方法及び実装装置
JP4250844B2 (ja) 2000-01-21 2009-04-08 Ｊｓｒ株式会社 半導体装置
JP4362917B2 (ja) * 2000-01-31 2009-11-11 宇部興産株式会社 金属箔積層体およびその製法
JP2003158301A (ja) * 2001-11-22 2003-05-30 Citizen Electronics Co Ltd 発光ダイオード
JP2003163378A (ja) * 2001-11-26 2003-06-06 Citizen Electronics Co Ltd 表面実装型発光ダイオード及びその製造方法
US20060018120A1 (en) * 2002-11-26 2006-01-26 Daniel Linehan Illuminator and production method
US6835960B2 (en) * 2003-03-03 2004-12-28 Opto Tech Corporation Light emitting diode package structure

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100539219C (zh) * 2005-04-28 2009-09-09 皇家飞利浦电子股份有限公司 包括设置在凹部中的led的光源
CN103282820A (zh) * 2010-12-29 2013-09-04 3M创新有限公司 Led合色器
US9151463B2 (en) 2010-12-29 2015-10-06 3M Innovative Properties Company LED color combiner
CN102956761A (zh) * 2011-08-25 2013-03-06 展晶科技(深圳)有限公司 发光二极管的封装方法
CN102983125A (zh) * 2012-11-27 2013-03-20 北京半导体照明科技促进中心 Led封装、其制作方法及包含其的led系统
CN102983125B (zh) * 2012-11-27 2015-07-01 北京半导体照明科技促进中心 Led封装、其制作方法及包含其的led系统
CN103296188A (zh) * 2013-05-27 2013-09-11 北京半导体照明科技促进中心 Led封装结构及其制作方法
CN103296188B (zh) * 2013-05-27 2015-12-09 北京半导体照明科技促进中心 Led封装结构及其制作方法
CN106206908A (zh) * 2015-05-26 2016-12-07 科锐 具有应力减轻措施的表面安装器件
CN106206908B (zh) * 2015-05-26 2018-11-06 科锐 具有应力减轻措施的表面安装器件

Also Published As

Publication number Publication date
US7199400B2 (en) 2007-04-03
DE102004043473A1 (de) 2005-05-12
CN100426536C (zh) 2008-10-15
US20050051792A1 (en) 2005-03-10
JP2005086044A (ja) 2005-03-31

Similar Documents

Publication Publication Date Title
CN1595671A (zh) 半导体封装
US8796717B2 (en) Light-emitting diode package and manufacturing method thereof
CN100536181C (zh) 发光二极管
US8668352B2 (en) Light emitting module
CN1168138C (zh) 倒装片电子封装件及制作方法和应用此封装件的电子设备
CN100438023C (zh) 摄像模块及其制造方法
US20050239234A1 (en) Method of making assemblies having stacked semiconductor chips
US20060268213A1 (en) Low-cost flexible film package module and method of manufacturing the same
CN1231964C (zh) 半导体器件
CN1156970C (zh) 电子元件
JP2009524930A (ja) 発光ダイオードパッケージ及びその製造方法
CN1574304A (zh) 用于半导体器件的封装
CN1638120A (zh) 半导体组装体及其制造方法
KR20110016857A (ko) 광전 반도체 소자 및 인쇄 회로 기판
CN1148733A (zh) 塑料模制的具有小平直度偏差引线的集成电路组件
CN1298082C (zh) 图像传感器模块
CN1866629A (zh) 半导体装置及其制造方法
CN101048038A (zh) 电子单元及具有该电子单元的电子装置
CN1224108C (zh) 固态成像设备及其制造方法
KR101926715B1 (ko) 마이크로 led 모듈 및 마이크로 led 모듈 제조 방법
CN100346476C (zh) 半导体装置及混合集成电路装置
US20020003300A1 (en) Semiconductor apparatus and electronic system
KR20060002282A (ko) 일체형 열전달 슬러그가 형성된 발광다이오드 패키지 및그 제조방법
CN1433071A (zh) 芯片封装及其制造方法
CN1956179A (zh) 芯片封装结构及凸块制程

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20081015

Termination date: 20110908